def import_benchmark_output(arch, bench_type, filepath, output=sys.stdout):
"""
Import benchmark results from micro-benchmarks.
:param arch: target architecture key
:type arch: str
:param bench_type: key for defining type of benchmark output
:type bench_type: str
:param filepath: filepath to the output file
:type filepath: str
:param output: output stream to dump, defaults to sys.stdout
:type output: stream
"""
supported_bench_outputs = ["ibench", "asmbench"]
assert os.path.exists(filepath)
if bench_type not in supported_bench_outputs:
raise ValueError("Benchmark type is not supported.")
with open(filepath, "r") as f:
input_data = f.readlines()
db_entries = None
mm = MachineModel(arch)
if bench_type == "ibench":
db_entries = _get_ibench_output(input_data, mm.get_ISA())
elif bench_type == "asmbench":
db_entries = _get_asmbench_output(input_data, mm.get_ISA())
# write entries to DB
for entry in db_entries:
mm.set_instruction_entry(db_entries[entry])
if output is None:
print(mm.dump())
else:
mm.dump(stream=output)
def test_machine_model_various_functions(self):
# check dummy MachineModel creation
try:
MachineModel(isa='x86')
MachineModel(isa='aarch64')
except ValueError:
self.fail()
test_mm_x86 = MachineModel(
path_to_yaml=self._find_file('test_db_x86.yml'))
test_mm_arm = MachineModel(
path_to_yaml=self._find_file('test_db_aarch64.yml'))
# test get_instruction without mnemonic
self.assertIsNone(test_mm_x86.get_instruction(None, []))
self.assertIsNone(test_mm_arm.get_instruction(None, []))
# test get_instruction from DB
self.assertIsNone(test_mm_x86.get_instruction(None, []))
self.assertIsNone(test_mm_arm.get_instruction(None, []))
self.assertIsNone(test_mm_x86.get_instruction('NOT_IN_DB', []))
self.assertIsNone(test_mm_arm.get_instruction('NOT_IN_DB', []))
name_x86_1 = 'vaddpd'
operands_x86_1 = [
{
'class': 'register',
'name': 'xmm'
},
{
'class': 'register',
'name': 'xmm'
},
{
'class': 'register',
'name': 'xmm'
},
]
instr_form_x86_1 = test_mm_x86.get_instruction(name_x86_1,
operands_x86_1)
self.assertEqual(
instr_form_x86_1,
test_mm_x86.get_instruction(name_x86_1, operands_x86_1))
self.assertEqual(
test_mm_x86.get_instruction('jg', [{
'class': 'identifier'
}]),
test_mm_x86.get_instruction('jg', [{
'class': 'identifier'
}]),
)
name_arm_1 = 'fadd'
operands_arm_1 = [
{
'class': 'register',
'prefix': 'v',
'shape': 's'
},
{
'class': 'register',
'prefix': 'v',
'shape': 's'
},
{
'class': 'register',
'prefix': 'v',
'shape': 's'
},
]
instr_form_arm_1 = test_mm_arm.get_instruction(name_arm_1,
operands_arm_1)
self.assertEqual(
instr_form_arm_1,
test_mm_arm.get_instruction(name_arm_1, operands_arm_1))
self.assertEqual(
test_mm_arm.get_instruction('b.ne', [{
'class': 'identifier'
}]),
test_mm_arm.get_instruction('b.ne', [{
'class': 'identifier'
}]),
)
# test full instruction name
self.assertEqual(
MachineModel.get_full_instruction_name(instr_form_x86_1),
'vaddpd register(name:xmm),register(name:xmm),register(name:xmm)',
)
self.assertEqual(
MachineModel.get_full_instruction_name(instr_form_arm_1),
'fadd register(prefix:v,shape:s),register(prefix:v,shape:s),' +
'register(prefix:v,shape:s)',
)
# test get_store_tp
self.assertEqual(
test_mm_x86.get_store_throughput({
'base': {
'name': 'x'
},
'offset': None,
'index': None,
'scale': 1
}),
[[2, '237'], [2, '4']],
)
self.assertEqual(
test_mm_x86.get_store_throughput({
'base': {
'prefix': 'NOT_IN_DB'
},
'offset': None,
'index': 'NOT_NONE',
'scale': 1
}),
[[1, '23'], [1, '4']],
)
self.assertEqual(
test_mm_arm.get_store_throughput({
'base': {
'prefix': 'x'
},
'offset': None,
'index': None,
'scale': 1
}),
[[2, '34'], [2, '5']],
)
self.assertEqual(
test_mm_arm.get_store_throughput({
'base': {
'prefix': 'NOT_IN_DB'
},
'offset': None,
'index': None,
'scale': 1
}),
[[1, '34'], [1, '5']],
)
# test get_store_lt
self.assertEqual(
test_mm_x86.get_store_latency({
'base': {
'name': 'x'
},
'offset': None,
'index': None,
'scale': '1'
}),
0,
)
self.assertEqual(
test_mm_arm.get_store_latency({
'base': {
'prefix': 'x'
},
'offset': None,
'index': None,
'scale': '1'
}),
0,
)
# test has_hidden_load
self.assertFalse(test_mm_x86.has_hidden_loads())
# test default load tp
self.assertEqual(
test_mm_x86.get_load_throughput({
'base': {
'name': 'x'
},
'offset': None,
'index': None,
'scale': 1
}),
[[1, '23'], [1, ['2D', '3D']]],
)
# test adding port
test_mm_x86.add_port('dummyPort')
test_mm_arm.add_port('dummyPort')
# test dump of DB
with open('/dev/null', 'w') as dev_null:
test_mm_x86.dump(stream=dev_null)
test_mm_arm.dump(stream=dev_null)
def test_machine_model_various_functions(self):
# check dummy MachineModel creation
try:
MachineModel(isa="x86")
MachineModel(isa="aarch64")
except ValueError:
self.fail()
test_mm_x86 = MachineModel(
path_to_yaml=self._find_file("test_db_x86.yml"))
test_mm_arm = MachineModel(
path_to_yaml=self._find_file("test_db_aarch64.yml"))
# test get_instruction without mnemonic
self.assertIsNone(test_mm_x86.get_instruction(None, []))
self.assertIsNone(test_mm_arm.get_instruction(None, []))
# test get_instruction from DB
self.assertIsNone(test_mm_x86.get_instruction(None, []))
self.assertIsNone(test_mm_arm.get_instruction(None, []))
self.assertIsNone(test_mm_x86.get_instruction("NOT_IN_DB", []))
self.assertIsNone(test_mm_arm.get_instruction("NOT_IN_DB", []))
name_x86_1 = "vaddpd"
operands_x86_1 = [
{
"class": "register",
"name": "xmm"
},
{
"class": "register",
"name": "xmm"
},
{
"class": "register",
"name": "xmm"
},
]
instr_form_x86_1 = test_mm_x86.get_instruction(name_x86_1,
operands_x86_1)
self.assertEqual(
instr_form_x86_1,
test_mm_x86.get_instruction(name_x86_1, operands_x86_1))
self.assertEqual(
test_mm_x86.get_instruction("jg", [{
"class": "identifier"
}]),
test_mm_x86.get_instruction("jg", [{
"class": "identifier"
}]),
)
name_arm_1 = "fadd"
operands_arm_1 = [
{
"class": "register",
"prefix": "v",
"shape": "s"
},
{
"class": "register",
"prefix": "v",
"shape": "s"
},
{
"class": "register",
"prefix": "v",
"shape": "s"
},
]
instr_form_arm_1 = test_mm_arm.get_instruction(name_arm_1,
operands_arm_1)
self.assertEqual(
instr_form_arm_1,
test_mm_arm.get_instruction(name_arm_1, operands_arm_1))
self.assertEqual(
test_mm_arm.get_instruction("b.ne", [{
"class": "identifier"
}]),
test_mm_arm.get_instruction("b.ne", [{
"class": "identifier"
}]),
)
# test full instruction name
self.assertEqual(
MachineModel.get_full_instruction_name(instr_form_x86_1),
"vaddpd register(name:xmm),register(name:xmm),register(name:xmm)",
)
self.assertEqual(
MachineModel.get_full_instruction_name(instr_form_arm_1),
"fadd register(prefix:v,shape:s),register(prefix:v,shape:s)," +
"register(prefix:v,shape:s)",
)
# test get_store_tp
self.assertEqual(
test_mm_x86.get_store_throughput({
"base": {
"name": "x"
},
"offset": None,
"index": None,
"scale": 1
}),
[[2, "237"], [2, "4"]],
)
self.assertEqual(
test_mm_x86.get_store_throughput({
"base": {
"prefix": "NOT_IN_DB"
},
"offset": None,
"index": "NOT_NONE",
"scale": 1
}),
[[1, "23"], [1, "4"]],
)
self.assertEqual(
test_mm_arm.get_store_throughput({
"base": {
"prefix": "x"
},
"offset": None,
"index": None,
"scale": 1
}),
[[2, "34"], [2, "5"]],
)
self.assertEqual(
test_mm_arm.get_store_throughput({
"base": {
"prefix": "NOT_IN_DB"
},
"offset": None,
"index": None,
"scale": 1
}),
[[1, "34"], [1, "5"]],
)
# test get_store_lt
self.assertEqual(
test_mm_x86.get_store_latency({
"base": {
"name": "x"
},
"offset": None,
"index": None,
"scale": "1"
}),
0,
)
self.assertEqual(
test_mm_arm.get_store_latency({
"base": {
"prefix": "x"
},
"offset": None,
"index": None,
"scale": "1"
}),
0,
)
# test has_hidden_load
self.assertFalse(test_mm_x86.has_hidden_loads())
# test default load tp
self.assertEqual(
test_mm_x86.get_load_throughput({
"base": {
"name": "x"
},
"offset": None,
"index": None,
"scale": 1
}),
[[1, "23"], [1, ["2D", "3D"]]],
)
# test adding port
test_mm_x86.add_port("dummyPort")
test_mm_arm.add_port("dummyPort")
# test dump of DB
with open("/dev/null", "w") as dev_null:
test_mm_x86.dump(stream=dev_null)
test_mm_arm.dump(stream=dev_null)