def fasm_prefix_for_tile(self, hierarchical_instance):
config_bit_base = 0
for instance in hierarchical_instance:
config_bit_offsets = get_config_bit_offset(self.context, instance.parent)
if instance.name not in config_bit_offsets: # no configuration bits down the path
return tuple()
config_bit_base += config_bit_offsets[instance.name]
config_bit_offsets = get_config_bit_offset(self.context, hierarchical_instance[-1].model)
prefix = []
for subblock in range(hierarchical_instance[-1].model.block.capacity):
blk_inst = hierarchical_instance[-1].model.block_instances[subblock]
if blk_inst.name not in config_bit_offsets:
return tuple()
prefix.append('b' + str(config_bit_base + config_bit_offsets[blk_inst.name]))
return tuple(iter(prefix))
def _update_config_list(context, module, config, prefix = '', base = 0):
config_bit_offset = get_config_bit_offset(context, module)
cur = module.logical_ports['cfg_o']
while True:
prev = cur.logical_source
if not prev.net_type.is_pin:
break
if prev.parent.model.is_leaf_module:
global_base = base + config_bit_offset[prev.parent.name]
local_base = 0
length = get_config_bit_count(context, prev.parent.model)
while local_base < length:
addr = global_base // 64
low = global_base % 64
high = min(low + length - local_base, 64)
num_bits = high - low
config.append( (
'{}{}.cfg_d[{}:{}]'.format(prefix, prev.parent.name, local_base + num_bits - 1, local_base),
addr, low, high - 1) )
global_base += num_bits
local_base += num_bits
else:
_update_config_list(context, prev.parent.model, config,
prefix + prev.parent.name + '.', base + config_bit_offset[prev.parent.name])
cur = prev.parent.logical_pins['cfg_i']
def __config_bit_offset_instance(self, hierarchy):
total = 0
for instance in hierarchy:
config_bit_offsets = get_config_bit_offset(self.context, instance.parent)
config_bit_offset = config_bit_offsets.get(instance.name)
if config_bit_offset is None:
return None
total += config_bit_offset
return total
def fasm_features_for_routing_switch(self, hierarchical_switch_input):
hierarchy, input_port = hierarchical_switch_input
switch_instance = hierarchy[-1]
hierarchy = hierarchy[:-1]
module = hierarchy[-1].model
config_bit_base = self.__config_bit_offset_instance(hierarchy)
config_bit_offset = get_config_bit_offset(self.context, module).get(switch_instance.name)
if config_bit_offset is None:
raise PRGAInternalError("No configuration circuitry for switch '{}'"
.format(switch_instance))
config_bits = input_port.index
retval = []
while config_bits:
if config_bits % 2 == 1:
retval.append('b' + str(config_bit_base + config_bit_offset))
config_bits = config_bits // 2
config_bit_offset += 1
return tuple(iter(retval))
def fasm_mux_for_intrablock_switch(self, source, sink, hierarchy):
module = source.parent if source.net_type.is_port else source.parent.parent
config_bit_base = 0 if not hierarchy else self.__config_bit_offset_instance(hierarchy)
config_bit_offsets = get_config_bit_offset(self.context, module)
path = get_switch_path(self.context, source, sink)
retval = []
for bit in path:
config_bits = bit.index
config_bit_offset = config_bit_offsets.get(bit.parent.name, None)
if config_bit_offset is None:
raise PRGAInternalError("No configuration circuitry for switch '{}'"
.format(bit.parent))
config_bit_offset += config_bit_base
while config_bits:
if config_bits % 2 == 1:
retval.append('b' + str(config_bit_offset))
config_bits = config_bits // 2
config_bit_offset += 1
return retval