def PSB_read_latched(segment, gates, t_ramp, t_read, p_0, p_1, p_2, disable_trigger=False):
'''
pulse able to perform a psb readout
Args:
segment (segment_container) : segment to which to add this stuff
gates (tuple<str>) : plunger gate names
t_ramp (double) : time to linearly ramp trought the anticrossing
t_read (double) : readout time
p_0 (tuple <double>) : starting point
p_1 (tuple <double>) : point after the anticrossing
p_2 (tuple <double>) : effective point where the averaging should happen
disable_trigger (bool) : disable triggerig for digitizer, only for debuggig.
'''
# jump close to (1,1) -- (2,0) wait 100 ns
add_block(segment, 100, gates, p_0)
# pulse towards the window and stay for the measurment time
add_ramp(segment, t_ramp, gates, p_0, p_1)
add_ramp(segment, 10, gates, p_1, p_2)
if disable_trigger == False:
getattr(segment, gates[0]).add_HVI_marker("dig_trigger_1")
getattr(segment, gates[0]).add_HVI_variable("t_measure", t_read)
add_block(segment, t_read, gates, p_2)
def CROT_basic(segment,
gates,
v_exchange_pulse_off,
v_exchange_pulse_on,
gate_spec,
t_ramp,
padding=2):
'''
basic cphase, with a linear ramp
Args:
segment (segment_container) : segment to which to add this stuff
gates (tuple<str>) : gates to be pulses for this gate.
barrier_gate (str) : barrier to pulse (for the ac)
v_exchange_pulse (double) : voltage to pulse to
t_gate (double) : total time of the gate not inclusing the ramps
t_ramp (double) : ramp time
'''
add_ramp(segment, t_ramp, gates, v_exchange_pulse_off, v_exchange_pulse_on)
add_block(segment, padding, gates, v_exchange_pulse_on)
for gate, level in zip(gates, v_exchange_pulse_on):
getattr(segment,
gate).add_block(0, gate_spec.t_pulse + gate_spec.padding * 2,
level)
gate_spec.add(segment, reset=False)
segment.reset_time()
add_block(segment, padding, gates, v_exchange_pulse_on)
add_ramp(segment, t_ramp, gates, v_exchange_pulse_on, v_exchange_pulse_off)
def iswap_basic(segment,
gates,
barrier_gate,
v_exchange_pulse_off,
v_exchange_pulse_on,
v_ac,
f_ac,
t_gate,
t_ramp,
padding=2):
'''
basic iSWAP, with a linear ramp
Args:
segment (segment_container) : segment to which to add this stuff
gates (tuple<str>) : gates to be pulses for this gate.
barrier_gate (str) : barrier to pulse (for the ac)
v_exchange_pulse (double) : voltage to pulse to
t_gate (double) : total time of the gate not inclusing the ramps
t_ramp (double) : ramp time
'''
add_ramp(segment, t_ramp, gates, v_exchange_pulse_off, v_exchange_pulse_on)
add_block(segment, padding, gates, v_exchange_pulse_on)
for gate, level in zip(gates, v_exchange_pulse_on):
getattr(segment, gate).add_block(0, t_gate, level)
getattr(segment, barrier_gate).add_sin(0, t_gate, v_ac, f_ac)
segment.reset_time()
add_block(segment, padding, gates, v_exchange_pulse_on)
add_ramp(segment, t_ramp, gates, v_exchange_pulse_on, v_exchange_pulse_off)
def jump(segment, gates, t_ramp, p_0, p_1, reset_time=True, **kwargs):
'''
deperacted, use ramp instead.
Args:
segment (segment_container) : segment to which to add this stuff
gates (tuple<str>) : plunger gate names
t_ramp (double) : time to ramp from point 0 to point 1
p_0 (tuple <double>) : point where to start
p_1 (tuple <double>) : point where to end.
'''
add_ramp(segment, t_ramp, gates, p_0, p_1, reset_time)
def PSB_read_tc_ctrl(segment, gates, t_ramp, t_read, p_0, p_1, p_2, nth_readout, disable_trigger=False):
'''
pulse able to perform a psb readout, the tunnelcoupling is lowered at the end to make the pulse robust against T1 effects.
Args:
segment (segment_container) : segment to which to add this stuff
gates (tuple<str>) : plunger gate names
t_ramp (double) : time to linearly ramp trought the anticrossing
t_read (double) : readout time
p_0 (tuple <double>) : starting point
p_1 (tuple<double>) : point after the anticrossing, for readout, when the tunnel coupling is on
p_2 (tuple<double>) : point after the anticrossing, for readout, when the tunnel coupling oig odff
disable_trigger (bool) : disable triggerig for digitizer, only for debuggig.
'''
# pulse towards the window and stay for the measurment time
add_ramp(segment, t_ramp, gates, p_0, p_1)
add_ramp(segment, 10, gates, p_1, p_2)
if disable_trigger == False:
getattr(segment, gates[0]).add_HVI_marker("dig_trigger_{}".format(int(nth_readout)))
getattr(segment, gates[0]).add_HVI_variable("t_measure", t_read)
add_block(segment, t_read, gates, p_2)
add_ramp(segment, 10, gates, p_2, p_1)
add_ramp(segment, t_ramp, gates, p_1, p_0)
def pulse_in_out(segment, gates, t_ramp, t_wait, p_0, p_1, p_2, **kwargs):
'''
pulse sequence to go adiabatically trough an interdot.
The standard time to go from p_0 to p_1 and p_2 to p_3 is 100ns
Args:
segment (segment_container) : segment to which to add this stuff
gates (tuple<str>) : plunger gate names
t_ramp (double) : time to linearly ramp trought the anticrossing
t_wait (double) : time to wait at p1
p_0 (tuple <double>) : starting point
p_1 (tuple<double>) : point where to wait
'''
# move towards anti-crossing, standaard 100ns
add_ramp(segment, t_ramp, gates, p_0, p_1)
add_ramp(segment, t_ramp, gates, p_1, p_2)
# go though the anti-crossing
add_block(segment, t_wait, gates, p_2)
# move towards anti-crossing, standaard 100ns
add_ramp(segment, t_ramp, gates, p_2, p_1)
# move towards anti-crossing, standaard 100ns
add_ramp(segment, t_ramp, gates, p_1, p_0)
def pulse_intra(segment, gates, t_wait, t_ramp, p_0, p_1, **kwargs):
'''
pulse over a transition line of 1 dot (e.g. N=0->N=1).
first wait at p_0, the adiabatically ramp to p_1
Args:
segment (segment_container) : segment to which to add this stuff
gates (tuple<str>) : plunger gate names
t_wait (double) : time wait at p_0
p_0 (tuple <double>) : starting point
p_1 (tuple<double>) : end point after the ramp
'''
# wait a bit at the first point, e.g. make sure you are in the right charge state
add_block(segment, t_wait, gates, p_0)
# ramp slowly to where you want to be.
add_ramp(segment, t_ramp, gates, p_0, p_1)
def elzerman_basic(segment,
gates,
t_init,
t_ramp,
t_load,
t_read,
p_0,
p_1,
p_2,
p_3,
p_4,
disable_trigger=False,
**kwargs):
'''
pulse able to perform a psb readout
Args:
segment (segment_container) : segment to which to add this stuff
gates (tuple<str>) : plunger gate names
t_init (double) : initialisation time to eject electron
t_ramp (double) : time to ramp
t_load (double) : time to wait at the load stage
t_read (double) : readout time
p_0 (tuple <double>) : init point
p_1 (tuple <double>) : ramp start from N=0 to N=1
p_2 (tuple <double>) : ramp end from N=0 to N=1
p_3 (tuple <double>) : operating point
p_4 (tuple <double>) : point where to readout
disable_trigger (bool) : disable triggerig for digitizer, only for debuggig.
'''
# init
add_block(segment, t_init, gates, p_0)
# pulse towards the window and stay for the measurment time
add_ramp(segment, t_ramp, gates, p_1, p_2)
add_block(segment, t_load, gates, p_3)
if disable_trigger == False:
getattr(segment, gates[0]).add_HVI_marker("dig_wait")
getattr(segment, gates[0]).add_HVI_variable("t_measure", t_read)
add_block(segment, t_read, gates, p_4)
def PSB_read_multi(segment, gates, t_ramp, t_read, p_0, p_1, nth_readout=0, unmute=None, disable_trigger=False):
'''
pulse able to perform a psb readout
Args:
segment (segment_container) : segment to which to add this stuff
gates (tuple<str>) : plunger gate names
t_ramp (double) : time to linearly ramp trought the anticrossing
t_read (double) : readout time
p_0 (tuple <double>) : starting point
p_1 (tuple<double>) : point after the anticrossing, where the readout should happen.
disable_trigger (bool) : disable triggerig for digitizer, only for debuggig.
'''
# pulse towards the window and stay for the measurment time
add_ramp(segment, t_ramp, gates, p_0, p_1)
if unmute is not None:
getattr(segment, unmute).add_marker(0, t_read)
if disable_trigger == False:
getattr(segment, gates[0]).add_HVI_marker("dig_trigger_{}".format(int(nth_readout)))
getattr(segment, gates[0]).add_HVI_variable("t_measure", t_read)
add_block(segment, t_read, gates, p_1)
add_ramp(segment, t_ramp, gates, p_1, p_0)