예제 #1
0

@pycde.module
class Test:
    clk = pycde.Clock()

    @pycde.generator
    def build(ports):
        c1 = pycde.dialects.hw.ConstantOp(pycde.types.i1, 1)
        UnParameterized(clk=ports.clk, x=c1, appid=AppID("unparam",
                                                         0)).name = "unparam"
        UnParameterized(clk=ports.clk, x=c1, appid=AppID("unparam",
                                                         1)).name = "unparam"


t = pycde.System([Test], name="Test", output_directory=sys.argv[1])
t.generate(["construct"])
t.print()
# CHECK: msft.module @UnParameterized
# CHECK-NOT: msft.module @UnParameterized
Test.print()
UnParameterized.print()

print(PhysLocation(PrimitiveType.DSP, 39, 25))
# CHECK: PhysLocation<PrimitiveType.DSP, x:39, y:25, num:0>

# CHECK-LABEL: === Hierarchy
print("=== Hierarchy")
# CHECK-NEXT: <instance: []>
# CHECK-NEXT: <instance: [UnParameterized]>
# CHECK-NEXT: <instance: [UnParameterized, Nothing]>
예제 #2
0
# RUN: rm -rf %t
# RUN: %PYTHON% %s %t

# This is intended to be a simple 'tutorial' example.  Run it as a test to
# ensure that we keep it up to date (ensure it doesn't crash).

from pycde import dim, module, generator, types, Clock, Input, Output
import pycde

import sys


@module
class Mux:
    clk = Clock()
    data = Input(dim(8, 14))
    sel = Input(types.i4)

    out = Output(types.i8)

    @generator
    def build(ports):
        sel_reg = ports.sel.reg()
        ports.out = ports.data.reg()[sel_reg].reg()


t = pycde.System([Mux], name="MuxDemo", output_directory=sys.argv[1])
t.generate()
t.emit_outputs()
예제 #3
0
        connect(poly.x, x)
        PolynomialCompute(coefficients=Coefficients([62, 42, 6]))("example2",
                                                                  x=poly.y)
        PolynomialCompute(Coefficients([1, 2, 3, 4, 5]))("example2", x=poly.y)

        cp = CoolPolynomialCompute([4, 42])
        cp.x.connect(23)

        m = ExternWithParams(8, 3)()
        m.name = "pexternInst"

        ports.y = poly.y


poly = pycde.System([PolynomialSystem],
                    name="PolynomialSystem",
                    output_directory=sys.argv[1])
poly.print()

print("Generating 1...")
poly.generate(iters=1)

print("Printing...")
poly.print()
# CHECK-LABEL: msft.module @PolynomialSystem {} () -> (y: i32) attributes {fileName = "PolynomialSystem.sv"} {
# CHECK:         %example.y = msft.instance @example @PolyComputeForCoeff_62_42_6(%c23_i32) {msft.appid = #msft.appid<"poly"[0]>} : (i32) -> i32
# CHECK:         %example2.y = msft.instance @example2 @PolyComputeForCoeff_62_42_6(%example.y) : (i32) -> i32
# CHECK:         %example2_1.y = msft.instance @example2_1 @PolyComputeForCoeff_1_2_3_4_5(%example.y) : (i32) -> i32
# CHECK:         %CoolPolynomialCompute.y = msft.instance @CoolPolynomialCompute @supercooldevice(%{{.+}}) : (i32) -> i32
# CHECK:         msft.instance @M @parameterized_extern() <a: i64 = 8, b: i64 = 3> : () -> ()
# CHECK:         msft.output %example.y : i32
예제 #4
0
파일: esi.py 프로젝트: maerhart/circt
  @generator
  def construct(ports):
    data, valid = ports.int_in.unwrap(ready=1)


@module
class Top:
  clk = Input(types.i1)

  @generator
  def construct(ports):
    p = Producer(clk=ports.clk)
    Consumer(clk=ports.clk, int_in=p.const_out)


s = pycde.System([Top], name="EsiSys")
s.generate()
s.print()

# CHECK-LABEL: msft.module @Top {} (%clk: i1)
# CHECK:         %Producer.const_out = msft.instance @Producer @Producer(%clk)  : (i1) -> !esi.channel<i32>
# CHECK:         msft.instance @Consumer @Consumer(%clk, %Producer.const_out)  : (i1, !esi.channel<i32>) -> ()
# CHECK:         msft.output

# CHECK-LABEL: msft.module @Producer {} (%clk: i1) -> (const_out: !esi.channel<i32>)
# CHECK:         %c42_i32 = hw.constant 42 : i32
# CHECK:         %true = hw.constant true
# CHECK:         %chanOutput, %ready = esi.wrap.vr %c42_i32, %true : i32
# CHECK:         msft.output %chanOutput : !esi.channel<i32>

# CHECK-LABEL: msft.module @Consumer {} (%clk: i1, %int_in: !esi.channel<i32>)
예제 #5
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    output = Output(types.i8)

    @generator
    def build(ports):
        compreg = seq.CompRegOp(types.i8,
                                clk=ports.clk,
                                input=ports.input,
                                name="reg",
                                sym_name="reg")
        ports.output = compreg


appid = pycde.AppIDIndex()
loc = placement([], PrimitiveType.FF, 0, 0, 0)
appid.lookup(pycde.AppID("reg")).add_attribute(loc)

mod = pycde.System([CompReg], name="CompReg", output_directory=sys.argv[1])
mod.print()
mod.generate()
top_inst = mod.get_instance(CompReg)
top_inst.createdb()
top_inst.walk(appid.apply_attributes_visitor)
mod.print()
mod.emit_outputs()

# CHECK: reg [7:0] [[NAME:reg_.]];
# CHECK: always_ff @(posedge clk)
# CHECK: [[NAME]] <= {{.+}}

# TCL: set_location_assignment FF_X0_Y0_N0 -to $parent|reg_{{.}}
예제 #6
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    def construct(ports):
        ports.y = ports.x


@pycde.module
class Test:
    inputs = []
    outputs = []

    @pycde.generator
    def build(_):
        c1 = pycde.dialects.hw.ConstantOp(pycde.types.i1, 1)
        Parameterized(1)(x=c1)
        Parameterized(1)(x=c1)
        Parameterized(2)(x=c1)
        Parameterized(2)(x=c1)
        UnParameterized(x=c1)
        UnParameterized(x=c1)


# CHECK: hw.module @TestModule_param1
# CHECK-NOT: hw.module @TestModule_param1
# CHECK: hw.module @TestModule_param2
# CHECK-NOT: hw.module @TestModule_param2
# CHECK: hw.module @UnParameterized
# CHECK-NOT: hw.module @UnParameterized
t = pycde.System([Test])
t.generate()
t.run_passes()
t.print()
예제 #7
0
from pycde.dialects import comb, hw
from pycde import dim, module, generator, Input, Output


@module
def MyModule(SIZE: int):
    class Mod:
        inp = Input(dim(SIZE))
        out = Output(dim(SIZE))

        @generator
        def construct(mod):
            c1 = hw.ConstantOp(dim(SIZE), 1)
            # CHECK: %[[EQ:.+]] = comb.icmp eq
            eq = comb.EqOp(c1, mod.inp)
            # CHECK: %[[A1:.+]] = hw.array_create %[[EQ]], %[[EQ]]
            a1 = hw.ArrayCreateOp([eq, eq])
            # CHECK: %[[A2:.+]] = hw.array_create %[[EQ]], %[[EQ]]
            a2 = hw.ArrayCreateOp([eq, eq])
            # CHECK: %[[COMBINED:.+]] = hw.array_concat %[[A1]], %[[A2]]
            combined = hw.ArrayConcatOp(a1, a2)
            mod.out = hw.BitcastOp(dim(SIZE), combined)

    return Mod


mymod = MyModule(4)
module = pycde.System([mymod], name="mymod")
module.generate()
module.print()
예제 #8
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@module
class PlusPipeline:
    a = Input(types.i32)
    y = Output(types.i32)

    @generator
    def construct(mod):
        p1 = Plus(a=mod.a, b=mod.a)
        p2 = Plus(a=p1.y, b=mod.a, partition=TopLevel.part1)
        p3 = Plus(a=p2.y, b=mod.a)
        mod.y = p3.y


s = pycde.System([TopLevel],
                 name="DesignPartitionTest",
                 output_directory=sys.argv[1])

print("Generating...")
s.generate()

inst = s.get_instance(TopLevel)
inst.walk(lambda i: print(i))

s.cleanup()
s.print()
s.run_passes(partition=True)
s.emit_outputs()
print("************")
print("** Post pass/emit")
s.print()