def test_xor(self):
wires, vals = utils.make_inputs_and_values(7, exact_bitwidth=8, dist=utils.uniform_dist)
outwire = pyrtl.Output(name="test")
import operator
from six.moves import reduce
outwire <<= pyrtl.tree_reduce(operator.xor, wires)
out_vals = utils.sim_and_ret_out(outwire, wires, vals)
true_result = [reduce(operator.xor, v) for v in zip(*vals)]
self.assertEqual(out_vals, true_result)
def test_empty(self):
with self.assertRaises(pyrtl.PyrtlError):
import operator
pyrtl.tree_reduce(operator.add, [])
def test_empty(self):
with self.assertRaises(pyrtl.PyrtlError):
import operator
pyrtl.tree_reduce(operator.add, [])