예제 #1
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 def test_from_instruction(self):
     """Test initialization from an instruction."""
     target_vec = Statevector(np.dot(HGate().to_matrix(), [1, 0]))
     target = DensityMatrix(target_vec)
     rho = DensityMatrix.from_instruction(HGate())
     self.assertEqual(rho, target)
예제 #2
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 def test_controlled_h(self):
     """Test the creation of a controlled H gate."""
     self.assertEqual(HGate().control(), CHGate())
예제 #3
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    def run(self, dag):
        """
        Flips the cx nodes to match the directed coupling map.
        Args:
            dag (DAGCircuit): DAG to map.
        Returns:
            DAGCircuit: The rearranged dag for the coupling map

        Raises:
            MapperError: If the circuit cannot be mapped just by flipping the
                         cx nodes.
        """
        new_dag = DAGCircuit()

        if self.layout is None:
            # create a one-to-one layout
            self.layout = Layout()
            wire_no = 0
            for qreg in dag.qregs.values():
                for index in range(qreg.size):
                    self.layout[(qreg, index)] = wire_no
                    wire_no += 1

        for layer in dag.serial_layers():
            subdag = layer['graph']

            for cnot in subdag.get_cnot_nodes():

                control = cnot['op'].qargs[0]
                target = cnot['op'].qargs[1]

                physical_q0 = self.layout[control]
                physical_q1 = self.layout[target]
                if self.coupling_map.distance(physical_q0, physical_q1) != 1:
                    raise MapperError(
                        'The circuit requires a connectiontion between the phsycial '
                        'qubits %s and %s' % (physical_q0, physical_q1))

                if (physical_q0,
                        physical_q1) not in self.coupling_map.get_edges():
                    # A flip needs to be done

                    # Create the involved registers
                    if control[0] not in subdag.qregs.values():
                        subdag.add_qreg(control[0])
                    if target[0] not in subdag.qregs.values():
                        subdag.add_qreg(target[0])

                    # Add H gates around
                    subdag.add_basis_element('h', 1, 0, 0)
                    subdag.apply_operation_back(HGate(target))
                    subdag.apply_operation_back(HGate(control))
                    subdag.apply_operation_front(HGate(target))
                    subdag.apply_operation_front(HGate(control))

                    # Flips the CX
                    cnot['op'].qargs[0], cnot['op'].qargs[1] = target, control

            new_dag.extend_back(subdag)

        return new_dag
예제 #4
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 def test_controlled_h(self):
     """Test creation of controlled h gate"""
     self.assertEqual(HGate().control(), CHGate())
예제 #5
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 def test_from_instruction(self):
     """Test initialization from an instruction."""
     target = np.dot(HGate().to_matrix(), [1, 0])
     vec = Statevector.from_instruction(HGate()).data
     global_phase_equivalent = matrix_equal(vec, target, ignore_phase=True)
     self.assertTrue(global_phase_equivalent)
예제 #6
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 def _define(self):
     """V Gate definition."""
     q = QuantumRegister(1, 'q')
     self.definition = [(SdgGate(), [q[0]], []), (HGate(), [q[0]], [])]