def main():
args = cliparse()
if args.test:
tb_fsm = traceSignals(tb,tx,rx)
sim = Simulation(tb_fsm)
sim.run()
if args.convert:
convert(args)
if args.build:
build(args)
regbus = AvalonMM(glbl, data_width=8, address_width=16)
#elif bus_type == 'X':
# regbus = AXI4Lite(glbl, data_wdith=8, address_width=16)
else:
raise Exception("Invalid bus type {}".format(bus_type))
gbtn = button_controller(glbl, regbus, btns) # memmap controller
gled = led_peripheral(glbl, regbus, leds) # memmap peripheral
gmap = regbus.interconnect() # bus combiner
print(vars(regbus.regfiles['LED_000']))
return gbtn, gled, gmap
def build(args):
""" Run the FPGA tools
"""
pass
def getargs():
""" get CLI arguments
"""
pass
if __name__ == '__main__':
args = getargs()
build(args)
'lcd_on': Signal(bool(1)),
'lcd_resetn': Signal(bool(1)),
'lcd_csn': Signal(bool(1)),
'lcd_rs': Signal(bool(1)),
'lcd_wrn': Signal(bool(1)),
'lcd_rdn': Signal(bool(1)),
'lcd_data': Signal(intbv(0)[16:])
}
def build():
global brd, flow
brd = get_board('de1soc')
# print("get_Board value{}".format(brd))
# print("get_flow value{}".format(flow))
flow = brd.get_flow(top=de1_soc_lt24lcd)
flow.run()
def program():
global flow
if flow is not None:
flow.program()
if __name__ == '__main__':
build()
program()
'adc_sclk': Signal(bool(1)),
'i2c_sclk': Signal(bool(1)),
'i2c_sdat': TristateSignal(bool(0)),
'g_sensor_cs_n': Signal(bool(1)),
'g_sensor_int': Signal(bool(1)),
'lcd_on': Signal(bool(1)),
'lcd_resetn': Signal(bool(1)),
'lcd_csn': Signal(bool(1)),
'lcd_rs': Signal(bool(1)),
'lcd_wrn': Signal(bool(1)),
'lcd_rdn': Signal(bool(1)),
'lcd_data': Signal(intbv(0)[16:])
}
def build():
global brd, flow
brd = get_board('de0nano')
flow = brd.get_flow(top=de0nano_converters)
flow.run()
def program():
global flow
if flow is not None:
flow.program()
if __name__ == '__main__':
build()
program()
def main():
args = cliparse()
build(args)
def main():
args = cliparse()
build(args)
regbus = AvalonMM(glbl, data_width=8, address_width=16)
#elif bus_type == 'X':
# regbus = AXI4Lite(glbl, data_wdith=8, address_width=16)
else:
raise Exception("Invalid bus type {}".format(bus_type))
gbtn = button_controller(glbl, regbus, btns) # memmap controller
gled = led_peripheral(glbl, regbus, leds) # memmap peripheral
gmap = regbus.interconnect() # bus combiner
print(vars(regbus.regfiles['LED_000']))
return gbtn, gled, gmap
def build(args):
""" Run the FPGA tools
"""
pass
def getargs():
""" get CLI arguments
"""
pass
if __name__ == '__main__':
args = getargs()
build(args)
