def update_data(self):
"""
Update redis (caches config)
Pulls the table references for each interface.
"""
self.if_counters = \
{sai_id: Namespace.dbs_get_all(self.db_conn, mibs.COUNTERS_DB, mibs.counter_table(sai_id), blocking=True)
for sai_id in self.if_id_map}
rif_sai_ids = list(self.rif_port_map) + list(self.vlan_name_map)
self.rif_counters = \
{sai_id: Namespace.dbs_get_all(self.db_conn, mibs.COUNTERS_DB, mibs.counter_table(sai_id), blocking=True)
for sai_id in rif_sai_ids}
if self.rif_counters:
self.aggregate_counters()
self.lag_name_if_name_map, \
self.if_name_lag_name_map, \
self.oid_lag_name_map, \
self.lag_sai_map = Namespace.init_namespace_sync_d_lag_tables(self.db_conn)
self.if_range = sorted(
list(self.oid_sai_map.keys()) +
list(self.oid_lag_name_map.keys()) +
list(self.mgmt_oid_name_map.keys()) +
list(self.vlan_oid_name_map.keys()))
self.if_range = [(i, ) for i in self.if_range]
def reinit_data(self):
"""
Subclass update interface information
"""
self.if_name_map, \
self.if_alias_map, \
self.if_id_map, \
self.oid_sai_map, \
self.oid_name_map = Namespace.init_namespace_sync_d_interface_tables(self.db_conn)
self.lag_name_if_name_map, \
self.if_name_lag_name_map, \
self.oid_lag_name_map, _ = Namespace.init_namespace_sync_d_lag_tables(self.db_conn)
"""
db_conn - will have db_conn to all namespace DBs and
global db. First db in the list is global db.
Use first global db to get management interface table.
"""
self.mgmt_oid_name_map, \
self.mgmt_alias_map = mibs.init_mgmt_interface_tables(self.db_conn[0])
self.if_range = sorted(
list(self.oid_sai_map.keys()) +
list(self.oid_lag_name_map.keys()) +
list(self.mgmt_oid_name_map.keys()))
self.if_range = [(i, ) for i in self.if_range]
def test_init_sync_d_lag_tables(self):
db_conn = Namespace.init_namespace_dbs()
lag_name_if_name_map, \
if_name_lag_name_map, \
oid_lag_name_map = Namespace.init_namespace_sync_d_lag_tables(db_conn)
self.assertTrue(b"PortChannel04" in lag_name_if_name_map)
self.assertTrue(
lag_name_if_name_map[b"PortChannel04"] == [b"Ethernet124"])
self.assertTrue(b"Ethernet124" in if_name_lag_name_map)
self.assertTrue(
if_name_lag_name_map[b"Ethernet124"] == b"PortChannel04")
self.assertTrue(b"PortChannel_Temp" in lag_name_if_name_map)
self.assertTrue(lag_name_if_name_map[b"PortChannel_Temp"] == [])
def test_init_namespace_sync_d_lag_tables(self):
dbs = Namespace.init_namespace_dbs()
lag_name_if_name_map, \
if_name_lag_name_map, \
oid_lag_name_map, \
lag_sai_map = Namespace.init_namespace_sync_d_lag_tables(dbs)
#PortChannel in asic0 Namespace
self.assertTrue(b"PortChannel01" in lag_name_if_name_map)
self.assertTrue(b"Ethernet-BP0" in lag_name_if_name_map[b"PortChannel01"])
self.assertTrue(b"Ethernet-BP4" in lag_name_if_name_map[b"PortChannel01"])
#PortChannel in asic2 Namespace
self.assertTrue(b"PortChannel03" in lag_name_if_name_map)
self.assertTrue(b"Ethernet-BP16" in lag_name_if_name_map[b"PortChannel03"])
self.assertTrue(b"Ethernet-BP20" in lag_name_if_name_map[b"PortChannel03"])
self.assertTrue(b"PortChannel_Temp" in lag_name_if_name_map)
self.assertTrue(lag_name_if_name_map[b"PortChannel_Temp"] == [])
