def __init__(self, subcircuit_json):
self.__name__ = subcircuit_json["name"]
# Get components that make up subcircuit
elements = subcircuit_json["components"]
# Extract input and output nodes of subcircuit
ports = elements.pop('P')
nodes = []
for port in ports:
if port["node1"] == "gnd":
nodes.append(port["node2"])
elif port["node2"] == "gnd":
nodes.append(port["node1"])
self.__nodes__ = nodes[::-1]
# Initialize subcircuit netlist using PySpice SubCircuit module
SubCircuit.__init__(self, self.__name__, *self.__nodes__)
# build netlist
for element in elements:
if element == "R":
for resistor in elements["R"]:
self.R(resistor["id"], resistor["node1"], resistor["node2"], resistor["value"] @u_Ohm)
elif element == "L":
for inductor in elements["L"]:
self.L(inductor["id"], inductor["node1"], inductor["node2"], inductor["value"] @u_H)
elif element == "C":
for capacitor in elements["C"]:
self.C(capacitor["id"], capacitor["node1"], capacitor["node2"], capacitor["value"] @u_F)
def __init__(self, name, K, KI, AWG, MINV, MAXV):
# super().__init__()
SubCircuit.__init__(self, name, *self.__nodes__)
self.BehavioralSource(
'Vprop',
'prop',
self.gnd,
voltage_expression='{}*(V(In+)-V(In-))'.format(K),
)
self.BehavioralSource(
'Vsum',
'sum',
self.gnd,
voltage_expression='V(prop)+V(integ)',
)
self.BehavioralSource(
'Vdiffclip',
'overfl',
self.gnd,
voltage_expression='{}*(V(Out)-V(sum))'.format(AWG),
)
self.BehavioralSource(
'Vsum2',
'antiwind',
self.gnd,
voltage_expression='V(overfl)+V(prop)',
)
self.BehavioralSource(
'VClip',
'Out',
self.gnd,
voltage_expression='V(sum)< {0} ? {0} : V(sum) > {1} ? {1} : V(sum)'
.format(MINV, MAXV),
)
# integrator part - fixme with int model from NGSpice ?
self.VoltageControlledCurrentSource(
'I_Int',
'antiwind',
self.gnd,
self.gnd,
'integ',
multiplier=KI,
)
self.C('i', 'integ', self.gnd, 1)
self.R('i', 'integ', self.gnd, 1000000)
def __init__(self, name, K, KI, AWG, MINV, MAXV):
# super().__init__()
SubCircuit.__init__(self, name, *self.__nodes__)
self.BehavioralSource(
'Vprop',
'prop', self.gnd,
voltage_expression='{}*(V(In+)-V(In-))'.format(K),
)
self.BehavioralSource(
'Vsum',
'sum', self.gnd,
voltage_expression='V(prop)+V(integ)',
)
self.BehavioralSource(
'Vdiffclip',
'overfl', self.gnd,
voltage_expression='{}*(V(Out)-V(sum))'.format(AWG),
)
self.BehavioralSource(
'Vsum2',
'antiwind', self.gnd,
voltage_expression='V(overfl)+V(prop)',
)
self.BehavioralSource(
'VClip',
'Out', self.gnd,
voltage_expression='V(sum)< {0} ? {0} : V(sum) > {1} ? {1} : V(sum)'.format(MINV, MAXV),
)
# integrator part - fixme with int model from NGSpice ?
self.VoltageControlledCurrentSource(
'I_Int',
'antiwind', self.gnd, self.gnd,
'integ', multiplier=KI,
)
self.C('i', 'integ', self.gnd, 1)
self.R('i', 'integ', self.gnd, 1000000)
def __init__(self, name, R1=1 @ u_Ω, R2=2 @ u_Ω):
SubCircuit.__init__(self, name, *self.__nodes__)
self.R(1, 'n1', 'n2', R1)
self.R(2, 'n1', 'n2', R2)
def __init__(self):
super().__init__()
self.X('mos2', 'level2', 'd3', 'g3', 'v3')
self.subcircuit(Level2())
circuit = Circuit('Transistor output characteristics')
circuit.V('dd', 'd1', circuit.gnd, 2)
circuit.V('ss', 'vsss', circuit.gnd, 0)
circuit.V('sig', 'g1', 'vsss', 0)
circuit.X('mos1', 'level1', 'd1', 'g1', 'vsss')
if True:
circuit.subcircuit(Level1())
else:
subcircuit_level2 = SubCircuit('level2', 'd4', 'g4', 'v4')
subcircuit_level2.M(1,
'd4',
'g4',
'v4',
'v4',
model='nmos',
w=1e-5,
l=3.5e-7)
subcircuit_level1 = SubCircuit('level1', 'd3', 'g3', 'v3')
subcircuit_level1.X('mos2', 'level2', 'd3', 'g3', 'v3')
subcircuit_level1.subcircuit(subcircuit_level2)
circuit.subcircuit(subcircuit_level1)
self.X('mos2', 'level2', 'd3', 'g3', 'v3')
self.subcircuit(Level2())
circuit = Circuit('Transistor output characteristics')
circuit.V('dd', 'd1', circuit.gnd, 2)
circuit.V('ss', 'vsss', circuit.gnd, 0)
circuit.V('sig', 'g1', 'vsss', 0)
circuit.X('mos1', 'level1', 'd1', 'g1', 'vsss')
if True:
circuit.subcircuit(Level1())
else:
subcircuit_level2 = SubCircuit('level2', 'd4', 'g4', 'v4')
subcircuit_level2.M(1, 'd4', 'g4', 'v4', 'v4', model='nmos', w=1e-5, l=3.5e-7)
subcircuit_level1 = SubCircuit('level1', 'd3', 'g3', 'v3')
subcircuit_level1.X('mos2', 'level2', 'd3', 'g3', 'v3')
subcircuit_level1.subcircuit(subcircuit_level2)
circuit.subcircuit(subcircuit_level1)
print(str(circuit))
####################################################################################################
simulator = circuit.simulator(temperature=25, nominal_temperature=25)
analysis = simulator.dc(Vdd=slice(0, 5, .1)) # Fixme: ,Vsig=slice(1, 5, 1)
####################################################################################################
#?# vdd d1 0 2.0
import PySpice.Logging.Logging as Logging
logger = Logging.setup_logging()
####################################################################################################
from PySpice.Spice.Netlist import Circuit, SubCircuit
from PySpice.Unit.Units import *
####################################################################################################
circuit = Circuit('Regulator')
# Netlist.TwoPortElement
# .. warning:: As opposite to Spice, the input nodes are specified before the output nodes.
# circuit.VCVS(1, 1, 0, 2, 0, , milli(50))
gain = SubCircuit('GAIN', 1, 2, K=milli(20))
gain.VCVS(1, 1, 0, 2, 0, '{K}')
circuit.subcircuit(gain)
circuit.X(2, 'GAIN', 7, 6, K=milli(50))
print(str(circuit))
####################################################################################################
#
# End
#
####################################################################################################
####################################################################################################
import PySpice.Logging.Logging as Logging
logger = Logging.setup_logging()
####################################################################################################
from PySpice.Spice.Netlist import Circuit, SubCircuit
from PySpice.Unit.Units import *
####################################################################################################
circuit = Circuit('Test')
summer = SubCircuit('Sum', 1, 2, 3, K1=1.0, K2=1.0)
summer.BehavorialSource(1, 3, summer.gnd, v='{K1}*V(1) + {K2}*V(2)')
summer.BehavorialSource(2, 3, summer.gnd, voltage_expression='{K1}*V(1) + {K2}*V(2)')
print(summer.B1.v)
print(summer.B1.voltage_expression)
print(str(summer))
####################################################################################################
#
# End
#
####################################################################################################
from PySpice.Spice.Netlist import SubCircuit, Circuit
from PySpice.Unit import *
subcircuit_1N4148 = SubCircuit('1N4148', 1, 2)
subcircuit_1N4148.R('1', 1, 2, 5.827E+9)
subcircuit_1N4148.D('1', 1, 2, '1N4148')
subcircuit_1N4148.model('1N4148',
'D',
IS=4.352E-9,
N=1.906,
BV=110,
IBV=0.0001,
RS=0.6458,
CJO=7.048E-13,
VJ=0.869,
M=0.03,
FC=0.5,
TT=3.48E-9)
# print str(subcircuit_1N4148)
frequence = 50
perdiod = 1. / frequence
step_time = perdiod / 200
end_time = perdiod * 10
line_peak_voltage = 10
circuit = Circuit('Simple Rectifier', global_nodes=(0, 'out'))
circuit.subcircuit(subcircuit_1N4148)
circuit.V('input', 'in', circuit.gnd, 'DC 0V',
'SIN(0V {}V {}Hz)'.format(line_peak_voltage, frequence))