def rig(self,**kwargs):
# create registries
self.createRegistry("regRigTransform")
self.createRegistry("regRigShape")
# Check for module container
rootGrp = cmds.group( n = (self.name + "Rig_GRP"), em = True )
jointGrp = cmds.group( n = (self.name + "Joint_GRP"), em = True, p= rootGrp)
setupGrp = cmds.group( n = (self.name + "Setup_GRP"), em = True, p= rootGrp)
controlGrp = cmds.group( n = (self.name + "Control_GRP"), em = True, p= rootGrp)
# Get blueprinter joints
blueprinters = self.getBlueprinterJoints()
print blueprinters
for joint in blueprinters:
if cmds.objExists(joint) == False:
cmds.error(joint + " not found!")
# Duplicate joints
joints = Util.duplicateChain( self.name , blueprinters)
cmds.parent(joints[0],jointGrp)
if len(joints) > 3:
cmds.error("Too many joints in: " + self.name + "!")
# Create ikHandle
polePosition = Util.getPolePosition(joints, 3)
handleData = Util.createIkHandle(self.name, joints)
poleData = Util.createPoleVec(joints, handleData["IK"], polePosition)
cmds.parent(handleData["IK"], setupGrp)
cmds.parent(poleData, setupGrp)
# Create controls for handle
baseCtl = Util.createControl( (self.name + "Base"), {} )
ikCtl = Util.createControl( (self.name + "IK"), {"shape":"locator"} )
poleCtl = Util.createControl( (self.name + "Pole"), {"shape":"locator"} )
args = {"all" : 1, "mo" : 0}
Util.match(baseCtl[1], joints[0], args)
Util.match(ikCtl[1], joints[2], args)
Util.match(poleCtl[1], poleData, args)
Util.constrain(baseCtl[0], ikCtl[1], args={ "all":1, "mo":1, "name":(self.name + "IK")} )
Util.constrain(baseCtl[0], poleCtl[1], args={ "all":1, "mo":1, "name":(self.name + "IK")} )
baseConst = Util.constrain(baseCtl[0], joints[0], args={ "all":1, "name":(self.name + "Pole")} )
middleConst =Util.constrain(ikCtl[0], handleData["IK"], args={ "all":1, "name":(self.name + "IK")} )
poleConst = Util.constrain(poleCtl[0], poleData, args={ "all":1, "name":(self.name + "Pole")} )
cmds.parent(baseCtl[1], ikCtl[1], poleCtl[1], controlGrp)
cmds.parent(rootGrp, self.rootGrp)
# register Rigs
self.registerObjects((baseCtl + ikCtl + poleCtl), "regRigTransform")
