def cpsr_write_by_instr(self, value, bytemask, is_excp_return):
privileged = self.current_mode_is_not_user()
nmfi = self.sctlr.nmfi
if bit_at(bytemask, 3):
self.cpsr.value = set_substring(self.cpsr.value, 31, 27,
substring(value, 31, 27))
if is_excp_return:
self.cpsr.value = set_substring(self.cpsr.value, 26, 24,
substring(value, 26, 24))
if bit_at(bytemask, 2):
self.cpsr.value = set_substring(self.cpsr.value, 19, 16,
substring(value, 19, 16))
if bit_at(bytemask, 1):
if is_excp_return:
self.cpsr.value = set_substring(self.cpsr.value, 15, 10,
substring(value, 15, 10))
self.cpsr.value = set_bit_at(self.cpsr.value, 9, bit_at(value, 9))
if privileged and (self.is_secure() or self.scr.aw
or have_virt_ext()):
self.cpsr.value = set_bit_at(self.cpsr.value, 8,
bit_at(value, 8))
if bit_at(bytemask, 0):
if privileged:
self.cpsr.value = set_bit_at(self.cpsr.value, 7,
bit_at(value, 7))
if (privileged and (not nmfi or not bit_at(value, 6))
and (self.is_secure() or self.scr.fw or have_virt_ext())):
self.cpsr.value = set_bit_at(self.cpsr.value, 6,
bit_at(value, 6))
if is_excp_return:
self.cpsr.value = set_bit_at(self.cpsr.value, 5,
bit_at(value, 5))
if privileged:
value_mode = substring(value, 4, 0)
if self.bad_mode(value_mode):
print('unpredictable')
else:
if not self.is_secure() and value_mode == 0b10110:
print('unpredictable')
elif not self.is_secure(
) and value_mode == 0b10001 and self.nsacr.rfr:
print('unpredictable')
elif not self.scr.ns and value_mode == 0b11010:
print('unpredictable')
elif not self.is_secure(
) and self.cpsr.m != 0b11010 and value_mode == 0b11010:
print('unpredictable')
elif self.cpsr.m == 0b11010 and value_mode != 0b11010 and not is_excp_return:
print('unpredictable')
else:
self.cpsr.m = value_mode
def execute(self, processor):
if processor.condition_passed():
result = 0
m = processor.registers.get(self.m)
for i in range(32):
result = set_bit_at(result, 31 - i, bit_at(m, i))
processor.registers.set(self.d, result)
def execute(self, processor):
if processor.condition_passed():
n = processor.registers.get(self.n)
m = processor.registers.get(self.m)
sum1 = substring(n, 7, 0) + substring(m, 7, 0)
sum2 = substring(n, 15, 8) + substring(m, 15, 8)
sum3 = substring(n, 23, 16) + substring(m, 23, 16)
sum4 = substring(n, 31, 24) + substring(m, 31, 24)
d = set_substring(0, 7, 0, lower_chunk(sum1, 8))
d = set_substring(d, 15, 8, lower_chunk(sum2, 8))
d = set_substring(d, 23, 16, lower_chunk(sum3, 8))
d = set_substring(d, 31, 24, lower_chunk(sum4, 8))
processor.registers.set(self.d, d)
ge = set_bit_at(0, 0, 0b1 if sum1 >= 0x100 else 0b0)
ge = set_bit_at(ge, 1, 0b1 if sum2 >= 0x100 else 0b0)
ge = set_bit_at(ge, 2, 0b1 if sum3 >= 0x100 else 0b0)
ge = set_bit_at(ge, 3, 0b1 if sum4 >= 0x100 else 0b0)
processor.registers.cpsr.ge = ge
def from_bitarray(instr, processor):
registers_list = substring(instr, 7, 0)
m = bit_at(instr, 8)
registers = set_bit_at(registers_list, 14, m)
unaligned_allowed = False
if not registers:
print('unpredictable')
else:
return PushT1(instr, registers=registers, unaligned_allowed=unaligned_allowed)
def execute(self, processor):
if processor.condition_passed():
n = processor.registers.get(self.n)
m = processor.registers.get(self.m)
diff1 = substring(n, 7, 0) - substring(m, 7, 0)
diff2 = substring(n, 15, 8) - substring(m, 15, 8)
diff3 = substring(n, 23, 16) - substring(m, 23, 16)
diff4 = substring(n, 31, 24) - substring(m, 31, 24)
d = set_substring(0, 7, 0, lower_chunk(diff1, 8))
d = set_substring(d, 15, 8, lower_chunk(diff2, 8))
d = set_substring(d, 23, 16, lower_chunk(diff3, 8))
d = set_substring(d, 31, 24, lower_chunk(diff4, 8))
processor.registers.set(self.d, d)
ge = set_bit_at(0, 0, 0b1 if diff1 >= 0 else 0b0)
ge = set_bit_at(ge, 1, 0b1 if diff2 >= 0 else 0b0)
ge = set_bit_at(ge, 2, 0b1 if diff3 >= 0 else 0b0)
ge = set_bit_at(ge, 3, 0b1 if diff4 >= 0 else 0b0)
processor.registers.cpsr.ge = ge
def execute(self, processor):
if processor.condition_passed():
n = processor.registers.get(self.n)
m = processor.registers.get(self.m)
sum1 = to_signed(substring(n, 7, 0), 8) + to_signed(substring(m, 7, 0), 8)
sum2 = to_signed(substring(n, 15, 8), 8) + to_signed(substring(m, 15, 8), 8)
sum3 = to_signed(substring(n, 23, 16), 8) + to_signed(substring(m, 23, 16), 8)
sum4 = to_signed(substring(n, 31, 24), 8) + to_signed(substring(m, 31, 24), 8)
d = set_substring(0, 7, 0, to_unsigned(sum1, 8))
d = set_substring(d, 15, 8, to_unsigned(sum2, 8))
d = set_substring(d, 23, 16, to_unsigned(sum3, 8))
d = set_substring(d, 31, 24, to_unsigned(sum4, 8))
processor.registers.set(self.d, d)
ge = set_bit_at(0, 0, 0b1 if sum1 >= 0 else 0b0)
ge = set_bit_at(ge, 1, 0b1 if sum2 >= 0 else 0b0)
ge = set_bit_at(ge, 2, 0b1 if sum3 >= 0 else 0b0)
ge = set_bit_at(ge, 3, 0b1 if sum4 >= 0 else 0b0)
processor.registers.cpsr.ge = ge
def from_bitarray(instr, processor):
rt = substring(instr, 15, 12)
registers = set_bit_at(0, rt, 1)
unaligned_allowed = True
if rt == 13:
print('unpredictable')
else:
return PushA2(instr,
registers=registers,
unaligned_allowed=unaligned_allowed)
def from_bitarray(instr, processor):
rt = substring(instr, 15, 12)
registers = set_bit_at(0, rt, 1)
unaligned_allowed = True
if rt == 13 or (rt == 15 and processor.in_it_block()
and not processor.last_in_it_block()):
print('unpredictable')
else:
return PopThumbT3(instr,
registers=registers,
unaligned_allowed=unaligned_allowed)
def execute(self, processor):
if processor.condition_passed():
target = processor.registers.get(self.m)
if processor.registers.current_instr_set() == InstrSet.ARM:
next_instr_addr = processor.registers.get_pc() - 4
processor.registers.set_lr(next_instr_addr)
else:
next_instr_addr = processor.registers.get_pc() - 2
next_instr_addr = set_bit_at(next_instr_addr, 0, 1)
processor.registers.set_lr(next_instr_addr)
processor.bx_write_pc(target)
def execute(self, processor):
if processor.registers.current_mode_is_not_user():
cpsr_val = processor.registers.cpsr.value
if self.enable:
if self.affect_a:
cpsr_val = set_bit_at(cpsr_val, 8, 0)
if self.affect_i:
cpsr_val = set_bit_at(cpsr_val, 7, 0)
if self.affect_f:
cpsr_val = set_bit_at(cpsr_val, 6, 0)
if self.disable:
if self.affect_a:
cpsr_val = set_bit_at(cpsr_val, 8, 1)
if self.affect_i:
cpsr_val = set_bit_at(cpsr_val, 7, 1)
if self.affect_f:
cpsr_val = set_bit_at(cpsr_val, 6, 1)
if self.change_mode:
cpsr_val = set_substring(cpsr_val, 4, 0, self.mode)
processor.registers.cpsr_write_by_instr(cpsr_val, 0b1111, False)
def __setitem__(self, item, value):
if isinstance(item, int):
self.value = set_bit_at(self.value, item, value)
return
self.value = set_substring(self.value, item.start, item.stop, value)
def _set_at(self, index, value):
self.value = set_bit_at(self.value, index, value)