Exemplo n.º 1
0
 def from_bitarray(instr, processor):
     rn = substring(instr, 2, 0)
     imm5 = substring(instr, 7, 3)
     i = bit_at(instr, 9)
     nonzero = bit_at(instr, 11)
     imm32 = chain(i, imm5, 5) << 2
     return CbzT1(instr, nonzero=nonzero, n=rn, imm32=imm32)
Exemplo n.º 2
0
 def from_bitarray(instr, processor):
     coproc = substring(instr, 11, 8)
     rt = substring(instr, 15, 12)
     if substring(coproc, 3, 1) == 0b101:
         raise UndefinedInstructionException()
     else:
         return MrcMrc2A2(instr, cp=coproc, t=rt)
Exemplo n.º 3
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 def from_bitarray(instr, processor):
     rm = substring(instr, 3, 0)
     imm5 = substring(instr, 11, 7)
     rd = substring(instr, 15, 12)
     s = bit_at(instr, 20)
     shift_t, shift_n = decode_imm_shift(0b11, imm5)
     return RorImmediateA1(instr, setflags=s, m=rm, d=rd, shift_n=shift_n)
Exemplo n.º 4
0
 def from_bitarray(instr, processor):
     mode = substring(instr, 4, 0)
     affect_f = bit_at(instr, 5)
     affect_i = bit_at(instr, 6)
     affect_a = bit_at(instr, 7)
     change_mode = bit_at(instr, 8)
     imod = substring(instr, 10, 9)
     imod_1 = bit_at(imod, 1)
     enable = imod == 0b10
     disable = imod == 0b11
     if (mode != 0b00000 and not change_mode) or (
             imod_1 and not affect_a and not affect_f and not affect_i) or (
                 not imod_1 and
                 (affect_a or affect_i
                  or affect_f)) or imod == 0b01 or processor.in_it_block():
         print('unpredictable')
     else:
         return CpsThumbT2(instr,
                           affect_a=affect_a,
                           affect_i=affect_i,
                           affect_f=affect_f,
                           enable=enable,
                           disable=disable,
                           change_mode=change_mode,
                           mode=mode)
Exemplo n.º 5
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 def execute(self, processor):
     if processor.condition_passed():
         try:
             processor.null_check_if_thumbee(15)
         except EndOfInstruction:
             pass
         else:
             pc = align(processor.registers.get_pc(), 4)
             address = bits_add(pc, self.imm32,
                                32) if self.add else bits_sub(
                                    pc, self.imm32, 32)
             if have_lpae() and substring(address, 2, 0) == 0b000:
                 data = processor.mem_a_get(address, 8)
                 if processor.big_endian():
                     processor.registers.set(self.t,
                                             substring(data, 63, 32))
                     processor.registers.set(self.t2,
                                             substring(data, 31, 0))
                 else:
                     processor.registers.set(self.t, substring(data, 31, 0))
                     processor.registers.set(self.t2,
                                             substring(data, 63, 32))
             else:
                 processor.registers.set(self.t,
                                         processor.mem_a_get(address, 4))
                 processor.registers.set(
                     self.t2,
                     processor.mem_a_get(bits_add(address, 4, 32), 4))
Exemplo n.º 6
0
 def from_bitarray(instr, processor):
     rt = substring(instr, 15, 12)
     rn = substring(instr, 19, 16)
     if rt in (13, 15) or rn == 15:
         print('unpredictable')
     else:
         return LdrexbT1(instr, t=rt, n=rn)
def decode_instruction(instr):
    op1 = substring(instr, 21, 20)
    op2 = substring(instr, 5, 4)
    if op1 == 0b00 and op2 == 0b00:
        # Saturating Add
        return QaddT1
    elif op1 == 0b00 and op2 == 0b01:
        # Saturating Double and Add
        return QdaddT1
    elif op1 == 0b00 and op2 == 0b10:
        # Saturating Subtract
        return QsubT1
    elif op1 == 0b00 and op2 == 0b11:
        # Saturating Double and Subtract
        return QdsubT1
    elif op1 == 0b01 and op2 == 0b00:
        # Byte-Reverse Word
        return RevT2
    elif op1 == 0b01 and op2 == 0b01:
        # Byte-Reverse Packed Halfword
        return Rev16T2
    elif op1 == 0b01 and op2 == 0b10:
        # Reverse Bits
        return RbitT1
    elif op1 == 0b01 and op2 == 0b11:
        # Byte-Reverse Signed Halfword
        return RevshT2
    elif op1 == 0b10 and op2 == 0b00:
        # Select Bytes
        return SelT1
    elif op1 == 0b11 and op2 == 0b00:
        # Count Leading Zeros
        return ClzT1
Exemplo n.º 8
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 def from_bitarray(instr, processor):
     imm12 = substring(instr, 11, 0)
     rd = substring(instr, 15, 12)
     rn = substring(instr, 19, 16)
     setflags = bit_at(instr, 20)
     imm32 = arm_expand_imm(imm12)
     return RsbImmediateA1(instr, setflags=setflags, d=rd, n=rn, imm32=imm32)
Exemplo n.º 9
0
 def from_bitarray(instr, processor):
     coproc = substring(instr, 11, 8)
     rt = substring(instr, 15, 12)
     if rt == 15 or rt == 13:
         print('unpredictable')
     else:
         return McrMcr2T1(instr, cp=coproc, t=rt)
Exemplo n.º 10
0
 def from_bitarray(instr, processor):
     rm = substring(instr, 3, 0)
     rd = substring(instr, 15, 12)
     if rm == 15 or rd == 15:
         print('unpredictable')
     else:
         return RevshA1(instr, m=rm, d=rd)
Exemplo n.º 11
0
 def from_bitarray(instr, processor):
     mask = substring(instr, 3, 0)
     first_cond = substring(instr, 7, 4)
     if first_cond == 0b1111 or (first_cond == 0b1110 and bit_count(mask, 1, 4) != 1) or processor.in_it_block():
         print('unpredictable')
     else:
         return ItT1(instr, firstcond=first_cond, mask=mask)
Exemplo n.º 12
0
 def from_bitarray(instr, processor):
     rd = substring(instr, 2, 0)
     rm = substring(instr, 5, 3)
     if processor.in_it_block():
         print('unpredictable')
     else:
         return MovRegisterThumbT2(instr, m=rm, d=rd, setflags=True)
def decode_instruction(instr):
    instr_op1 = substring(instr, 10, 8)
    instr_op2 = substring(instr, 7, 0)
    if instr_op1 != 0b000:
        # Change Processor State
        return CpsThumbT2
    elif instr_op2 == 0b00000000:
        # No Operation hint
        return NopT2
    elif instr_op2 == 0b00000001:
        # Yield hint
        return YieldT2
    elif instr_op2 == 0b00000010:
        # Wait For Event hint
        return WfeT2
    elif instr_op2 == 0b00000011:
        # Wait For Interrupt hint
        return WfiT2
    elif instr_op2 == 0b00000100:
        # Send Event hint
        return SevT2
    elif substring(instr, 7, 4) == 0b1111:
        # Debug hint
        # armv7, will not be implemented
        raise NotImplementedError()
Exemplo n.º 14
0
def decode_instruction(instr):
    instr_op = substring(instr, 24, 21)
    instr_rd = substring(instr, 11, 8)
    instr_s = bit_at(instr, 20)
    instr_rn = substring(instr, 19, 16)
    if instr_op == 0b0000 and not (instr_rd == 0b1111 and instr_s):
        # Bitwise AND
        return AndImmediateT1
    elif instr_op == 0b0000 and (instr_rd == 0b1111 and instr_s):
        # Test
        return TstImmediateT1
    elif instr_op == 0b0001:
        # Bitwise Bit Clear
        return BicImmediateT1
    elif instr_op == 0b0010 and instr_rn != 0b1111:
        # Bitwise OR
        return OrrImmediateT1
    elif instr_op == 0b0010 and instr_rn == 0b1111:
        # Move
        return MovImmediateT2
    elif instr_op == 0b0011 and instr_rn != 0b1111:
        # Bitwise OR NOT
        return OrnImmediateT1
    elif instr_op == 0b0011 and instr_rn == 0b1111:
        # Bitwise NOT
        return MvnImmediateT1
    elif instr_op == 0b0100 and not (instr_rd == 0b1111 and instr_s):
        # Bitwise Exclusive OR
        return EorImmediateT1
    elif instr_op == 0b0100 and (instr_rd == 0b1111 and instr_s):
        # Test Equivalence
        return TeqImmediateT1
    elif instr_op == 0b1000 and not (instr_rd == 0b1111 and instr_s):
        # Add
        if instr_rn == 0b1101:
            return AddSpPlusImmediateT3
        else:
            return AddImmediateThumbT3
    elif instr_op == 0b1000 and (instr_rd == 0b1111 and instr_s):
        # Compare Negative
        return CmnImmediateT1
    elif instr_op == 0b1010:
        # Add with Carry
        return AdcImmediateT1
    elif instr_op == 0b1011:
        # Subtract with Carry
        return SbcImmediateT1
    elif instr_op == 0b1101 and not (instr_rd == 0b1111 and instr_s):
        # Subtract
        if instr_rn == 0b1101:
            return SubSpMinusImmediateT2
        else:
            return SubImmediateThumbT3
    elif instr_op == 0b1101 and (instr_rd == 0b1111 and instr_s):
        # Compare
        return CmpImmediateT2
    elif instr_op == 0b1110:
        # Reverse Subtract
        return RsbImmediateT2
Exemplo n.º 15
0
 def from_bitarray(instr, processor):
     saturate_to = substring(instr, 3, 0)
     rd = substring(instr, 11, 8)
     rn = substring(instr, 19, 16)
     if rd in (13, 15) or rn in (13, 15):
         print('unpredictable')
     else:
         return Usat16T1(instr, saturate_to=saturate_to, d=rd, n=rn)
Exemplo n.º 16
0
 def from_bitarray(instr, processor):
     imm32 = substring(instr, 11, 0)
     rt = substring(instr, 15, 12)
     add = bit_at(instr, 23)
     if rt == 13:
         print('unpredictable')
     else:
         return LdrhLiteralT1(instr, add=add, imm32=imm32, t=rt)
Exemplo n.º 17
0
 def from_bitarray(instr, processor):
     rt = substring(instr, 15, 12)
     rn = substring(instr, 19, 16)
     imm32 = 0
     if rn == 15 or rt == 15:
         print('unpredictable')
     else:
         return LdrexA1(instr, imm32=imm32, t=rt, n=rn)
Exemplo n.º 18
0
 def from_bitarray(instr, processor):
     rdm = substring(instr, 2, 0)
     rn = substring(instr, 5, 3)
     setflags = not processor.in_it_block()
     if arch_version() < 6 and rdm == rn:
         print('unpredictable')
     else:
         return MulT1(instr, setflags=setflags, m=rdm, d=rdm, n=rn)
Exemplo n.º 19
0
 def from_bitarray(instr, processor):
     imm32 = substring(instr, 11, 0)
     rt = substring(instr, 15, 12)
     add = bit_at(instr, 23)
     if rt == 15 and processor.in_it_block() and not processor.last_in_it_block():
         print('unpredictable')
     else:
         return LdrLiteralT2(instr, add=add, imm32=imm32, t=rt)
Exemplo n.º 20
0
 def from_bitarray(instr, processor):
     rm = substring(instr, 3, 0)
     rd = substring(instr, 15, 12)
     rn = substring(instr, 19, 16)
     if rd == 15 or rn == 15 or rm == 15:
         print('unpredictable')
     else:
         return Shadd16A1(instr, m=rm, d=rd, n=rn)
Exemplo n.º 21
0
 def from_bitarray(instr, processor):
     rd = substring(instr, 3, 0)
     rt = substring(instr, 15, 12)
     rn = substring(instr, 19, 16)
     if rd in (13, 15) or rt in (13, 15) or rn == 15 or rd == rn or rd == rt:
         print('unpredictable')
     else:
         return StrexhT1(instr, t=rt, d=rd, n=rn)
Exemplo n.º 22
0
 def from_bitarray(instr, processor):
     registers = substring(instr, 7, 0)
     rn = substring(instr, 10, 8)
     wback = bit_at(registers, rn) == 0
     if not registers:
         print('unpredictable')
     else:
         return LdmThumbT1(instr, wback=wback, registers=registers, n=rn)
Exemplo n.º 23
0
 def from_bitarray(instr, processor):
     rm = substring(instr, 3, 0)
     rd = substring(instr, 11, 8)
     rm1 = substring(instr, 19, 16)
     if rm in (13, 15) or rd in (13, 15) or rm != rm1:
         print('unpredictable')
     else:
         return RbitT1(instr, m=rm, d=rd)
Exemplo n.º 24
0
 def from_bitarray(instr, processor):
     rn = substring(instr, 3, 0)
     rd = substring(instr, 15, 12)
     saturate_to = substring(instr, 19, 16)
     if rd == 15 or rn == 15:
         print('unpredictable')
     else:
         return Usat16A1(instr, saturate_to=saturate_to, d=rd, n=rn)
Exemplo n.º 25
0
 def from_bitarray(instr, processor):
     rm = substring(instr, 3, 0)
     rd = substring(instr, 11, 8)
     rn = substring(instr, 19, 16)
     if rd in (13, 15) or rn in (13, 15) or rm in (13, 15):
         print('unpredictable')
     else:
         return QdaddT1(instr, m=rm, d=rd, n=rn)
Exemplo n.º 26
0
 def from_bitarray(instr, processor):
     coproc = substring(instr, 11, 8)
     rt = substring(instr, 15, 12)
     rt2 = substring(instr, 19, 16)
     if rt == 15 or rt2 == 15 or (rt == 13 or rt2 == 13):
         print('unpredictable')
     else:
         return McrrMcrr2T1(instr, cp=coproc, t=rt, t2=rt2)
Exemplo n.º 27
0
 def from_bitarray(instr, processor):
     rt2 = substring(instr, 11, 8)
     rt = substring(instr, 15, 12)
     rn = substring(instr, 19, 16)
     if rt in (13, 15) or rt2 in (13, 15) or rn == 15 or rt2 == rt:
         print('unpredictable')
     else:
         return LdrexdT1(instr, t=rt, t2=rt2, n=rn)
Exemplo n.º 28
0
 def from_bitarray(instr, processor):
     rm = substring(instr, 3, 0)
     rd = substring(instr, 11, 8)
     setflags = bit_at(instr, 20)
     if rd in (13, 15) or rm in (13, 15):
         print('unpredictable')
     else:
         return RrxT1(instr, setflags=setflags, m=rm, d=rd)
Exemplo n.º 29
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 def from_bitarray(instr, processor):
     rd = substring(instr, 2, 0)
     rn = substring(instr, 5, 3)
     rm = substring(instr, 8, 6)
     set_flags = not processor.in_it_block()
     shift_t = SRType.LSL
     shift_n = 0
     return SubRegisterT1(instr, setflags=set_flags, m=rm, d=rd, n=rn, shift_t=shift_t, shift_n=shift_n)
Exemplo n.º 30
0
 def from_bitarray(instr, processor):
     lsb = substring(instr, 11, 7)
     rd = substring(instr, 15, 12)
     msb = substring(instr, 20, 16)
     if rd == 15:
         print('unpredictable')
     else:
         return BfcA1(instr, lsbit=lsb, msbit=msb, d=rd)