def run_main(prj: BagProject, args: argparse.Namespace) -> None:
if args.run_drc:
print('Running DRC')
success, log = prj.run_drc(args.lib, args.cell)
if success:
print('DRC passed!')
else:
print('DRC failed...')
print(f'log file: {log}')
elif args.run_lvs:
mode = 'LVS_RCX' if args.run_rcx else 'LVS'
print(f'Running {mode}')
success, log = prj.run_lvs(args.lib, args.cell, run_rcx=args.run_rcx)
if success:
print(f'{mode} passed!')
else:
print(f'{mode} failed...')
print(f'log file: {log}')
elif args.run_rcx:
print('Running RCX')
netlist, log = prj.run_rcx(args.lib, args.cell)
if netlist:
print('RCX passed!')
else:
print('RCX failed...')
print(f'log file: {log}')
else:
print('No operation specifiied, do nothing.')
def run_main(prj: BagProject, gen_sch: bool = True, gen_cdl: bool = True, run_lvs: bool = True) \
-> None:
lib_name = 'AAA_XBASE_TEST'
fname = '00_mom_cap.yaml'
impl_cell = 'MOMCap_core'
fname_cdl = 'pvs_run/lvs_run_dir/' + lib_name + '/' + impl_cell + '/schematic.net'
params = read_yaml(Path('specs_test', 'xbase', fname))
db = TemplateDB(prj.grid, lib_name, prj=prj)
print('creating new template')
master = db.new_template(MOMCapCore, params)
print('creating batch layout')
# db.batch_layout([(master, '')], DesignOutput.LAYOUT)
db.batch_layout([(master, impl_cell)], DesignOutput.LAYOUT)
print('done')
if gen_sch or gen_cdl:
sch_db = ModuleDB(prj.tech_info, lib_name, prj=prj)
sch_master = sch_db.new_master(xbase__momcap_core, master.sch_params)
cv_info_list = []
print('creating schematic')
sch_db.batch_schematic([(sch_master, impl_cell)],
cv_info_out=cv_info_list)
print('schematic creation done')
if gen_cdl:
print('creating CDL netlist')
sch_db.batch_schematic([(sch_master, impl_cell)],
output=DesignOutput.CDL,
fname=fname_cdl,
cv_info_list=cv_info_list)
print('netlist creation done')
if run_lvs:
print('Running LVS ...')
lvs_passed, lvs_log = prj.run_lvs(lib_name,
impl_cell,
netlist=fname_cdl)
print('LVS log file:' + lvs_log)
if lvs_passed:
print('LVS passed!')
else:
print('LVS failed :(')