def local_check(self, a, final_verification=False):
""" check both LVS and DRC rules for the layout"""
tempspice = OPTS.AMC_temp + "temp.sp"
tempgds = OPTS.AMC_temp + "temp.gds"
a.sp_write(tempspice)
a.gds_write(tempgds)
import calibre
try:
self.assertTrue(
calibre.run_lvs(a.name, tempgds, tempspice, final_verification)
== 0)
except:
self.reset()
self.fail("LVS mismatch: {}".format(a.name))
self.reset()
try:
self.assertTrue(calibre.run_drc(a.name, tempgds) == 0)
except:
self.reset()
test = os.listdir(OPTS.AMC_temp)
self.fail("DRC failed: {}".format(a.name))
if OPTS.purge_temp:
self.cleanup()
def DRC(self):
"""Checks DRC for a module"""
if OPTS.check_lvsdrc:
tempgds = OPTS.openram_temp + "/temp.gds"
self.gds_write(tempgds)
assert calibre.run_drc(self.name, tempgds) == 0
os.remove(tempgds)
def local_check(self, tx):
tempspice = OPTS.openram_temp + "temp.sp"
tempgds = OPTS.openram_temp + "temp.gds"
tx.sp_write(tempspice)
tx.gds_write(tempgds)
self.assertFalse(calibre.run_drc(tx.name, tempgds))
self.assertFalse(calibre.run_lvs(tx.name, tempgds, tempspice))
def local_check(self, pc):
tempspice = OPTS.openram_temp + "temp.sp"
tempgds = OPTS.openram_temp + "temp.gds"
pc.sp_write(tempspice)
pc.gds_write(tempgds)
self.assertFalse(calibre.run_drc(pc.name, tempgds))
self.assertFalse(calibre.run_lvs(pc.name, tempgds, tempspice))
def DRC(self):
"""Checks DRC for a module"""
if OPTS.check_lvsdrc:
tempgds = OPTS.openram_temp + "/temp.gds"
self.gds_write(tempgds)
debug.check(
calibre.run_drc(self.name, tempgds) == 0,
"DRC failed for {0}".format(self.name))
os.remove(tempgds)
def local_check(self, a):
tempspice = OPTS.openram_temp + "temp.sp"
tempgds = OPTS.openram_temp + "temp.gds"
temppdf = OPTS.openram_temp + "temp.pdf"
a.sp_write(tempspice)
a.gds_write(tempgds)
self.assertFalse(calibre.run_drc(a.name, tempgds))
self.assertFalse(calibre.run_lvs(a.name, tempgds, tempspice))
def local_check(self, fet):
tempspice = OPTS.openram_temp + "temp.sp"
tempgds = OPTS.openram_temp + "temp.gds"
fet.sp_write(tempspice)
fet.gds_write(tempgds)
self.assertFalse(calibre.run_drc(fet.name, tempgds))
os.remove(tempspice)
os.remove(tempgds)
def DRC_LVS(self):
"""Checks both DRC and LVS for a module"""
if OPTS.check_lvsdrc:
tempspice = OPTS.openram_temp + "/temp.sp"
tempgds = OPTS.openram_temp + "/temp.gds"
self.sp_write(tempspice)
self.gds_write(tempgds)
assert calibre.run_drc(self.name, tempgds) == 0
assert calibre.run_lvs(self.name, tempgds, tempspice) == 0
os.remove(tempspice)
os.remove(tempgds)
def local_check(self, a):
tempspice = OPTS.openram_temp + "temp.sp"
tempgds = OPTS.openram_temp + "temp.gds"
a.sp_write(tempspice)
a.gds_write(tempgds)
self.assertFalse(calibre.run_drc(a.name, tempgds))
self.assertFalse(calibre.run_lvs(a.name, tempgds, tempspice))
#self.assertFalse(calibre.run_pex(a.name, tempgds, tempspice, output=OPTS.openram_temp+"temp_pex.sp"))
os.remove(tempspice)
os.remove(tempgds)
def local_check(self, a):
tempspice = OPTS.openram_temp + "temp.sp"
tempgds = OPTS.openram_temp + "temp.gds"
a.sp_write(tempspice)
a.gds_write(tempgds)
self.assertFalse(calibre.run_drc(a.name, tempgds))
self.assertFalse(calibre.run_lvs(a.name, tempgds, tempspice))
os.remove(tempspice)
os.remove(tempgds)
OPTS.check_lvsdrc = True
def local_drc_check(self, w):
""" check only DRC rules for the layout"""
tempgds = OPTS.AMC_temp + "temp.gds"
w.gds_write(tempgds)
import calibre
try:
self.assertTrue(calibre.run_drc(w.name, tempgds)==0)
except:
self.reset()
self.fail("DRC failed: {}".format(w.name))
if OPTS.purge_temp:
self.cleanup()
def DRC_LVS(self):
"""Checks both DRC and LVS for a module"""
if OPTS.check_lvsdrc:
tempspice = OPTS.openram_temp + "/temp.sp"
tempgds = OPTS.openram_temp + "/temp.gds"
self.sp_write(tempspice)
self.gds_write(tempgds)
debug.check(
calibre.run_drc(self.name, tempgds) == 0,
"DRC failed for {0}".format(self.name))
debug.check(
calibre.run_lvs(self.name, tempgds, tempspice) == 0,
"LVS failed for {0}".format(self.name))
os.remove(tempspice)
os.remove(tempgds)
def runTest(self):
globals.init_openram("config_20_{0}".format(OPTS.tech_name))
(gds_dir, gds_files) = setup_files()
drc_errors = 0
debug.info(1, "\nPerforming DRC on: " + ", ".join(gds_files))
for f in gds_files:
name = re.sub('\.gds$', '', f)
gds_name = "{0}/{1}".format(gds_dir, f)
if not os.path.isfile(gds_name):
drc_errors += 1
debug.error("Missing GDS file: {}".format(gds_name))
drc_errors += calibre.run_drc(name, gds_name)
# fails if there are any DRC errors on any cells
self.assertEqual(drc_errors, 0)
def local_check(self, a):
tempspice = OPTS.openram_temp + "temp.sp"
tempgds = OPTS.openram_temp + "temp.gds"
a.sp_write(tempspice)
a.gds_write(tempgds)
self.assertFalse(calibre.run_drc(a.name, tempgds))
self.assertFalse(calibre.run_lvs(a.name, tempgds, tempspice))
os.remove(tempspice)
os.remove(tempgds)
# reset the static duplicate name checker for unit tests
import design
design.design.name_map=[]
def local_drc_check(self, w):
""" check only DRC rules for the layout"""
tempgds = OPTS.AMC_temp + "temp.gds"
w.gds_write(tempgds)
import calibre
try:
self.assertTrue(calibre.run_drc(w.name, tempgds) == 0)
except:
self.reset()
# removing density and ESD drc errors for unit tests only
test = os.listdir(OPTS.AMC_temp)
self.fail("DRC failed: {}".format(w.name))
if OPTS.purge_temp:
self.cleanup()
def generate_pex(self, test_module, path):
tempspice = path + test_module.name+".sp"
tempgds = path + test_module.name+".gds"
test_module.sp_write(tempspice)
test_module.gds_write(tempgds)
assert(calibre.run_drc(test_module.name,
tempgds)==0)
assert(calibre.run_lvs(test_module.name,
tempgds,
tempspice)==0)
pex_file = test_module.name+"_pex.sp"
#pex_file = "temp_pex.sp"
assert(calibre.run_pex(test_module.name,
tempgds,
tempspice,
output=path + pex_file)==0)
return path + pex_file
def local_check(self, r):
tempgds = OPTS.openram_temp + "temp.gds"
r.gds_write(tempgds)
self.assertFalse(calibre.run_drc(r.name, tempgds))
os.remove(tempgds)
def func_test(self, bank_num):
import sram
import tech
debug.info(1, "Testing timing for sample 1bit, 16words SRAM with 1 bank")
OPTS.check_lvsdrc = False
OPTS.use_pex = True
s = sram.sram(word_size=OPTS.config.word_size,
num_words=OPTS.config.num_words,
num_banks=OPTS.config.num_banks,
name="test_sram1")
OPTS.check_lvsdrc = True
OPTS.use_pex = False
tempspice = OPTS.openram_temp + "temp.sp"
tempgds = OPTS.openram_temp + "temp.gds"
s.sp_write(tempspice)
s.gds_write(tempgds)
self.assertFalse(calibre.run_drc(s.name, tempgds))
self.assertFalse(calibre.run_lvs(s.name, tempgds, tempspice))
self.assertFalse(calibre.run_pex(s.name, tempgds,
tempspice, output=OPTS.openram_temp + "temp_pex.sp"))
import sp_file
stimulus_file = OPTS.openram_temp + "stimulus.sp"
a_stimulus = sp_file.sp_file(stimulus_file)
self.write_stimulus(a_stimulus)
simulator_file = OPTS.openram_temp + "simulator.sp"
a_simulator = sp_file.sp_file(simulator_file)
self.write_simulator(a_simulator)
result_file = OPTS.openram_temp + "result"
import os
if OPTS.spice_version == "hspice":
cmd = "hspice -mt 36 -i {0} > {1} ".format(
simulator_file, result_file)
else:
cmd = "ngspice -b -i {0} > {1} ".format(
simulator_file, result_file)
os.system(cmd)
import re
sp_result = open(result_file, "r")
contents = sp_result.read()
key = "vr1"
val = re.search(
r"{0}(\s*)=(\s*)(\d*(.).*)(\s*)(from)".format(key), contents)
val = val.group(3)
value1 = float(self.convert_voltage_unit(val))
key = "vr2"
val = re.search(
r"{0}(\s*)=(\s*)(\d*(.).*)(\s*)(from)".format(key), contents)
val = val.group(3)
value2 = float(self.convert_voltage_unit(val))
self.assertTrue(round(value1) > 0.5 * tech.spice["supply_voltage"])
self.assertTrue(round(value2) < 0.5 * tech.spice["supply_voltage"])
OPTS.check_lvsdrc = True