def __init__(self, name, dut, callback=None, event=None):
self.name = name
self.clk = dut.clk_i
self.pt_bval = dut.aes_gcm_plain_text_bval_i
self.pt_data = dut.aes_gcm_plain_text_i
self.rdy = dut.aes_gcm_cipher_ready_o
Monitor.__init__(self, callback, event)
def __init__(self, regfile_write_monitor: Monitor):
self.log = SimLog('cocotb.' + __name__ + '.' + self.__class__.__name__)
regfile_write_monitor.add_callback(self.regfile_callback)
self.stack_pointer = None
self.skip = 2
self.stack = []
self.direction = 'in'
self.return_address = 0
def __init__(self, signal, clock, interleaved=True, callback=None,
event=None):
"""Args:
signal (SimHandle): The XGMII data bus.
clock (SimHandle): The associated clock (assumed to be
driven by another coroutine).
interleaved (bool, optional): Whether control bits are interleaved
with the data bytes or not.
If interleaved the bus is
byte0, byte0_control, byte1, byte1_control, ...
Otherwise expect
byte0, byte1, ..., byte0_control, byte1_control, ...
"""
self.log = signal._log
self.clock = clock
self.signal = signal
self.bytes = len(self.signal) // 9
self.interleaved = interleaved
Monitor.__init__(self, callback=callback, event=event)
def __init__(self, name, signal, clk, callback=None, event=None):
self.name = name
self.signal = signal
self.clk = clk
Monitor.__init__(self, callback, event)
def __init__(self, name, dut, callback=None, event=None):
self.name = name
self.clk = dut.clk_i
self.tag_val = dut.aes_gcm_ghash_tag_val_o
self.tag_data = dut.aes_gcm_ghash_tag_o
Monitor.__init__(self, callback, event)
def __init__(self, name, dut, callback=None, event=None):
self.name = name
self.clk = dut.clk_i
self.ct_bval = dut.aes_gcm_cipher_text_bval_o
self.ct_data = dut.aes_gcm_cipher_text_o
Monitor.__init__(self, callback, event)
def __init__(self, name, dut, callback=None, event=None):
self.name = name
self.clk = dut.clk_i
self.aad_bval = dut.aes_gcm_ghash_aad_bval_i
self.aad_data = dut.aes_gcm_ghash_aad_i
Monitor.__init__(self, callback, event)