def __init__(self, page_number, start_address, page_size): """ Initialize page with important data used by components. """ self.page_number = page_number self.start_address = phex(start_address, 10) self.page_size = page_size self.end_address = phex( int(self.start_address, 0) + self.page_size, 10) self.instructions = [] self.num_of_instr = 0
def print_virtual_with_position(self, address): """ Print the position of the simulator in virtual memory with given PC address. """ if self.debug_info is True: print("\n[V. Memory] Prining v. memory with position '" + phex(address, 5) + "':") position = int(phex(address, 8), 0) - (4*3) for pos in range(position, position+(4*7), 4): if pos == position + (4*3): print("=====>\t", "[", phex(pos, 8), "] ~ ", self.virtual_memory[pos]) else: print("\t", "[", phex(pos, 8), "] ~ ", self.virtual_memory[pos])
def print_memory_page_table(self): """ Print the contents of memory. """ if self.debug_info is True: print("\n[Memory] Printing contents of memory...") unallocated = "...unallocated..." for index, instruction in enumerate(self.memory): if instruction is None: output = unallocated else: output = instruction if instruction == ".": continue else: print("[...] ", phex(index, 10), " | ", output)
def print_virtual_memory_layout(self): """ Print the contents of virtual memory. """ if self.debug_info is True: print("\n[V. Memory] Printing contents of virtual memory table...:") for index, data in enumerate(self.virtual_memory): if index == self.const_stack_start: print("[...] STACK(up): ") if index == self.const_heap_start: print("[...] HEAP(down):") if index == self.const_bss_start: print("[...] BSS:") if index == self.const_text_start: print("[...] TEXT (instructions):") if data != None: print("[...]", phex(index, 10), " ~ ", data)
def find_starting_address(self): """ Find the starting position of 'main:' label in virtual memory. """ if self.debug_info is True: print("\n[V. Memory] Looking for starting address...") start_address = "" for index, instruction in enumerate(self.virtual_memory): if instruction is None: continue elif instruction[1] == "main:": start_address = phex(index, 8) break if self.debug_info is True: print("[V. Memory] Starting address found '" + start_address + "'...") return start_address
def print_register_table(self): """ Print the value of all the registers. """ print("[CPU] Printing register table...") print("[...] RAX = ", phex(self.register_table["rax"], 32)) print("[...] RBX = ", phex(self.register_table["rbx"], 32)) print("[...] RCX = ", phex(self.register_table["rcx"], 32)) print("[...] RDX = ", phex(self.register_table["rdx"], 32)) print("[...] R8 = ", phex(self.register_table["r8"], 32)) print("[...] R9 = ", phex(self.register_table["r9"], 32)) print("[...] PC = ", phex(self.register_table["pc"], 32)) print("[...] RSP = ", phex(self.register_table["rsp"], 32)) print("[...] RBP = ", phex(self.register_table["rbp"], 32)) print("[...] RIP = ", phex(self.register_table["rip"], 32)) print("[...] RFLAGS = ", phex(self.register_table["rflags"], 6))
def add_instruction(self, instruction): """ Add instruction to page, normally used in paging process. """ address = int(self.start_address, 0) + (self.num_of_instr * 4) self.instructions.append([phex(address, 10), instruction]) self.num_of_instr = self.num_of_instr + 1