def p_i2(va, val, buf, off, tsize):
# trapa
iflags = 0
op = 0x57
i2 = (val >> 4) & 0x3
opers = (H8ImmOper(i2, tsize), )
return (op, None, opers, iflags, 2)
def p_6A_6B(va, val, buf, off, tsize):
op = val >> 4
diff = op & 0xf
osz = 1 + ((val >> 8) & 1)
if op & 0x8:
# Rs, @aa:16/24
if diff == 0xa:
op, mnem, opers, iflags, isz = p_Rs_aAA24(va, val, buf, off, tsize)
iflags |= OSZ_FLAGS[osz]
return op, mnem, opers, iflags, isz
elif diff == 0x8:
op, mnem, opers, iflags, isz = p_Rs_aAA16(va, val, buf, off, tsize)
iflags |= OSZ_FLAGS[osz]
return op, mnem, opers, iflags, isz
else:
raise envi.InvalidInstruction(bytez=buf[off:off + 16], va=va)
else:
# @aa:16/24, Rd
if diff == 0x2:
op, mnem, opers, iflags, isz = p_aAA24_Rd(va, val, buf, off, tsize)
iflags |= OSZ_FLAGS[osz]
return op, mnem, opers, iflags, isz
elif diff == 0x0:
op, mnem, opers, iflags, isz = p_aAA16_Rd(va, val, buf, off, tsize)
iflags |= OSZ_FLAGS[osz]
return op, mnem, opers, iflags, isz
elif val in (0x6a10, 0x6a18, 0x6a30, 0x6a38):
# non-MOV instructions
isz, aasize, fmt = (None, (6, 2, '>HH'), None,
(8, 4, '>IH'))[(val >> 4) & 3]
aa, val2 = struct.unpack(fmt, buf[off + 2:off + isz])
op, mnem, niflags = getBitDbl_OpMnem(val2)
if val2 & 0x1c00:
i3 = (val2 >> 4) & 7
opers = (
H8ImmOper(i3, tsize),
H8AbsAddrOper(aa, tsize, aasize),
)
else:
rn = (val2 >> 4) & 0xf
opers = (
H8RegDirOper(
rn,
tsize,
va,
),
H8AbsAddrOper(aa, tsize, aasize),
)
return op, mnem, opers, 0, isz
else:
raise envi.InvalidInstruction(bytez=buf[off:off + 16], va=va)
def p_7e(va, val, buf, off, tsize):
# btst, bor, bior, bxor, bixor, band, biand, bid, bild (erd)
val2, = struct.unpack('>H', buf[off + 2:off + 4])
op, mnem, iflags = getBitDbl_OpMnem(val2)
op |= ((val & 0xff80) << 9)
aa = val & 0xff
telltale = (val2 >> 8)
# FIXME: is any of this redundant with previous encodings?
if telltale == 0x63:
# btst (0x####63##
mnem = 'btst'
rn = (val2 >> 4) & 0xf
opers = (
H8RegDirOper(rn, tsize, va, 0),
H8AbsAddrOper(aa, tsize=tsize, aasize=1),
)
elif telltale == 0x73:
# btst (0x####73##
mnem = 'btst'
i3 = (val2 >> 4) & 0x7
opers = (
H8ImmOper(i3, tsize),
H8AbsAddrOper(aa, tsize=tsize, aasize=1),
)
elif 0x78 > telltale > 0x73:
# other bit-halves:
tsize = 1
i3 = (val2 >> 4) & 0x7
opers = (
H8ImmOper(i3, tsize),
H8AbsAddrOper(aa, tsize=tsize, aasize=1),
)
else:
raise envi.InvalidInstruction(bytez=buf[off:off + 16], va=va)
return op, mnem, opers, iflags, 4
def p_Bit_Doubles(va, val, buf, off, tsize):
op, mnem, iflags = getBitDbl_OpMnem(val)
i3 = (val >> 4) & 0x7
Rd = val & 0xf
opers = (
H8ImmOper(i3, tsize),
H8RegDirOper(Rd, tsize, va, 0),
)
return (op, mnem, opers, iflags, 2)
def p_i8_CCR(va, val, buf, off, tsize, exr=0):
# andc
iflags = 0
op = val >> 8
i8 = val & 0xff
opers = (
H8ImmOper(i8, 1),
H8RegDirOper(REG_CCR + exr, 4, 0),
)
return (op, None, opers, iflags, 2)
def p_7c(va, val, buf, off, tsize):
# btst, bor, bior, bxor, bixor, band, biand, bid, bild (erd)
val2, = struct.unpack('>H', buf[off + 2:off + 4])
iflags = 0
op, mnem, flags = getBitDbl_OpMnem(val2)
op |= ((val & 0xff80) << 9)
telltale = (val2 >> 8)
# FIXME: is any of this redundant with previous encodings?
if telltale == 0x63:
# btst (0x####63##
mnem = 'btst'
erd = (val >> 4) & 0x7
rn = (val2 >> 4) & 0xf
opers = (
H8RegDirOper(rn, tsize=tsize),
H8RegIndirOper(erd, tsize, va),
)
elif telltale == 0x73:
# btst (0x####73##
mnem = 'btst'
erd = (val >> 4) & 0x7
imm = (val2 >> 4) & 0x7
opers = (
H8ImmOper(imm, tsize),
H8RegIndirOper(erd, tsize, va),
)
elif 0x78 > telltale > 0x73:
# other bit-halves:
i3 = (val2 >> 4) & 0x7
erd = (val >> 4) & 0x7
opers = (
H8ImmOper(i3, tsize),
H8RegIndirOper(erd, tsize, va),
)
return op, mnem, opers, iflags, 4
def p_i3_Rd(va, val, buf, off, tsize):
# band, bclr, biand, bild, bior, bist, bixor, bld, bnot, bor, bset, bst, btst, bxor
iflags = 0
op = val >> 7
i3 = (val >> 4) & 0x7
Rd = val & 0xf
opers = (
H8ImmOper(i3, tsize),
H8RegDirOper(Rd, tsize, va, 0),
)
return (op, None, opers, iflags, 2)
def p_i8_Rd(va, val, buf, off, tsize):
# add.b, addx, and.b, cmp.b
iflags = 0
op = val >> 4
i8 = val & 0xff
Rd = (val >> 8) & 0xf
opers = (
H8ImmOper(i8, 1),
H8RegDirOper(Rd, tsize, va, 0),
)
return (op, None, opers, iflags, 2)
def p_0b_1b(va, val, buf, off, tsize):
table = (data_0b, data_1b)[val >> 12]
diff = (val >> 4) & 0xf
tsize, iflags, imm, mnem = table[diff]
op = val >> 4
ERd = val & 0xf
opers = (
H8ImmOper(imm, tsize),
H8RegDirOper(ERd, tsize, va, 0),
)
return (op, mnem, opers, iflags, 2)
def p_i32_ERd(va, val, buf, off, tsize):
# add.l, and.l, cmp.l
val2, = struct.unpack('>I', buf[off + 2:off + 6])
iflags = 0
op = val >> 3
i32 = val2
ERd = val & 0x7
opers = (
H8ImmOper(i32, 4),
H8RegDirOper(ERd, tsize, va, 0),
)
return (op, None, opers, iflags, 6)
def p_i16_Rd(va, val, buf, off, tsize):
# add.w, and.w, cmp.w
val2, = struct.unpack('>H', buf[off + 2:off + 4])
iflags = 0
op = val >> 4
i16 = val2
Rd = val & 0xf
opers = (
H8ImmOper(i16, 2),
H8RegDirOper(Rd, tsize, va, 0),
)
return (op, None, opers, iflags, 4)
def p_i3_aAA8(va, val, buf, off, tsize):
# band, bclr, biand, bild, bior, bist, bixor, bld, bnot, bor, bset, bst, btst, bxor
val2, = struct.unpack('>H', buf[off + 2:off + 4])
iflags = 0
op = (val >> 16) | (val & 0xf) | (val2 >> 15) | (val & 0xf)
i3 = (val2 >> 4) & 0x7
aa = val & 0xff
opers = (
H8ImmOper(i3, tsize),
H8AbsAddrOper(aa, tsize, aasize=1),
)
return (op, None, opers, iflags, 4)
def p_i3_aERd(va, val, buf, off, tsize):
# band, bclr, biand, bild, bior, bist, bixor, bld, bnot, bor, bset, bst, btst, bxor
val2, = struct.unpack('>H', buf[off + 2:off + 4])
iflags = 0
op = ((((val >> 3) & 0xfff0) |
(val & 0xf)) << 13) | ((val2 >> 3) & 0xfff0) | (val & 0xf)
i3 = (val2 >> 4) & 0x7
ERd = (val >> 4) & 0x7
opers = (
H8ImmOper(i3, tsize),
H8RegIndirOper(ERd, tsize, va),
)
return (op, None, opers, iflags, 4)
def p_shift_10_11_12_13_17(va, val, buf, off, tsize):
op = val >> 4
mnem, osz, xtra = shift_info[(val >> 4) & 0xff]
iflags = OSZ_FLAGS[osz]
# if 32bit (ERd), top bit should always be 0 anyway
rd = val & 0xf
if xtra:
opers = (
H8ImmOper(xtra, osz),
H8RegDirOper(rd, osz, va, 0),
)
else:
opers = (H8RegDirOper(rd, osz, va, 0), )
return (op, mnem, opers, iflags, 2)
def p_7d(va, val, buf, off, tsize):
# bset, bnor, bclr, bst/bist
val2, = struct.unpack('>H', buf[off + 2:off + 4])
op, mnem, iflags = getBitDbl_OpMnem(val2)
op |= ((val & 0xff80) << 9)
erd = (val >> 4) & 0x7
immreg = (val2 >> 4) & 0x7
if val2 & 0x1c00:
opers = (
H8ImmOper(immreg, tsize),
H8RegIndirOper(erd, tsize, va),
)
else:
opers = (
H8RegDirOper(immreg, tsize, va),
H8RegIndirOper(erd, tsize, va),
)
return op, mnem, opers, iflags, 4
def p_7f(va, val, buf, off, tsize):
# bset, bnor, bclr, bist, bst
val2, = struct.unpack('>H', buf[off + 2:off + 4])
op, mnem, iflags = getBitDbl_OpMnem(val2)
op |= ((val & 0xff00) << 8)
aa = val & 0xff
immreg = (val2 >> 4) & 0x7
if val2 & 0x1c00:
opers = (
H8ImmOper(immreg, tsize),
H8AbsAddrOper(aa, tsize, 1),
)
else:
opers = (
H8RegDirOper(immreg, tsize, va),
H8AbsAddrOper(aa, tsize, 1),
)
return op, mnem, opers, iflags, 4