Exemplo n.º 1
0
def closeComm(handle):
    """
    Closes communication to FPGA board given a handle

    Args:
        handle: An opaque reference to an internal structure representing the connection.
    """

    fl.flClose(handle)
Exemplo n.º 2
0
    def load_bitstream(self, bitstream_file):
        n = 27

        xsvf_file = os.path.splitext(bitstream_file)[0] + ".xsvf"
        print("\nGenerating xsvf formatted bitstream")
        print("=" * n)
        if os.path.exists(xsvf_file):
            os.unlink(xsvf_file)
        _create_xsvf(bitstream_file, xsvf_file)
        print("\n" + "=" * n + "\n")

        print("Programming %s to device." % xsvf_file)
        print("=" * n)
        handle = self.open_device()
        print("Programming device...")
        fl.flProgram(handle, "J:" + self.pin_cfg, progFile=xsvf_file)
        print("Programming successful!")
        print("=" * n + "\n")
        fl.flClose(handle)
Exemplo n.º 3
0
    def load_bitstream(self, bitstream_file):
        n = 27

        xsvf_file = os.path.splitext(bitstream_file)[0] + ".xsvf"
        print("\nGenerating xsvf formatted bitstream")
        print("=" * n)
        if os.path.exists(xsvf_file):
            os.unlink(xsvf_file)
        _create_xsvf(bitstream_file, xsvf_file)
        print("\n" + "=" * n + "\n")

        print("Programming %s to device." % xsvf_file)
        print("=" * n)
        handle = self.open_device()
        print("Programming device...")
        fl.flProgram(handle, "J:" + self.pin_cfg, progFile=xsvf_file)
        print("Programming successful!")
        print("=" * n + "\n")
        fl.flClose(handle)
Exemplo n.º 4
0
	def initComTest(self):
	"""
	Test intial connection capabilities to FPGA board over USB.

	Returns:
		results(list): list of strings representing reports of passed and failed tests.

	"""
		results = []
		fl.flInitialise(self.debug_level) #initializes library
		if fl.flIsDeviceAvailable(self.vid_pid_did): #checks if fpga is available
			results.append('P','USB bus with: ', self.vid_pid_did,' was found.')
			try:
				handle = fl.flOpen(self.vid_pid_did) #opens connection to FPGA board
				results.append('P','Successfully opened connection to FPGA board.')
				if fl.flIsNeroCapable(handle): #checks if device is Nero capable
					results.append('P', 'Device is Nero capable.')
				else:
					results.append('F', 'Device is not Nero capable.')
				if fl.flIsCommCapable(handle, self.conduit): #checks if FPGA board is capable of communication
					results.append('P','FPGA board supports functions: flIsFPGARunning(), flReadChannel(), flWriteChannel(), flSetAsyncWriteChunkSize(), flWriteChannelAsync(), flFlushAsyncWrites(), \c flAwaitAsyncWrites(), \c flReadChannelAsyncSubmit(),flReadChannelAsyncAwait().')
					try:
						fl.flSelectConduit(handle, self.conduit) #selects given conduit 
						results.append('P','Selected conduit ', self.conduit)
						if fl.flIsFPGARunning(handle): #checks if board is ready to acccept commands
							results.append('P','FPGA board is ready to accept commands.')
					except:
						results.append('F','Conduit was out of range or device did not respond.')			
				else:
					results.append('F','FPGA board cannot communicate.')
				fl.flClose(handle) #closes connection to FPGA board to avoid errors
				results.append('P','Connection to the FPGA board was closed.')
			except:
				results.append('F','Connection to FPGA board failed.')
		else:
			results.append('F','The VID:PID:DID ', self.vid_pid_did,' is invalid or no USB buses were found.')
		return results
Exemplo n.º 5
0
    print("Initializing FPGALink library...")
    fl.flInitialise(3)
    print("Attempting to open connection to FPGALink device {}...".format(vp))
    try:
        handle = fl.flOpen(vp)
    except fl.FLException as ex:
        print(ex)
        print("Loading standard firmware into RAM {}...".format(ivp))
        fl.flLoadStandardFirmware(ivp, vp)
        time.sleep(3)
        fl.flAwaitDevice(vp, 10000)
        print("Attempting to open connection to FPGALink device {} again...".format(vp))
        handle = fl.flOpen(vp)

    conduit = 1
    isNeroCapable = fl.flIsNeroCapable(handle)
    isCommCapable = fl.flIsCommCapable(handle, conduit)
    fl.flSelectConduit(handle, conduit)
    
    if ( isNeroCapable ):
        print("Programming FPGA with {}...".format(progConfig))
        fl.flProgram(handle, progConfig)
        print("Programming successful")
    else:
        raise fl.FLException("Device does not support NeroProg")

except fl.FLException as ex:
    print(ex)
finally:
    fl.flClose(handle)
Exemplo n.º 6
0
PROG_CONFIG = "B3B2B0B1"
handle = fl.FLHandle()
try:
    fl.flInitialise(0)

    # Connect, reset the board, open SPI interface & get SS port:
    handle = fl.flOpen(VID_PID)
    fl.flMultiBitPortAccess(handle, "B6-,C2-")  # RESET low & cut the power
    fl.flSleep(10)
    fl.flSingleBitPortAccess(handle, 2, 2, fl.PIN_HIGH)  # power on in RESET
    fl.progOpen(handle, PROG_CONFIG)
    (port, bit) = fl.progGetPort(handle, fl.LP_SS)
    fl.flSingleBitPortAccess(handle, port, bit, fl.PIN_HIGH)
    
    # Send JEDEC device-id command, retrieve three bytes back
    fl.flSingleBitPortAccess(handle, port, bit, fl.PIN_LOW)
    fl.spiSend(handle, b"\x9F", fl.SPI_MSBFIRST)
    bs = fl.spiRecv(handle, 3, fl.SPI_MSBFIRST)
    print("JEDEC ID: {}".format(
        " ".join(["{:02X}".format(b) for b in bs])))
    fl.flSingleBitPortAccess(handle, port, bit, fl.PIN_HIGH)
    
    # Close SPI interface, release reset and close connection
    fl.progClose(handle)
    fl.flMultiBitPortAccess(handle, "B6?")  # release RESET

except fl.FLException as ex:
    print(ex)
finally:
    fl.flClose(handle)
Exemplo n.º 7
0
def main():
    argList = get_args()
    print(argList)
    handle = fl.FLHandle()
    try:
        fl.flInitialise(0)
        vp = argList.v[0]
        print("Attempting to open connection to FPGALink device {}...".format(
            vp))
        try:
            handle = fl.flOpen(vp)
        except fl.FLException as ex:
            handle = ids(vp, argList)
        if argList.c:
            isNeroCapable, isCommCapable = conduit_selection(int(argList.c[0]))
        else:
            isNeroCapable, isCommCapable = conduit_selection()

        jtag_chain(isNeroCapable, argList, vp, handle)

        configure(argList, isNeroCapable, handle, vp)

        if argList.f and not isCommCapable:
            raise fl.FLException(
                "Data file load requested but device at {} does not support CommFPGA"
                .format(vp))

        if isCommCapable and fl.flIsFPGARunning(handle):

            fpga = NodeFPGA(handle)

            if argList.ppm:
                M = int(eval(argList.ppm[0]))
                print("Setting PPM order to: ", M)
                fpga.setPPM_M(M)

            if argList.txdel:
                delay = int(eval(argList.txdel[0]))
                print("Setting transmitter loopback delay to %i (0x%X)" %
                      (delay, delay))
                fpga.setTXdelay(delay)

            if argList.dac:
                dacval = int(eval(argList.dac[0]))
                print("Setting DAC value to %i (0x%X)" % (dacval, dacval))
                fpga.writeDAC(dacval)

            if argList.prbs:
                print("Enabling PRBS")
                fpga.usePRBS()

            else:
                print("Disabling PRBS")
                fpga.usePRBS(False)

            if argList.peak:
                obslength = float(argList.peak)
                print("Measuring peak power...")
                peakDAC = fpga.binSearchPeak(M,
                                             target=1.0 / M,
                                             obslength=obslength)
                print("  DAC = %i" % peakDAC)

            #alg testing goes here, but alg is not up to date!!
            opt_alg(argList, fpga)

    except fl.FLException as ex:
        print(ex)
    finally:
        fl.flClose(handle)
Exemplo n.º 8
0
def main():
    argList = get_args()
    print (argList)
    handle = fl.FLHandle()
    try:
        fl.flInitialise(0)
        vp = argList.v[0]
        print("Attempting to open connection to FPGALink device {}...".format(vp))
        try:
            handle = fl.flOpen(vp)
        except fl.FLException as ex:
            handle = ids(vp, argList)
        
        # if ( argList.d ):
        #     print("Configuring ports...")
        #     rb = "{:0{}b}".format(fl.flMultiBitPortAccess(handle, argList.d[0]), 32)
        #     print("Readback:   28   24   20   16    12    8    4    0\n          {} {} {} {}  {} {} {} {}".format(
        #         rb[0:4], rb[4:8], rb[8:12], rb[12:16], rb[16:20], rb[20:24], rb[24:28], rb[28:32]))
        #     fl.flSleep(100)

        if argList.c:
            isNeroCapable, isCommCapable = conduit_selection(int(argList.c[0]))
        else:
            isNeroCapable, isCommCapable = conduit_selection()
        
        jtag_chain(isNeroCapable, argList, vp, handle)        
        configure(argList, isNeroCapable, handle, vp)

        if argList.f and not isCommCapable:
            raise fl.FLException("Data file load requested but device at {} does not support CommFPGA".format(vp))

        if isCommCapable and fl.flIsFPGARunning(handle):
            fpga = NodeFPGA(handle)
    	
            # define channels
        	writechannel = 0x02
        	statuschannel = 0x05
        	resetchannel = 0x08

            if argList.ppm:
                M = int(eval(argList.ppm[0]))
                print ("Setting PPM order to",M)
                fpga.setPPM_M(M)

    	    writedelay,num_bytes,trackingbyte = fpga.setModulatorParams(M)

    	    if not argList.f:
                fpga.setTrackingMode(writechannel,trackingbyte,M)

            if argList.txdel:
                delay = int(eval(argList.txdel[0]))
                print ("Setting transmitter loopback delay to %i (0x%X)"%(delay,delay))
                fpga.setTXdelay(delay)

            if argList.dac:
                dacval = int(eval(argList.dac[0]))
                print ("Setting DAC value to %i (0x%X)"%(dacval,dacval))
                fpga.writeDAC(dacval)

            if argList.prbs:
               # dacval = int(eval(argList.dac[0]))
               # print ("Setting DAC value to %i (0x%X)"%(dacval,dacval))
                print ("Enabling PRBS")
                fpga.usePRBS()
            else:
                print ("Disabling PRBS")
                fpga.usePRBS(False)

            if argList.peak:
                obslength = float(argList.peak)
                print ("Measuring peak power...")
                peakDAC = fpga.binSearchPeak(M,target=1.0/M,obslength=obslength)
                print ("  DAC = %i"%peakDAC)

            if argList.ser:
                obslength = float(argList.ser)
                print ("Measuring slot error rate...")
                cycles,errors,ones,ser = fpga.measureSER(obslength=obslength)
                print (" cycles = 0x%-12X"%(cycles))
                print (" errors = 0x%-12X"%(errors))
                print (" ones   = 0x%-12X target=0x%-12X"%(ones,cycles/M))
                print (" SlotER = %e"%(ser))
        
            data_to_write(argList, fpga, writechannel, resetchannel, statuschannel, writedelay, vp, M, num_bytes)
        
    except fl.FLException as ex:
        print(ex)
    finally:
        fl.flClose(handle)
Exemplo n.º 9
0
def NODECTRLmain():
    argList = get_args()
    handle = fl.FLHandle()
    try:
        fl.flInitialise(0)
        vp = argList.v[0]
        print("Attempting to open connection to FPGALink device {}...".format(vp))
        try:
            handle = fl.flOpen(vp)
        except fl.FLException as ex:
            handle = ids(vp, argList)
        if argList.c:
            isNeroCapable, isCommCapable = conduit_selection(int(argList.c[0]))
        else:
            isNeroCapable, isCommCapable = conduit_selection()
        
        jtag_chain(isNeroCapable, argList, vp, handle)
        
        configure(argList, isNeroCapable, handle, vp)
        
        if argList.f and not isCommCapable:
            raise fl.FLException("Data file load requested but device at {} does not support CommFPGA".format(vp))

        if isCommCapable and fl.flIsFPGARunning(handle):

            fpga = NodeFPGA(handle)
            # define channels
            ##must update these channels 
            writechannel = 0x02
            statuschannel = 0x05
            resetchannel = 0x08

            writedelay,num_bytes,trackingbyte = fpga.setModulatorParams(M)

            if argList.ppm:
                M = int(eval(argList.ppm[0]))
                print ("Setting PPM order to: ",M)
                fpga.setPPM_M(M)

            if not argList.f:
                fpga.setTrackingMode(writechannel,trackingbyte,M)

            if argList.txdel:
                delay = int(eval(argList.txdel[0]))
                print ("Setting transmitter loopback delay to %i (0x%X)"%(delay,delay))
                fpga.setTXdelay(delay)

            if argList.dac:
                dacval = int(eval(argList.dac[0]))
                print ("Setting DAC value to %i (0x%X)"%(dacval,dacval))
                fpga.writeDAC(dacval)

            if argList.prbs:
                print ("Enabling PRBS")
                fpga.usePRBS()

            else:
                print ("Disabling PRBS")
                fpga.usePRBS(False)

            if argList.peak:
                obslength = float(argList.peak)
                print ("Measuring peak power...")
                peakDAC = fpga.binSearchPeak(M,target=1.0/M,obslength=obslength)
                print ("  DAC = %i"%peakDAC)

            if argList.ser:
                obslength = float(argList.ser)
                print ("Measuring slot error rate...")
                cycles,errors,ones,ser = fpga.measureSER(obslength=obslength)
                print (" cycles = 0x%-12X"%(cycles))
                print (" errors = 0x%-12X"%(errors))
                print (" ones   = 0x%-12X target=0x%-12X"%(ones,cycles/M))
                print (" SlotER = %e"%(ser))

            data_to_write(argList, fpga, writechannel, resetchannel, statuschannel, writedelay, vp, M, num_bytes)
            #alg testing goes here, but alg is not up to date!!
            #opt_alg(argList, fpga)
            
    except fl.FLException as ex:
        print(ex)
    finally:
        fl.flClose(handle)
    print("flProgram()...")
    fl.flProgram(conn, "J:{}:../../../../hdlmake/apps/makestuff/swled/cksum/vhdl/fpga.xsvf".format(PROG_CONFIG))
    print("...done.")

    fl.flSelectConduit(conn, CONDUIT)
    print("flIsFPGARunning(): {}".format(fl.flIsFPGARunning(conn)))

    fl.flWriteChannel(conn, 0, BYTE_ARRAY)

    bs = fl.flReadChannel(conn, 1, 16)
    print("flReadChannel(1, 16) got {} bytes: {{\n  {}\n}}".format(
        len(bs),
        " ".join(["{:02X}".format(b) for b in bs])))
    
    print("flReadChannel(2) got {:02X}".format(fl.flReadChannel(conn, 2)))

    fl.flReadChannelAsyncSubmit(conn, 0, 4)
    fl.flReadChannelAsyncSubmit(conn, 1, 8)
    fl.flReadChannelAsyncSubmit(conn, 2, 16)
    for i in range(3):
        bs = fl.flReadChannelAsyncAwait(conn)
        print("flReadChannelAsyncAwait() got {} bytes: {{\n  {}\n}}".format(
            len(bs),
            " ".join(["{:02X}".format(b) for b in bytearray(bs)])))

except fl.FLException as ex:
    print(ex)
finally:
    fl.flClose(conn)