def system_info(args):
if args.system in CoreManager().get_systems():
core = CoreManager().get_core(args.system)
core.info()
core.system.info()
else:
pr_err("Can't find system '" + args.system + "'")
def build(self):
super(Xsim, self).build()
#Check if any VPI modules are present and display warning
if len(self.vpi_modules) > 0:
modules = [m['name'] for m in self.vpi_modules]
pr_err('VPI modules not supported by Xsim: %s' %
', '.join(modules))
#Build simulation model
args = []
args += [self.toplevel]
args += ['--prj', 'xsim.prj'] # list of design files
args += ['--timescale', '1ps/1ps'
] # default timescale to prevent error if unspecified
args += ['--snapshot', 'fusesoc'] # name of the design to simulate
args += ['--debug', 'typical'] # capture waveforms
for include_dir in self.incdirs:
args += ['-i', include_dir]
for key, value in self.vlogparam.items():
args += ['--generic_top', '{}={}'.format(key, value)]
args += self.xsim_options
Launcher('xelab',
args,
cwd=self.sim_root,
errormsg="Failed to compile Xsim simulation model").run()
def build(args):
system = args.system
if system in CoreManager().get_systems():
core = CoreManager().get_core(system)
try:
backend = BackendFactory(core)
except DependencyError as e:
pr_err("'" + args.system +
"' or any of its dependencies requires '" + e.value +
"', but this core was not found")
exit(1)
except RuntimeError as e:
pr_err("Failed to build '{}': {}".format(args.system, e))
exit(1)
try:
backend.configure(args.backendargs)
except RuntimeError as e:
pr_err(str(e))
exit(1)
print('')
try:
backend.build(args.backendargs)
except RuntimeError as e:
pr_err("Failed to build FPGA: " + str(e))
else:
pr_err("Can't find system '" + args.system + "'")
def run(self, args):
parser = argparse.ArgumentParser(prog ='fusesoc sim '+self.system.name, conflict_handler='resolve')
for name in self.cores:
core = self.cm.get_core(name)
if core.plusargs:
core.plusargs.add_arguments(parser)
p = parser.parse_args(args)
self.plusargs = []
for key,value in vars(p).items():
if value == True:
self.plusargs += [key]
elif value == False or value is None:
pass
else:
self.plusargs += [key+'='+str(value[0])]
for script in self.system.pre_run_scripts:
script = os.path.abspath(os.path.join(self.system.core_root, script))
pr_info("Running " + script);
try:
Launcher(script, cwd = self.sim_root, env = self.env, shell=True).run()
except RuntimeError:
pr_err("Error: script " + script + " failed")
def system_info(args):
if args.system in CoreManager().get_systems():
core = CoreManager().get_core(args.system)
core.info()
core.system.info()
else:
pr_err("Can't find system '" + args.system + "'")
def fetch(args):
core = CoreManager().get_core(args.core)
if core:
cores = CoreManager().get_depends(core.name)
try:
core.setup()
except URLError as e:
pr_err("Problem while fetching '" + core.name + "': " + str(e.reason))
exit(1)
except HTTPError as e:
pr_err("Problem while fetching '" + core.name + "': " + str(e.reason))
exit(1)
for name in cores:
pr_info("Fetching " + name)
core = CoreManager().get_core(name)
try:
core.setup()
except URLError as e:
pr_err("Problem while fetching '" + core.name + "': " + str(e.reason))
exit(1)
except HTTPError as e:
pr_err("Problem while fetching '" + core.name + "': " + str(e.reason))
exit(1)
else:
pr_err("Can't find core '" + args.core + "'")
def build(self):
super(Xsim, self).build()
#Check if any VPI modules are present and display warning
if len(self.vpi_modules) > 0:
modules = [m['name'] for m in self.vpi_modules]
pr_err('VPI modules not supported by Xsim: %s' % ', '.join(modules))
#Build simulation model
args = []
args += [ self.toplevel]
args += ['--prj', 'xsim.prj'] # list of design files
args += ['--timescale', '1ps/1ps'] # default timescale to prevent error if unspecified
args += ['--snapshot', 'fusesoc'] # name of the design to simulate
args += ['--debug', 'typical'] # capture waveforms
for include_dir in self.incdirs:
args += ['-i', include_dir]
for key, value in self.vlogparam.items():
args += ['--generic_top', '{}={}'.format(key, value)]
args += self.xsim_options
Launcher('xelab', args,
cwd = self.sim_root,
errormsg = "Failed to compile Xsim simulation model").run()
def run(self, args):
parser = argparse.ArgumentParser(prog ='fusesoc sim '+self.system.name, conflict_handler='resolve')
for name in self.cores:
core = self.cm.get_core(name)
if core.plusargs:
core.plusargs.add_arguments(parser)
p = parser.parse_args(args)
self.plusargs = []
for key,value in vars(p).items():
if value == True:
self.plusargs += [key]
elif value == False or value is None:
pass
else:
self.plusargs += [key+'='+str(value[0])]
for script in self.system.pre_run_scripts:
script = os.path.abspath(os.path.join(self.system.core_root, script))
pr_info("Running " + script);
try:
Launcher(script, cwd = self.sim_root, env = self.env, shell=True).run()
except RuntimeError:
pr_err("Error: script " + script + " failed")
def fetch(args):
core = CoreManager().get_core(args.core)
if core:
cores = CoreManager().get_depends(core.name)
try:
core.setup()
except URLError as e:
pr_err("Problem while fetching '" + core.name + "': " +
str(e.reason))
exit(1)
except HTTPError as e:
pr_err("Problem while fetching '" + core.name + "': " +
str(e.reason))
exit(1)
for name in cores:
pr_info("Fetching " + name)
core = CoreManager().get_core(name)
try:
core.setup()
except URLError as e:
pr_err("Problem while fetching '" + core.name + "': " +
str(e.reason))
exit(1)
except HTTPError as e:
pr_err("Problem while fetching '" + core.name + "': " +
str(e.reason))
exit(1)
else:
pr_err("Can't find core '" + args.core + "'")
def build(self):
super(Isim, self).build()
#Check if any VPI modules are present and display warning
if len(self.vpi_modules) > 0:
modules = [m['name'] for m in self.vpi_modules]
pr_err('VPI modules not supported by Isim: %s' %
', '.join(modules))
#Build simulation model
args = []
args += [self.toplevel]
args += ['-prj', 'isim.prj']
args += ['-o', 'fusesoc.elf']
for include_dir in self.incdirs:
args += ['-i', include_dir]
for key, value in self.vlogparam.items():
args += ['--generic_top', '{}={}'.format(key, value)]
args += self.isim_options
Launcher('fuse',
args,
cwd=self.sim_root,
errormsg="Failed to compile Isim simulation model").run()
def fetch(args):
core = _get_core(args.core)
try:
core.setup()
except RuntimeError as e:
pr_err("Failed to fetch '{}': {}".format(core.name, str(e)))
exit(1)
def build(self):
for script in self.system.pre_build_scripts:
script = os.path.abspath(os.path.join(self.system.core_root, script))
pr_info("Running " + script);
try:
Launcher(script, cwd = self.sim_root, env = self.env, shell=True).run()
except RuntimeError:
pr_err("Error: script " + script + " failed")
return
def done(self, args):
for script in self.system.post_run_scripts:
script = os.path.abspath(os.path.join(self.system.core_root, script))
pr_info("Running " + script);
try:
Launcher(script, cwd = self.sim_root, env = self.env, shell=True).run()
except RuntimeError:
pr_err("Error: script " + script + " failed")
def pgm(args):
core = _get_core(args.system, True)
try:
backend = _import('build', core.main.backend)(core)
backend.pgm(args.backendargs)
except ImportError:
pr_err('Backend "{}" not found'.format(core.main.backend))
except RuntimeError as e:
pr_err("Failed to program the FPGA: " + str(e))
def pgm(args):
if args.system in CoreManager().get_systems():
core = CoreManager().get_core(args.system)
backend = BackendFactory(core)
try:
backend.pgm(args.backendargs)
except RuntimeError as e:
pr_err("Failed to program the FPGA: " + str(e))
else:
pr_err("Can't find system '" + args.system + "'")
def pgm(args):
if args.system in CoreManager().get_systems():
core = CoreManager().get_core(args.system)
backend = BackendFactory(core)
try:
backend.pgm(args.backendargs)
except RuntimeError as e:
pr_err("Failed to program the FPGA: " + str(e))
else:
pr_err("Can't find system '" + args.system + "'")
def done(self, args):
for script in self.system.post_run_scripts:
script = os.path.abspath(
os.path.join(self.system.core_root, script))
pr_info("Running " + script)
try:
Launcher(script, cwd=self.sim_root, env=self.env,
shell=True).run()
except RuntimeError:
pr_err("Error: script " + script + " failed")
def init(args):
# Fix Python 2.x.
global input
try:
input = raw_input
except NameError:
pass
xdg_data_home = os.environ.get('XDG_DATA_HOME') or \
os.path.join(os.path.expanduser('~'),
'.local', 'share', 'fusesoc')
_repo_paths = []
for repo in REPOS:
default_dir = os.path.join(xdg_data_home, repo[0])
prompt = 'Directory to use for {} ({}) [{}] : '
if args.y:
cores_root = None
else:
cores_root = input(prompt.format(repo[0], repo[2], default_dir))
if not cores_root:
cores_root = default_dir
if os.path.exists(cores_root):
pr_warn("'{}' already exists".format(cores_root))
#TODO: Prompt for overwrite
else:
_repo_paths.append(cores_root)
pr_info("Initializing {}".format(repo[0]))
git_args = ['clone', repo[1], cores_root]
try:
Launcher('git', git_args).run()
except RuntimeError as e:
pr_err("Init failed: " + str(e))
exit(1)
xdg_config_home = os.environ.get('XDG_CONFIG_HOME') or \
os.path.join(os.path.expanduser('~'), '.config')
config_file = os.path.join(xdg_config_home, 'fusesoc', 'fusesoc.conf')
if os.path.exists(config_file):
pr_warn("'{}' already exists".format(config_file))
#TODO. Prepend cores_root to file if it doesn't exist
else:
pr_info("Writing configuration file to '{}'".format(config_file))
if not os.path.exists(os.path.dirname(config_file)):
os.makedirs(os.path.dirname(config_file))
f = open(config_file,'w')
f.write("[main]\n")
f.write("cores_root = {}\n".format(' '.join(_repo_paths)))
pr_info("FuseSoC is ready to use!")
def list_cores(args):
cores = CoreManager().get_cores()
print("\nAvailable cores:\n")
if not cores:
cores_root = CoreManager().get_cores_root()
if cores_root:
pr_err("No cores found in " + ':'.join(cores_root))
else:
pr_err("cores_root is not defined")
exit(1)
maxlen = max(map(len, cores.keys()))
print('Core'.ljust(maxlen) + ' Cache status')
print("=" * 80)
for name in sorted(cores.keys()):
core = cores[name]
print(name.ljust(maxlen) + ' : ' + core.cache_status())
def list_cores(args):
cores = CoreManager().get_cores()
print("\nAvailable cores:\n")
if not cores:
cores_root = CoreManager().get_cores_root()
if cores_root:
pr_err("No cores found in "+':'.join(cores_root))
else:
pr_err("cores_root is not defined")
exit(1)
maxlen = max(map(len,cores.keys()))
print('Core'.ljust(maxlen) + ' Cache status')
print("="*80)
for name in sorted(cores.keys()):
core = cores[name]
print(name.ljust(maxlen) + ' : ' + core.cache_status())
def _checkout(self):
pr_info("Using Xilinx Vivado to generate LogiCORE(tm) project " +
self.project_file)
if not os.path.isdir(self.files_root):
os.mkdir(self.files_root)
src_files = [self.script_file, self.project_file]
if self.extra_files:
src_files += self.extra_files.split()
for f in src_files:
f_src = os.path.join(self.core_root, f)
f_dst = os.path.join(self.files_root, f)
if (os.path.exists(f_src)):
shutil.copyfile(f_src, f_dst)
else:
pr_err('Cannot find file %s' % f_src)
args = ['-mode', 'batch', '-source', self.script_file]
Launcher('vivado', args, cwd=self.files_root).run()
def _checkout(self):
pr_info("Using Xilinx Vivado to generate LogiCORE(tm) project " + self.project_file)
if not os.path.isdir(self.files_root):
os.mkdir(self.files_root)
src_files = [self.script_file, self.project_file]
if self.extra_files:
src_files += self.extra_files.split()
for f in src_files:
f_src = os.path.join(self.core_root, f)
f_dst = os.path.join(self.files_root, f)
if(os.path.exists(f_src)):
shutil.copyfile(f_src, f_dst)
else:
pr_err('Cannot find file %s' % f_src)
args = ['-mode', 'batch',
'-source', self.script_file]
Launcher('vivado', args, cwd=self.files_root).run()
def _checkout(self):
pr_info("Using Coregen to generate project " + self.project_file)
if not os.path.isdir(self.files_root):
os.mkdir(self.files_root)
src_files = [self.script_file, self.project_file]
if self.extra_files:
src_files += self.extra_files.split()
for f in src_files:
f_src = os.path.join(self.core_root, f)
f_dst = os.path.join(self.files_root, f)
if (os.path.exists(f_src)):
shutil.copyfile(f_src, f_dst)
else:
pr_err('Cannot find file %s' % f_src)
args = ['-r', '-b', self.script_file, '-p', self.project_file]
#'-intstyle', 'silent']
Launcher('coregen', args, cwd=self.files_root).run()
def _checkout(self):
pr_info("Using Coregen to generate project " + self.project_file)
if not os.path.isdir(self.files_root):
os.mkdir(self.files_root)
src_files = [self.script_file, self.project_file]
if self.extra_files:
src_files += self.extra_files.split()
for f in src_files:
f_src = os.path.join(self.core_root, f)
f_dst = os.path.join(self.files_root, f)
if(os.path.exists(f_src)):
shutil.copyfile(f_src, f_dst)
else:
pr_err('Cannot find file %s' % f_src)
args = ['-r',
'-b', self.script_file,
'-p', self.project_file]
#'-intstyle', 'silent']
Launcher('coregen', args, cwd=self.files_root).run()
def build(self):
super(Isim, self).build()
#Check if any VPI modules are present and display warning
if len(self.vpi_modules) > 0:
modules = [m['name'] for m in self.vpi_modules]
pr_err('VPI modules not supported by Isim: %s' % ', '.join(modules))
#Build simulation model
args = []
args += [ self.toplevel]
args += ['-prj', 'isim.prj']
args += ['-o', 'fusesoc.elf']
for include_dir in self.incdirs:
args += ['-i', include_dir]
args += self.isim_options
Launcher('fuse', args,
cwd = self.sim_root,
errormsg = "Failed to compile Isim simulation model").run()
def build(args):
system = args.system
if system in CoreManager().get_systems():
core = CoreManager().get_core(system)
try:
backend = BackendFactory(core)
except DependencyError as e:
pr_err("'" + args.system + "' or any of its dependencies requires '" + e.value + "', but this core was not found")
exit(1)
except RuntimeError as e:
pr_err("Failed to build '{}': {}".format(args.system, e))
exit(1)
try:
backend.configure(args.backendargs)
except RuntimeError as e:
pr_err(str(e))
exit(1)
print('')
try:
backend.build(args.backendargs)
except RuntimeError as e:
pr_err("Failed to build FPGA: " + str(e))
else:
pr_err("Can't find system '" + args.system + "'")
def _get_core(name, has_system=False):
core = None
try:
core = CoreManager().get_core(Vlnv(name))
except RuntimeError as e:
pr_err(str(e))
exit(1)
except DependencyError as e:
pr_err("'" + name + "' or any of its dependencies requires '" + e.value + "', but this core was not found")
exit(1)
if has_system and not core.backend:
pr_err("Unable to find .system file for '{}'".format(name))
exit(1)
return core
def build(args):
core = _get_core(args.system, True)
try:
backend = _import('build', core.main.backend)(core)
except ImportError:
pr_err('Backend "{}" not found'.format(core.main.backend))
exit(1)
except RuntimeError as e:
pr_err("Failed to build '{}': {}".format(args.system, e))
exit(1)
try:
backend.configure(args.backendargs)
except RuntimeError as e:
pr_err(str(e))
exit(1)
print('')
try:
if not args.setup:
backend.build(args.backendargs)
except RuntimeError as e:
pr_err("Failed to build FPGA: " + str(e))
def sim(args):
core = CoreManager().get_core(args.system)
if core == None:
pr_err("Can't find core '" + args.system + "'")
exit(1)
if args.sim:
sim_name = args.sim[0]
elif core.simulators:
sim_name = core.simulators[0]
else:
pr_err("No simulator was found in '"+ args.system + "' core description")
logger.error("No simulator was found in '"+ args.system + "' core description")
exit(1)
try:
CoreManager().tool = sim_name
sim = SimulatorFactory(sim_name, core)
except DependencyError as e:
pr_err("'" + args.system + "' or any of its dependencies requires '" + e.value + "', but this core was not found")
exit(1)
except OptionSectionMissing as e:
pr_err("'" + args.system + "' miss a mandatory parameter for " + sim_name + " simulation (" + e.value + ")")
exit(1)
except RuntimeError as e:
pr_err(str(e))
exit(1)
if (args.testbench):
sim.toplevel = args.testbench[0]
if not args.keep or not os.path.exists(sim.sim_root):
try:
sim.configure(args.plusargs)
print('')
except RuntimeError as e:
pr_err("Failed to configure the system")
pr_err(str(e))
exit(1)
try:
sim.build()
except Source as e:
pr_err("'" + e.value + "' source type is not valid. Choose 'C' or 'systemC'")
exit(1)
except RuntimeError as e:
pr_err("Failed to build simulation model")
pr_err(str(e))
exit(1)
if not args.build_only:
try:
sim.run(args.plusargs)
except RuntimeError as e:
pr_err("Failed to run the simulation")
pr_err(str(e))
def _write_config_files(self):
if self.top_module is None:
pr_err("No top_module set for this simulation")
exit(1)
ip = [] # IP descriptions (xci files)
constr = [] # Constraints (xdc files)
verilog = [] # (System) Verilog files
vhdl = [] # VHDL files
(src_files, self.incdirs) = self._get_fileset_files(['sim', 'xsim'])
for s in src_files:
if s.file_type == 'xci':
ip.append(s.name)
elif s.file_type == 'xdc':
constr.append(s.name)
elif s.file_type.startswith('verilogSource'):
verilog.append(s.name)
elif s.file_type.startswith('systemVerilogSource'):
verilog.append(s.name)
elif s.file_type.startswith('vhdlSource'):
vhdl.append(s.name)
elif s.file_type in ("CPP", "C"):
self.dpi_srcs.append(s.name)
filename = self.system.sanitized_name + ".tcl"
path = os.path.join(self.work_root, filename)
tcl_file = open(path, 'w')
ipconfig = '\n'.join(['read_ip ' + s for s in ip]) + "\n"
ipconfig += "upgrade_ip [get_ips]\n"
ipconfig += "generate_target all [get_ips]\n"
parameters = ""
for key, value in self.vlogparam.items():
parameters += "set_property generic {{{key}={value}}} [current_fileset -simset]\n".format(
key=key, value=value)
part = ""
if self.part:
part = " -part {} ".format(self.part)
tcl_file.write(
PROJECT_TCL_TEMPLATE.format(
design=self.system.sanitized_name,
toplevel=self.top_module,
incdirs=' '.join(self.incdirs),
parameters=parameters,
part=part,
ip=ipconfig,
src_files='\n'.join(['read_verilog ' + s for s in verilog] +
['read_vhdl ' + s for s in vhdl])))
if self._has_dpi():
tcl_file.write(
"set_property -name {xsim.elaborate.xelab.more_options} "
"-value {-cc gcc -sv_lib dpi } "
"-objects [current_fileset -simset]\n")
tcl_file.write("launch_simulation -scripts_only")
tcl_file.close()
Launcher('vivado', [
'-mode', 'batch', '-source',
os.path.join(self.work_root, self.system.sanitized_name + '.tcl')
],
cwd=self.work_root,
errormsg="Failed to build simulation").run()
def sim(args):
core = _get_core(args.system)
if args.sim:
sim_name = args.sim[0]
elif core.simulators:
sim_name = core.simulators[0]
else:
pr_err("No simulator was found in '" + args.system +
"' core description")
logger.error("No simulator was found in '" + args.system +
"' core description")
exit(1)
try:
CoreManager().tool = sim_name
sim = _import('simulator', sim_name)(core)
except DependencyError as e:
pr_err("'" + args.system + "' or any of its dependencies requires '" +
e.value + "', but this core was not found")
exit(1)
except ImportError:
pr_err("Unknown simulator '{}'".format(sim_name))
exit(1)
except OptionSectionMissing as e:
pr_err("'" + args.system + "' miss a mandatory parameter for " +
sim_name + " simulation (" + e.value + ")")
exit(1)
except RuntimeError as e:
pr_err(str(e))
exit(1)
if (args.testbench):
sim.toplevel = args.testbench[0]
if not args.keep or not os.path.exists(sim.work_root):
try:
sim.configure(args.plusargs)
print('')
except RuntimeError as e:
pr_err("Failed to configure the system")
pr_err(str(e))
exit(1)
if args.setup:
exit(0)
try:
sim.build()
except Source as e:
pr_err("'" + e.value +
"' source type is not valid. Choose 'C' or 'systemC'")
exit(1)
except RuntimeError as e:
pr_err("Failed to build simulation model")
pr_err(str(e))
exit(1)
if not args.build_only:
try:
sim.run(args.plusargs)
except RuntimeError as e:
pr_err("Failed to run the simulation")
pr_err(str(e))
def core_info(args):
core = CoreManager().get_core(args.core)
if core:
core.info()
else:
pr_err("Can't find core '" + args.core + "'")
def core_info(args):
core = CoreManager().get_core(args.core)
if core:
core.info()
else:
pr_err("Can't find core '" + args.core + "'")
