Exemplo n.º 1
0
if __name__ == "__main__":
    name = ""
    if len(sys.argv) == 1:
        name = "904"
    elif len(sys.argv) == 2:
        name = sys.argv[1]
    else:
        name = "904"
    ts = teststand(
        name
    )  # Initialize a teststand object. This object stores the teststand configuration and has a number of useful methods.

    result = [0] * 24
    registers = []
    for q in range(24):
        registers.append(register(ts, "HF1-10-QIE{0}".format(q + 1), 48))

    for i in range(5):
        #print "test",i
        for r in registers:
            #print r.name
            value = getRandomValue()
            values = [value[0:8], '0x' + value[8:16]]
            r.addTestToCache(values[0] + " " + values[1])
        #if not testRandomValue( r ) :
        #	result[q] = result[q] + 1
        #print "ERRORS: ",result

    for r in registers:
        r.testCache()
Exemplo n.º 2
0
if __name__ == "__main__":
    name = ""
    if len(sys.argv) == 1:
        name = "904"
    elif len(sys.argv) == 2:
        name = sys.argv[1]
    else:
        name = "904"
    ts = teststand(
        name
    )  # Initialize a teststand object. This object stores the teststand configuration and has a number of useful methods.

    result = [0] * 24
    registers = []
    for name in register_names:
        registers.append(register(ts, name, 48))  # HERE on "48"

    for i in range(5):
        #print "test",i
        for r in registers:
            #print r.name
            value = getRandomValue()
            values = [value[0:8], '0x' + value[8:16]]
            r.addTestToCache(values[0] + " " + values[1])
        #if not testRandomValue( r ) :
        #	result[q] = result[q] + 1
        #print "ERRORS: ",result

    for r in registers:
        r.testCache()
Exemplo n.º 3
0
def main():
    # Make an acceptance test object:
    at = tests.acceptance(name="reg")  # Create an acceptance test.
    at.start()  # Start the acceptance test by printing some basic things.

    # Variables and simple set up:
    v = at.verbose
    ts = at.ts
    qid = at.qid
    n_wr = at.n  # The number of write/reads to perform per register.
    fe_crate = at.fe_crate
    fe_slot = at.fe_slot

    # Prepare register list:
    registers = []
    ## QIE registers:
    for i_qie in range(1, 25):
        registers.extend([
            register(ts,
                     "HF{0}-{1}-QIE{2}_Lvds".format(fe_crate, fe_slot,
                                                    i_qie), 1),  # 1 bit
            register(ts,
                     "HF{0}-{1}-QIE{2}_Trim".format(fe_crate, fe_slot,
                                                    i_qie), 2),  # 2 bits
            register(
                ts, "HF{0}-{1}-QIE{2}_DiscOn".format(fe_crate, fe_slot, i_qie),
                1),  # 1 bit
            register(ts,
                     "HF{0}-{1}-QIE{2}_TGain".format(fe_crate, fe_slot,
                                                     i_qie), 1),  # 1 bit
            register(
                ts, "HF{0}-{1}-QIE{2}_TimingThresholdDAC".format(
                    fe_crate, fe_slot, i_qie), 8),  # 8 bits
            register(
                ts,
                "HF{0}-{1}-QIE{2}_TimingIref".format(fe_crate, fe_slot,
                                                     i_qie), 3),  # 3 bits
            register(
                ts,
                "HF{0}-{1}-QIE{2}_PedestalDAC".format(fe_crate, fe_slot,
                                                      i_qie), 6),  # 6 bits
            register(
                ts, "HF{0}-{1}-QIE{2}_CapID0pedestal".format(
                    fe_crate, fe_slot, i_qie), 4),  # 4 bits
            register(
                ts, "HF{0}-{1}-QIE{2}_CapID1pedestal".format(
                    fe_crate, fe_slot, i_qie), 4),  # 4 bits
            register(
                ts, "HF{0}-{1}-QIE{2}_CapID2pedestal".format(
                    fe_crate, fe_slot, i_qie), 4),  # 4 bits
            register(
                ts, "HF{0}-{1}-QIE{2}_CapID3pedestal".format(
                    fe_crate, fe_slot, i_qie), 4),  # 4 bits
            register(
                ts, "HF{0}-{1}-QIE{2}_FixRange".format(fe_crate, fe_slot,
                                                       i_qie), 1),  # 1 bit
            register(
                ts, "HF{0}-{1}-QIE{2}_RangeSet".format(fe_crate, fe_slot,
                                                       i_qie), 2),  # 2 bits
            register(
                ts, "HF{0}-{1}-QIE{2}_ChargeInjectDAC".format(
                    fe_crate, fe_slot, i_qie), 3),  # 3 bits
            register(
                ts, "HF{0}-{1}-QIE{2}_RinSel".format(fe_crate, fe_slot, i_qie),
                4),  # 4 bits
            register(
                ts, "HF{0}-{1}-QIE{2}_Idcset".format(fe_crate, fe_slot, i_qie),
                5),  # 5 bits
            register(
                ts, "HF{0}-{1}-QIE{2}_CalMode".format(fe_crate, fe_slot,
                                                      i_qie), 1),  # 1 bit
            register(
                ts, "HF{0}-{1}-QIE{2}_CkOutEn".format(fe_crate, fe_slot,
                                                      i_qie), 1),  # 1 bit
            register(
                ts, "HF{0}-{1}-QIE{2}_TDCMode".format(fe_crate, fe_slot,
                                                      i_qie), 1),  # 1 bit
            register(ts,
                     "HF{0}-{1}-Qie{2}_ck_ph".format(fe_crate, fe_slot,
                                                     i_qie), 4),  # 4 bits
        ])

    ## IGLOO2 registers:
    registers.extend([
        ### Top:
        register(ts, "HF{0}-{1}-iTop_CntrReg_CImode".format(fe_crate, fe_slot),
                 1),  # 1 bit
        register(
            ts,
            "HF{0}-{1}-iTop_CntrReg_InternalQIER".format(fe_crate,
                                                         fe_slot), 1),  # 1 bit
        register(
            ts,
            "HF{0}-{1}-iTop_CntrReg_OrbHistoClear".format(fe_crate, fe_slot),
            1),  # 1 bit
        register(
            ts, "HF{0}-{1}-iTop_CntrReg_OrbHistoRun".format(fe_crate, fe_slot),
            1),  # 1 bit
        register(
            ts,
            "HF{0}-{1}-iTop_CntrReg_WrEn_InputSpy".format(fe_crate, fe_slot),
            1),  # 1 bit
        register(ts, "HF{0}-{1}-iTop_AddrToSERDES".format(fe_crate, fe_slot),
                 16),  # 16 bits
        register(
            ts, "HF{0}-{1}-iTop_CtrlToSERDES_i2c_go".format(fe_crate, fe_slot),
            1),  # 1 bit
        register(
            ts,
            "HF{0}-{1}-iTop_CtrlToSERDES_i2c_write".format(fe_crate, fe_slot),
            1),  # 1 bit
        register(ts, "HF{0}-{1}-iTop_DataToSERDES".format(fe_crate, fe_slot),
                 32),  # 32 bits
        register(ts, "HF{0}-{1}-iTop_LinkTestMode".format(fe_crate, fe_slot),
                 8),  # 8 bit
        register(ts,
                 "HF{0}-{1}-iTop_LinkTestPattern".format(fe_crate, fe_slot),
                 32),  # 32 bits
        #		register(ts, "HF{0}-{1}-iTop_fifo_data_1".format(fe_crate, fe_slot), ?),	# Seems r/o
        #		register(ts, "HF{0}-{1}-iTop_fifo_data_2".format(fe_crate, fe_slot), ?),	# Seems r/o
        #		register(ts, "HF{0}-{1}-iTop_fifo_data_3".format(fe_crate, fe_slot), ?),	# Seems r/o
        register(ts, "HF{0}-{1}-iTop_scratch".format(fe_crate, fe_slot),
                 32),  # 32 bits
        register(ts, "HF{0}-{1}-iTop_UniqueID".format(fe_crate, fe_slot),
                 64),  # 64 bits

        ### Bottom:
        register(ts, "HF{0}-{1}-iBot_CntrReg_CImode".format(fe_crate, fe_slot),
                 1),  # 1 bit
        register(
            ts,
            "HF{0}-{1}-iBot_CntrReg_InternalQIER".format(fe_crate,
                                                         fe_slot), 1),  # 1 bit
        register(
            ts,
            "HF{0}-{1}-iBot_CntrReg_OrbHistoClear".format(fe_crate, fe_slot),
            1),  # 1 bit
        register(
            ts, "HF{0}-{1}-iBot_CntrReg_OrbHistoRun".format(fe_crate, fe_slot),
            1),  # 1 bit
        register(
            ts,
            "HF{0}-{1}-iBot_CntrReg_WrEn_InputSpy".format(fe_crate, fe_slot),
            1),  # 1 bit
        register(ts, "HF{0}-{1}-iBot_AddrToSERDES".format(fe_crate, fe_slot),
                 16),  # 16 bits
        register(
            ts, "HF{0}-{1}-iBot_CtrlToSERDES_i2c_go".format(fe_crate, fe_slot),
            1),  # 1 bit
        register(
            ts,
            "HF{0}-{1}-iBot_CtrlToSERDES_i2c_write".format(fe_crate, fe_slot),
            1),  # 1 bit
        register(ts, "HF{0}-{1}-iBot_DataToSERDES".format(fe_crate, fe_slot),
                 32),  # 32 bits
        register(ts, "HF{0}-{1}-iBot_LinkTestMode".format(fe_crate, fe_slot),
                 8),  # 8 bits
        register(ts,
                 "HF{0}-{1}-iBot_LinkTestPattern".format(fe_crate, fe_slot),
                 32),  # 32 bits
        #		register(ts, "HF{0}-{1}-iBot_fifo_data_1".format(fe_crate, fe_slot), ?),	# Seems r/o
        #		register(ts, "HF{0}-{1}-iBot_fifo_data_2".format(fe_crate, fe_slot), ?),	# Seems r/o
        #		register(ts, "HF{0}-{1}-iBot_fifo_data_3".format(fe_crate, fe_slot), ?),	# Seems r/o
        register(ts, "HF{0}-{1}-iBot_scratch".format(fe_crate, fe_slot),
                 32),  # 32 bits
        register(ts, "HF{0}-{1}-iBot_UniqueID".format(fe_crate, fe_slot),
                 64),  # 64 bits
    ])

    #	result = [0]*24
    #	registers = []
    #	for name in register_names:
    #		registers.append(register(ts, name, 1))		# HERE on "48"

    names = [r.name for r in registers]
    for i in range(n_wr):
        #print "test",i
        for r in registers:
            #			print r.name
            #			value = getRandomValue( r.size )
            #			values = [value[0:32]] #, '0x'+value[8:16] ]
            r.addTestToCache(getRandomValue(r.size))  #+" "+values[1]
            #if not testRandomValue( r ) :
            #	result[q] = result[q] + 1
        #print "ERRORS: ",result
    tex = {}
    errd = {}
    noerr = []
    for r in registers:
        r.setVerbosity(v)  # 0: not verbose, 1: verbose, 2: extra verbose
        r.testCache()
        errd.update({r.name: r.elist})
        noerr.extend(r.elist)
        tex.update(r.tex)


#	print tex

#---------------Last report of errors------------------
    print "\n====== SUMMARY ============================"
    print "Teststand: {0}".format(ts.name)
    print "QIE card: {0} (FE Crate {1}, Slot {2})".format(
        qid, at.fe_crate, at.fe_slot)
    if noerr == []:
        print "[OK] There were no errors!"
    else:
        print "[!!] Errors:"
        for r in registers:
            if errd[r.name] != []:
                print "\t*Register:", str(r.name) + ";", "Data:",
                for i in range(len(errd[r.name])):
                    print str(tuple(errd[r.name][i])) + ";",
                print "\b\b",
                print ""
    print "==========================================="
    #---------------Create histogram-----------------------
    create_plots(at, names, tex, 8)
	return str(hex(randomInt))
		
# MAIN:
if __name__ == "__main__":
	name = ""
	if len(sys.argv) == 1:
		name = "904"
	elif len(sys.argv) == 2:
		name = sys.argv[1]
	else:
		name = "904"
	ts = teststand(name)		# Initialize a teststand object. This object stores the teststand configuration and has a number of useful methods.

	result = [0]*24
	registers = [ 
		     register( ts , "HF1-10-iBot_CntrReg_CImode" , 1 ) , 
		     register( ts , "HF1-10-iBot_CntrReg" , 1 ) , 
		     register( ts , "HF1-10-iBot_LinkTestMode_BC0Enable" , 1 ) , 
		     register( ts , "HF1-10-iBot_LinkTestMode_Enable" , 1 ) , 
		     register( ts , "HF1-10-iBot_LinkTestMode" , 1 ) , 
		     register( ts , "HF1-10-iBot_LinkTestPattern" , 32 ) , 
		     register( ts , "HF1-10-iBot_scratch" , 32 ) , 
		     register( ts , "HF1-10-iTop_CntrReg_CImode" , 1 ) , 
		     register( ts , "HF1-10-iTop_CntrReg" , 1 ) , 
		     register( ts , "HF1-10-iTop_LinkTestMode_BC0Enable" , 1 ) , 
		     register( ts , "HF1-10-iTop_LinkTestMode_Enable" , 1 ) , 
		     register( ts , "HF1-10-iTop_LinkTestMode" , 1 ) , 
		     register( ts , "HF1-10-iTop_LinkTestPattern" , 32 ) , 
		     register( ts , "HF1-10-iTop_scratch" , 32 )
		     ]
	
Exemplo n.º 5
0
# MAIN:
if __name__ == "__main__":
	name = ""
	if len(sys.argv) == 1:
		name = "904"
	elif len(sys.argv) == 2:
		name = sys.argv[1]
	else:
		name = "904"
	ts = teststand(name)		# Initialize a teststand object. This object stores the teststand configuration and has a number of useful methods.

	result = [0]*24
	registers = []
	for name in register_names:
		registers.append(register(ts, name, 48))		# HERE on "48"

	for i in range( 5 ) :
		#print "test",i
		for r in registers :
			#print r.name
		        value = getRandomValue()
			values = [ value[0:8] , '0x'+value[8:16] ]
			r.addTestToCache( values[0]+" "+values[1] )
			#if not testRandomValue( r ) :
			#	result[q] = result[q] + 1
		#print "ERRORS: ",result

	for r in registers : 
		r.testCache()
Exemplo n.º 6
0
def main():
	# Make an acceptance test object:
	at = tests.acceptance(name="reg")		# Create an acceptance test.
	at.start()		# Start the acceptance test by printing some basic things.
	
	# Variables and simple set up:
	v = at.verbose
	ts = at.ts
	qid = at.qid
	n_wr = at.n		# The number of write/reads to perform per register.
	fe_crate = at.fe_crate
	fe_slot = at.fe_slot

	# Prepare register list:
	registers = []
	## QIE registers:
	for i_qie in range(1, 25):
		registers.extend([
			register(ts, "HF{0}-{1}-QIE{2}_Lvds".format(fe_crate, fe_slot, i_qie), 1),		# 1 bit
			register(ts, "HF{0}-{1}-QIE{2}_Trim".format(fe_crate, fe_slot, i_qie), 2),		# 2 bits
			register(ts, "HF{0}-{1}-QIE{2}_DiscOn".format(fe_crate, fe_slot, i_qie), 1),		# 1 bit
			register(ts, "HF{0}-{1}-QIE{2}_TGain".format(fe_crate, fe_slot, i_qie), 1),		# 1 bit
			register(ts, "HF{0}-{1}-QIE{2}_TimingThresholdDAC".format(fe_crate, fe_slot, i_qie), 8),		# 8 bits
			register(ts, "HF{0}-{1}-QIE{2}_TimingIref".format(fe_crate, fe_slot, i_qie), 3),	# 3 bits
			register(ts, "HF{0}-{1}-QIE{2}_PedestalDAC".format(fe_crate, fe_slot, i_qie), 6),	# 6 bits
			register(ts, "HF{0}-{1}-QIE{2}_CapID0pedestal".format(fe_crate, fe_slot, i_qie), 4),	# 4 bits
			register(ts, "HF{0}-{1}-QIE{2}_CapID1pedestal".format(fe_crate, fe_slot, i_qie), 4),	# 4 bits
			register(ts, "HF{0}-{1}-QIE{2}_CapID2pedestal".format(fe_crate, fe_slot, i_qie), 4),	# 4 bits
			register(ts, "HF{0}-{1}-QIE{2}_CapID3pedestal".format(fe_crate, fe_slot, i_qie), 4),	# 4 bits
			register(ts, "HF{0}-{1}-QIE{2}_FixRange".format(fe_crate, fe_slot, i_qie), 1),		# 1 bit
			register(ts, "HF{0}-{1}-QIE{2}_RangeSet".format(fe_crate, fe_slot, i_qie), 2),		# 2 bits
			register(ts, "HF{0}-{1}-QIE{2}_ChargeInjectDAC".format(fe_crate, fe_slot, i_qie), 3),	# 3 bits
			register(ts, "HF{0}-{1}-QIE{2}_RinSel".format(fe_crate, fe_slot, i_qie), 4),		# 4 bits
			register(ts, "HF{0}-{1}-QIE{2}_Idcset".format(fe_crate, fe_slot, i_qie), 5),		# 5 bits
			register(ts, "HF{0}-{1}-QIE{2}_CalMode".format(fe_crate, fe_slot, i_qie), 1),		# 1 bit
			register(ts, "HF{0}-{1}-QIE{2}_CkOutEn".format(fe_crate, fe_slot, i_qie), 1),		# 1 bit
			register(ts, "HF{0}-{1}-QIE{2}_TDCMode".format(fe_crate, fe_slot, i_qie), 1),		# 1 bit
			register(ts, "HF{0}-{1}-Qie{2}_ck_ph".format(fe_crate, fe_slot, i_qie), 4),		# 4 bits
		])
	
	## IGLOO2 registers:
	registers.extend([
		### Top:
		register(ts, "HF{0}-{1}-iTop_CntrReg_CImode".format(fe_crate, fe_slot), 1),		# 1 bit
		register(ts, "HF{0}-{1}-iTop_CntrReg_InternalQIER".format(fe_crate, fe_slot), 1),	# 1 bit
		register(ts, "HF{0}-{1}-iTop_CntrReg_OrbHistoClear".format(fe_crate, fe_slot), 1),	# 1 bit
		register(ts, "HF{0}-{1}-iTop_CntrReg_OrbHistoRun".format(fe_crate, fe_slot), 1),	# 1 bit
		register(ts, "HF{0}-{1}-iTop_CntrReg_WrEn_InputSpy".format(fe_crate, fe_slot), 1),	# 1 bit
		register(ts, "HF{0}-{1}-iTop_AddrToSERDES".format(fe_crate, fe_slot), 16),		# 16 bits
		register(ts, "HF{0}-{1}-iTop_CtrlToSERDES_i2c_go".format(fe_crate, fe_slot), 1),	# 1 bit
		register(ts, "HF{0}-{1}-iTop_CtrlToSERDES_i2c_write".format(fe_crate, fe_slot), 1),	# 1 bit
		register(ts, "HF{0}-{1}-iTop_DataToSERDES".format(fe_crate, fe_slot), 32),		# 32 bits
		register(ts, "HF{0}-{1}-iTop_LinkTestMode".format(fe_crate, fe_slot), 8),		# 8 bit
		register(ts, "HF{0}-{1}-iTop_LinkTestPattern".format(fe_crate, fe_slot), 32),		# 32 bits
#		register(ts, "HF{0}-{1}-iTop_fifo_data_1".format(fe_crate, fe_slot), ?),	# Seems r/o
#		register(ts, "HF{0}-{1}-iTop_fifo_data_2".format(fe_crate, fe_slot), ?),	# Seems r/o
#		register(ts, "HF{0}-{1}-iTop_fifo_data_3".format(fe_crate, fe_slot), ?),	# Seems r/o
		register(ts, "HF{0}-{1}-iTop_scratch".format(fe_crate, fe_slot), 32),			# 32 bits
		register(ts, "HF{0}-{1}-iTop_UniqueID".format(fe_crate, fe_slot), 64),			# 64 bits
		
		### Bottom:
		register(ts, "HF{0}-{1}-iBot_CntrReg_CImode".format(fe_crate, fe_slot), 1),		# 1 bit
		register(ts, "HF{0}-{1}-iBot_CntrReg_InternalQIER".format(fe_crate, fe_slot), 1),	# 1 bit
		register(ts, "HF{0}-{1}-iBot_CntrReg_OrbHistoClear".format(fe_crate, fe_slot), 1),	# 1 bit
		register(ts, "HF{0}-{1}-iBot_CntrReg_OrbHistoRun".format(fe_crate, fe_slot), 1),	# 1 bit
		register(ts, "HF{0}-{1}-iBot_CntrReg_WrEn_InputSpy".format(fe_crate, fe_slot), 1),	# 1 bit
		register(ts, "HF{0}-{1}-iBot_AddrToSERDES".format(fe_crate, fe_slot), 16),		# 16 bits
		register(ts, "HF{0}-{1}-iBot_CtrlToSERDES_i2c_go".format(fe_crate, fe_slot), 1),	# 1 bit
		register(ts, "HF{0}-{1}-iBot_CtrlToSERDES_i2c_write".format(fe_crate, fe_slot), 1),	# 1 bit
		register(ts, "HF{0}-{1}-iBot_DataToSERDES".format(fe_crate, fe_slot), 32),		# 32 bits
		register(ts, "HF{0}-{1}-iBot_LinkTestMode".format(fe_crate, fe_slot), 8),		# 8 bits
		register(ts, "HF{0}-{1}-iBot_LinkTestPattern".format(fe_crate, fe_slot), 32),		# 32 bits
#		register(ts, "HF{0}-{1}-iBot_fifo_data_1".format(fe_crate, fe_slot), ?),	# Seems r/o
#		register(ts, "HF{0}-{1}-iBot_fifo_data_2".format(fe_crate, fe_slot), ?),	# Seems r/o
#		register(ts, "HF{0}-{1}-iBot_fifo_data_3".format(fe_crate, fe_slot), ?),	# Seems r/o
		register(ts, "HF{0}-{1}-iBot_scratch".format(fe_crate, fe_slot), 32),			# 32 bits
		register(ts, "HF{0}-{1}-iBot_UniqueID".format(fe_crate, fe_slot), 64),			# 64 bits
	])

#	result = [0]*24
#	registers = []
#	for name in register_names:
#		registers.append(register(ts, name, 1))		# HERE on "48"

	names = [r.name for r in registers]
	for i in range(n_wr):
		#print "test",i
		for r in registers:
#			print r.name
#			value = getRandomValue( r.size )
#			values = [value[0:32]] #, '0x'+value[8:16] ]
			r.addTestToCache( getRandomValue( r.size ) ) #+" "+values[1]
			#if not testRandomValue( r ) :
			#	result[q] = result[q] + 1
		#print "ERRORS: ",result
	tex = {}
	errd = {}
	noerr = []
	for r in registers:
		r.setVerbosity(v)		# 0: not verbose, 1: verbose, 2: extra verbose
		r.testCache()
		errd.update({r.name: r.elist})
		noerr.extend(r.elist)
		tex.update(r.tex)
#	print tex


#---------------Last report of errors------------------
	print "\n====== SUMMARY ============================"
	print "Teststand: {0}".format(ts.name)
	print "QIE card: {0} (FE Crate {1}, Slot {2})".format(qid, at.fe_crate, at.fe_slot)
	if noerr == []:
		print "[OK] There were no errors!"
	else:
		print "[!!] Errors:"
		for r in registers:
			if errd[r.name] != []:
				print "\t*Register:", str(r.name) + ";", "Data:",
				for i in range(len(errd[r.name])):
					print str(tuple(errd[r.name][i])) + ";",
				print "\b\b",
				print ""
	print "==========================================="
#---------------Create histogram-----------------------
	create_plots(at, names, tex, 8)
			
	return str(hex(randomInt))
		
# MAIN:
if __name__ == "__main__":
	parser=OptionParser()
	parser.add_option('-t','--teststand',dest='name',default='904',help="The name of the teststand you want to use (default is \"904\").")
	parser.add_option('-q','--qieid',dest='qieid',default='0x8D000000 0xAA24DA70',help="The ID of the QIE card we read.")
	(options, args) = parser.parse_args()
	ts = teststand(options.name)
	crateslot=ts.crate_slot_from_qie(qie_id=options.qieid)
	crate=crateslot[0]
	slot=crateslot[1]
	result = [0]*24
	registers = [ 
		     register( ts , "HF{0}-{1}-iBot_CntrReg_CImode".format(crate,slot) , 1 ) , 
		     register( ts , "HF{0}-{1}-iBot_CntrReg".format(crate,slot), 1 ) , 
		     register( ts , "HF{0}-{1}-iBot_LinkTestMode_BC0Enable".format(crate,slot), 1 ) , 
		     register( ts , "HF{0}-{1}-iBot_LinkTestMode_Enable".format(crate,slot) , 1 ) , 
		     register( ts , "HF{0}-{1}-iBot_LinkTestMode".format(crate,slot) , 1 ) , 
		     register( ts , "HF{0}-{1}-iBot_LinkTestPattern".format(crate,slot) , 32 ) , 
		     register( ts , "HF{0}-{1}-iBot_scratch".format(crate,slot) , 32 ) , 
		     register( ts , "HF{0}-{1}-iTop_CntrReg_CImode".format(crate,slot) , 1 ) , 
		     register( ts , "HF{0}-{1}-iTop_CntrReg".format(crate,slot) , 1 ) , 
		     register( ts , "HF{0}-{1}-iTop_LinkTestMode_BC0Enable".format(crate,slot) , 1 ) , 
		     register( ts , "HF{0}-{1}-iTop_LinkTestMode_Enable".format(crate,slot) , 1 ) , 
		     register( ts , "HF{0}-{1}-iTop_LinkTestMode".format(crate,slot) , 1 ) , 
		     register( ts , "HF{0}-{1}-iTop_LinkTestPattern".format(crate,slot) , 32 ) , 
		     register( ts , "HF{0}-{1}-iTop_scratch".format(crate,slot) , 32 )
		     ]
	
# MAIN:
if __name__ == "__main__":
	name = ""
	if len(sys.argv) == 1:
		name = "904"
	elif len(sys.argv) == 2:
		name = sys.argv[1]
	else:
		name = "904"
	ts = teststand(name)		# Initialize a teststand object. This object stores the teststand configuration and has a number of useful methods.

	result = [0]*24
	registers = []
	for q in range(24) : 
		registers.append( register(ts,"HF1-10-QIE{0}".format(q+1),48) )

	for i in range( 5 ) :
		#print "test",i
		for r in registers :
			#print r.name
		        value = getRandomValue()
			values = [ value[0:8] , '0x'+value[8:16] ]
			r.addTestToCache( values[0]+" "+values[1] )
			#if not testRandomValue( r ) :
			#	result[q] = result[q] + 1
		#print "ERRORS: ",result

	for r in registers : 
		r.testCache()
     dest='name',
     default='904',
     help="The name of the teststand you want to use (default is \"904\").")
 parser.add_option('-q',
                   '--qieid',
                   dest='qieid',
                   default='0x8D000000 0xAA24DA70',
                   help="The ID of the QIE card we read.")
 (options, args) = parser.parse_args()
 ts = teststand(options.name)
 crateslot = ts.crate_slot_from_qie(qie_id=options.qieid)
 crate = crateslot[0]
 slot = crateslot[1]
 result = [0] * 24
 registers = [
     register(ts, "HF{0}-{1}-iBot_CntrReg_CImode".format(crate, slot), 1),
     register(ts, "HF{0}-{1}-iBot_CntrReg".format(crate, slot), 1),
     register(ts,
              "HF{0}-{1}-iBot_LinkTestMode_BC0Enable".format(crate,
                                                             slot), 1),
     register(ts, "HF{0}-{1}-iBot_LinkTestMode_Enable".format(crate, slot),
              1),
     register(ts, "HF{0}-{1}-iBot_LinkTestMode".format(crate, slot), 1),
     register(ts, "HF{0}-{1}-iBot_LinkTestPattern".format(crate, slot), 32),
     register(ts, "HF{0}-{1}-iBot_scratch".format(crate, slot), 32),
     register(ts, "HF{0}-{1}-iTop_CntrReg_CImode".format(crate, slot), 1),
     register(ts, "HF{0}-{1}-iTop_CntrReg".format(crate, slot), 1),
     register(ts,
              "HF{0}-{1}-iTop_LinkTestMode_BC0Enable".format(crate,
                                                             slot), 1),
     register(ts, "HF{0}-{1}-iTop_LinkTestMode_Enable".format(crate, slot),