def open_circuit(self, port=2):
"""Apply a open-circuit to specified port and return a
two-port object"""
# Remove the unwanted port from the Zmatrix.
Z = self.Z.copy()
Z.row_del(port - 1)
Z.col_del(port - 1)
Z = ZMatrix(Z)
Voc = self.Voc.copy()
Voc.row_del(port - 1)
return TwoPortZModel(Z, Vs(Voc[0]), Vs(Voc[1]))
def short_circuit(self, port=2):
"""Apply a short-circuit to specified port and return a
two-port object"""
# Remove the unwanted port from the Ymatrix.
Y = self.Y.copy()
Y.row_del(port - 1)
Y.col_del(port - 1)
Y = YMatrix(Y)
# CHECKME, perhaps use Isc?
Voc = self.Voc.copy()
Voc.row_del(port - 1)
return TwoPortZModel(Y.Z, Vs(Voc[0]), Vs(Voc[1]))
def bridge(self, OP, inport=1, outport=2):
"""Bridge the specified ports with a one-port element"""
self._portcheck(inport)
self._portcheck(outport)
# Create two-port series element.
s = Series(OP)
# The impedance matrix for a series element is infinite.
Y3 = YMatrix3(((0, 0, 0), (0, 0, 0), (0, 0, 0)))
Y2 = s.Y
p1 = inport - 1
p2 = outport - 1
Y3[p1, p1] = Y2[0, 0]
Y3[p2, p2] = Y2[1, 1]
Y3[p1, p2] = Y2[0, 1]
Y3[p2, p1] = Y2[1, 0]
Y = self.Y + Y3
Isc = self.Isc
Isc[p1] -= OP.Isc
Isc[p2] += OP.Isc
Z = Y.Z
Voc = VsVector([Vs(Isc[m] * Z[m, m]) for m in range(len(Isc))])
return ThreePort(Y.Z, Voc)
def __init__(self, v):
self.args = (v, )
v = cExpr(v)
super(Vdc, self).__init__(Vs(v, dc=True) / s)
# This is not needed when assumptions propagated.
self.Voc.is_dc = True
self.v0 = v
def __init__(self, Zval=Zs(0), Vval=Vs(0)):
# print('<T> Z:', Zval, 'V:', Vval)
if not isinstance(Zval, Zs):
raise ValueError('Zval not Zs')
if not isinstance(Vval, Vs):
raise ValueError('Vval not Vs')
self.Z = Zval
self.Voc = Vval
super(Thevenin, self).__init__()
def Vresponse(self, V, inport=1, outport=2):
"""Return voltage response for specified applied voltage and
specified ports"""
self._portcheck(inport)
self._portcheck(outport)
p1 = inport - 1
p2 = outport - 1
H = self.Z[p2, p1] / self.Z[p1, p1]
return Vs(self.Voc[p2] + (V - self.Voc[p1]) * H)
def __init__(self, V, phi=0):
self.args = (V, phi)
V = cExpr(V)
phi = cExpr(phi)
# Note, cos(-pi / 2) is not quite zero.
self.omega = symbol('omega_1', real=True)
foo = (s * sym.cos(phi) + self.omega * sym.sin(phi)) / (s**2 +
self.omega**2)
super(Vac, self).__init__(Vs(foo * V, ac=True))
# This is not needed when assumptions propagated.
self.Voc.is_ac = True
self.v0 = V
self.phi = phi
def attach_parallel(self, OP, port=2):
"""Attach one-port in parallel to specified port"""
if not issubclass(OP.__class__, OnePort):
raise TypeError('Argument not ', OnePort)
self._portcheck(port)
p = port - 1
Y = self.Y
Y[p, p] += OP.Y
Isc = self.Isc
Isc[p] += OP.Isc
Z = Y.Z
Voc = VsVector([Vs(Isc[m] * Z[m, m]) for m in range(len(Isc))])
return ThreePort(Z, Voc)
def __init__(self, Cval, v0=None):
self.hasic = v0 is not None
if v0 is None:
v0 = 0
if self.hasic:
self.args = (Cval, v0)
else:
self.args = (Cval, )
Cval = cExpr(Cval)
v0 = cExpr(v0)
self.C = Cval
self.v0 = v0
self._Z = Zs.C(Cval)
self._Voc = Vsuper(Vs(v0) / s)
self.zeroic = self.v0 == 0
def __init__(self, Cval, v0=None):
self.hasic = v0 is not None
if v0 is None:
v0 = 0
if self.hasic:
self.args = (Cval, v0)
else:
self.args = (Cval, )
Cval = cExpr(Cval, positive=True)
v0 = cExpr(v0)
super(C, self).__init__(Zs.C(Cval), Vs(v0).integrate())
self.C = Cval
self.v0 = v0
self.zeroic = self.v0 == 0
def __init__(self, Lval, i0=None):
self.hasic = i0 is not None
if i0 is None:
i0 = 0
if self.hasic:
self.args = (Lval, i0)
else:
self.args = (Lval, )
Lval = cExpr(Lval, positive=True)
i0 = cExpr(i0)
super(L, self).__init__(Zs.L(Lval), -Vs(i0 * Lval))
self.L = Lval
self.i0 = i0
self.zeroic = self.i0 == 0
def __init__(self, Lval, i0=None):
self.hasic = i0 is not None
if i0 is None:
i0 = 0
if self.hasic:
self.args = (Lval, i0)
else:
self.args = (Lval, )
Lval = cExpr(Lval)
i0 = cExpr(i0)
self.L = Lval
self.i0 = i0
self._Z = Zs.L(Lval)
self._Voc = Vsuper(-Vs(i0 * Lval))
self.zeroic = self.i0 == 0
def parallel(self, MP, port=None):
"""Return the model with, MP, in parallel"""
if issubclass(MP.__class__, OnePort):
return self.attach_parallel(MP, port)
if issubclass(MP.__class__, TwoPort):
# We could special case a series or shunt network here.
raise NotImplementedError('TODO')
if not issubclass(MP.__class__, ThreePort):
raise TypeError('Argument not ', ThreePort)
Y = self.Y + MP.Y
Isc = self.Isc + MP.Isc
Z = Y.Z
Voc = VsVector([Vs(Isc[m] * Z[m, m]) for m in range(len(Isc))])
return ThreePort(Z, Voc)
def __init__(self, Vval):
self.args = (Vval, )
Vsym = tsExpr(Vval)
super(V, self).__init__(Vs(Vsym))
def __init__(self, vval):
self.args = (vval, )
Vval = tExpr(vval)
super(V, self).__init__(Zs(0), Vs(Vval).laplace())
self.assumptions_infer(Vval)
def __init__(self, Vval):
super(VoltageSource, self).__init__(Zs(0), Vs(Vval))
def __init__(self, Vval):
self.args = (Vval, )
Vval = sExpr(Vval)
super(sV, self).__init__(Vs(Vval))
def __init__(self, Vval):
self.args = (Vval, )
Vval = sExpr(Vval)
self._Voc = Vsuper(Vs(Vval))
