def check_graph(rr_graph_file, filter):
'''
Check that the rr_graph has connections from all SOURCE nodes to all SINK nodes.
'''
print('Loading the routing graph file')
g = graph.Graph(rr_graph_file, verbose=True, clear_fabric=False)
routing_graph = g.routing
print('Checking if all source nodes connect to all sink nodes.')
inaccessible_nodes = inaccessible_sink_node_ids_by_source_node_id(
g, filter)
if inaccessible_nodes:
print('FAIL')
node_map = routing_graph._ids_map(graph.RoutingNode)
for source_id, sink_ids in inaccessible_nodes.items():
source_node = graph.RoutingGraphPrinter.node(
node_map[source_id], g.block_grid)
sink_nodes = [
graph.RoutingGraphPrinter.node(node_map[i], g.block_grid)
for i in sink_ids
]
print('Node {} does not connect to nodes:.'.format(source_node))
for n in sink_nodes:
print(' ', n)
print()
import pdb
pdb.set_trace()
else:
print('SUCCESS')
def rebuild_graph(fn, fn_out, rcw=6, verbose=False):
"""
Add rcw tracks spanning full channel to both X and Y channels
Connect all of those to all the adjacent pins
Fully connect tracks at intersections
For intersections this means we actually have two edges per intersection
since source and sink must be specified
"""
print('Importing input g')
g = graph.Graph(rr_graph_file=fn, verbose=verbose, clear_fabric=False)
# g.print_graph(g, verbose=False)
print('Source g loaded')
print_nodes_edges(g)
grid_sz = g.block_grid.size
print("Grid size: %s" % (grid_sz, ))
print('Exporting pin placement')
pin_sides = g.extract_pin_sides()
def get_pin_sides(block, pin):
return pin_sides[(block.position, pin.name)]
print()
# Remove existing rr_graph
print('Clearing nodes and edges')
g.routing.clear()
print('Clearing channels')
g.channels.clear()
print('Cleared original g')
print_nodes_edges(g)
print()
print('Rebuilding block I/O nodes')
g.create_block_pins_fabric(g.switches['__vpr_delayless_switch__'],
get_pin_sides)
print_nodes_edges(g)
print()
create_tracks(g, grid_sz, rcw, verbose=verbose)
print()
connect_blocks_to_tracks(g, grid_sz, rcw, g.switches[0])
print()
connect_tracks_to_tracks(g, g.switches[0], verbose=verbose)
print()
print("Completed rebuild")
print_nodes_edges(g)
if fn_out:
print('Writing to %s' % fn_out)
open(fn_out, 'w').write(
ET.tostring(g.to_xml(), pretty_print=True).decode('ascii'))
else:
print("Printing")
print(ET.tostring(g.to_xml(), pretty_print=True).decode('ascii'))
return g
def main():
import argparse
parser = argparse.ArgumentParser("Print rr_graph.xml file")
parser.add_argument("--lim", type=int, default=0)
parser.add_argument("rr_graph")
args = parser.parse_args()
g = graph.Graph(args.rr_graph)
print_graph(g, lim=args.lim)
def init(device_name, read_rr_graph):
global ic
ic = icebox.iceconfig()
{
#'t4': ic.setup_empty_t4,
'8k': ic.setup_empty_8k,
'5k': ic.setup_empty_5k,
'1k': ic.setup_empty_1k,
'384': ic.setup_empty_384,
}[device_name]()
print('Loading rr_graph')
g = graph.Graph(read_rr_graph, clear_fabric=True)
g.set_tooling(name="icebox",
version="dev",
comment="Generated for iCE40 {} device".format(device_name))
return ic, g
def main():
import argparse
parser = argparse.ArgumentParser()
parser.add_argument("rr_graph_in")
parser.add_argument("rr_graph_out")
args = parser.parse_args()
fn = args.rr_graph_in
fn_out = args.rr_graph_out
assert fn != fn_out
print('Loading graph')
g = graph.Graph(rr_graph_file=fn)
print('Converting to XML')
e = g.to_xml()
print('Dumping')
open(fn_out, 'w').write(ET.tostring(e, pretty_print=True).decode('ascii'))
print('Exiting')
def patch_rr_graph(filename_in, filename_out, verbose=False):
print('Importing input g')
g = graph.Graph(rr_graph_file=filename_in,
verbose=verbose,
clear_fabric=True,
sides=side_for)
print('Source g loaded')
print("Grid size: %s" % (g.block_grid.size, ))
print()
create_tracks(g, verbose=verbose)
print()
print("Completed rebuild")
if filename_out:
print('Writing to %s' % filename_out)
open(filename_out, 'w').write(
ET.tostring(g.to_xml(), pretty_print=True).decode('ascii'))
else:
print("Printing")
print(ET.tostring(g.to_xml(), pretty_print=True).decode('ascii'))
return g
def init(device_name, read_rr_graph):
ic = icebox.iceconfig()
{
#'t4': ic.setup_empty_t4,
'8k': ic.setup_empty_8k,
'5k': ic.setup_empty_5k,
'1k': ic.setup_empty_1k,
'384': ic.setup_empty_384,
}[device_name]()
fn_dir = {
't4': 'test4',
'8k': 'HX8K',
'5k': 'HX5K',
'1k': 'HX1K',
'384': 'LP384',
}[device_name]
if read_rr_graph:
ref_rr_fn = read_rr_graph
else:
ref_rr_fn = '../../tests/build/ice40/{}/wire.rr_graph.xml'.format(
fn_dir)
# Load g stuff we care about
# (basically omit rr_nodes)
# clear_fabric reduces load time from about 11.1 => 2.8 sec on my machine
# seems to be mostly from the edges?
print('Loading rr_graph')
g = graph.Graph(ref_rr_fn, clear_fabric=True)
g.set_tooling(name="icebox",
version="dev",
comment="Generated for iCE40 {} device".format(device_name))
print('Indexing icebox net names')
nn = NetNames(ic)
return ic, g, nn
