Exemplo n.º 1
0
class BramPortAgent(BramPort_withoutClkAgent):

    def getDrivers(self):
        drivers = super(BramPortAgent, self).getDrivers()
        self.clk_ag = ClockAgent(self.sim, self.intf.clk)
        drivers.extend(self.clk_ag.getDrivers())
        return drivers
Exemplo n.º 2
0
    def test_sim_normal_agents(self):
        # build_dir = "tmp"
        # if True:
        with TemporaryDirectory() as build_dir:
            rtl_sim = self.cntr_build(build_dir)
            io = rtl_sim.io
            sim = HdlSimulator(rtl_sim)
            data = []
            procs = [
                *ClockAgent(sim, io.clk).getDrivers(),
                *PullDownAgent(sim, io.rst).getDrivers(),
                *PullUpAgent(sim, io.en, initDelay=CLK_PERIOD).getDrivers(),
                get_sync_sig_monitor(sim, io.val, io.clk, io.rst, data)
            ]
            rtl_sim.set_trace_file(join(build_dir, "cntr.vcd"), -1)
            sim.run(CLK_PERIOD * 10.5, extraProcesses=procs)

            self.assertSequenceEqual(data, REF_DATA)
    def _test_pass_data(self, initFn):
        # build_dir = "tmp"
        # if True:
        with TemporaryDirectory() as build_dir:
            rtl_sim = self.hw_build(build_dir)
            io = rtl_sim.io
            sim = HdlSimulator(rtl_sim)

            din_ag, dout_ag = generate_handshaked_agents(
                sim, io, io.clk, io.rst_n)

            extra_procs = initFn(sim, din_ag, dout_ag)
            if extra_procs is None:
                extra_procs = []

            proc = [
                *ClockAgent(sim, io.clk, CLK_PERIOD).getDrivers(),
                *PullUpAgent(sim, io.rst_n, CLK_PERIOD).getDrivers(),
                *din_ag.getDrivers(),
                *dout_ag.getMonitors(),
                *extra_procs,
            ]
            sim.run(CLK_PERIOD * 20.5, extraProcesses=proc)
            return sim, din_ag, dout_ag
Exemplo n.º 4
0
Arquivo: std.py Projeto: saislam/hwt
 def _initSimAgent(self, sim: HdlSimulator):
     self._ag = ClockAgent(sim, self, period=int(freq_to_period(self.FREQ)))
Exemplo n.º 5
0
 def _initSimAgent(self, sim: HdlSimulator):
     self._ag = ClockAgent(sim, self)