def test_invalid_connect_outside_hierarchy():
class Top( ComponentLevel3 ):
def construct( s ):
s.wire = InPort(Bits32)
try:
x = Top()
x.elaborate()
connect( x.wire, Bits32(8) )
except InvalidConnectionError as e:
print("{} is thrown\n{}".format( e.__class__.__name__, e ))
return
raise Exception("Should've thrown InvalidConnectionError.")
def construct(s):
s.src_in0 = TestSource(int, [4, 3, 2, 1])
s.src_sel = TestSource(int, [1, 0, 1, 0])
s.sink = TestSink(int, [12, 3, 12, 1])
s.mux = Mux(int, 2)(
out=s.sink.in_,
in_={
MUX_SEL_0: s.src_in0.out
},
sel=s.src_sel.out,
)
connect(s.mux.in_[MUX_SEL_1], 12)
def construct( s ):
s.src = TestSource( Bits32, [4,3,2,1,4,3,2,1] )
s.sink = TestSink ( Bits32, ["*",(5+5+6+6),(4+4+5+5),(3+3+4+4),(2+2+3+3),
(5+5+6+6),(4+4+5+5),(3+3+4+4),(2+2+3+3)] )
s.wire0 = Wire(Bits32)
@s.update
def up_from_src():
s.wire0 = s.src.out + 1
s.reg = Wire(Bits32)
@s.update_ff
def up_reg():
s.reg <<= s.wire0
s.wire1 = Wire(Bits32)
s.wire2 = Wire(Bits32)
connect( s.wire1, s.reg )
@s.update
def upA():
s.wire2 = s.reg + 1
s.wire3 = Wire(Bits32)
s.wire4 = Wire(Bits32)
connect( s.wire3, s.wire1 )
connect( s.wire4, s.wire1 )
s.wire5 = Wire(Bits32)
s.wire6 = Wire(Bits32)
connect( s.wire5, s.wire2 )
connect( s.wire6, s.wire2 )
s.wire7 = Wire(Bits32)
s.wire8 = Wire(Bits32)
@s.update
def upD():
s.wire7 = s.wire3 + s.wire6
s.wire8 = s.wire4 + s.wire5
@s.update
def up_to_sink():
s.sink.in_ = s.wire7 + s.wire8
def construct(s):
s.src = SimpleTestSource([1, 2, 3, 4])
s.mid = [PassThrough() for _ in range(5)]
s.sink = TestSinkUp([1, 2, 3, 4])
connect(s.src.req, s.mid[0].req)
connect(s.src.req_rdy, s.mid[0].req_rdy)
for i in range(4):
s.mid[i].resp //= s.mid[i + 1].req
s.mid[i].resp_rdy //= s.mid[i + 1].resp_rdy
s.mid[4].resp //= s.sink.resp
s.mid[4].resp_rdy //= s.sink.resp_rdy
def construct(s):
s.x = Wire(Bits24)
s.A = Wire(Bits32)
connect(s.A[8:32], s.x)
@s.update
def up_wr_A():
s.A = Bits32(0x12345678)
@s.update
def up_rd_x():
assert s.x == 0x123456
def construct(s):
s.x = Wire(Bits24)
s.A = Wire(Bits32)
connect(s.x, s.A[8:32])
@s.update
def up_wr_As():
s.A[0:24] = Bits24(0x123456)
@s.update
def up_wr_x():
s.x = Bits24(0x654321)
def construct(s):
s.x = Wire(Bits32)
s.A = Wire(Bits32)
connect(s.A, s.x)
@update
def up_wr_x():
s.x @= Bits32(123)
@update
def up_rd_As():
assert s.A[0:16] == 123
def construct(s):
s.x = Wire(Bits24)
s.A = Wire(Bits32)
connect(s.A[0:24], s.x)
@update
def up_wr_x():
s.x @= Bits24(0x123456)
@update
def up_rd_As():
assert s.A[0:16] == 0x3456
def construct(s):
s.recv = CalleeIfcCL()
s.send = CallerIfcCL()
s.queue = SimpleQueue()
connect(s.recv, s.queue.enq)
s.v = None
@s.update
def deq_incr():
s.v = None
if s.queue.deq.rdy() and s.send.rdy():
s.v = s.queue.deq() + 1
s.send(s.v)
def construct(s):
s.x = Wire(Bits32)
s.A = Wire(SomeMsg)
s.y = Wire(SomeMsg)
connect(s.A.b, s.x)
connect(s.A, s.y)
@s.update
def up_rd_x():
z = s.x
@s.update
def up_wr_y():
s.y = SomeMsg(12, 123)
def construct(s):
s.x = Wire(Bits24)
s.A = Wire(Bits32)
s.y = Wire(Bits4)
connect(s.A[8:32], s.x)
connect(s.A[0:4], s.y)
@update
def up_rd_x():
assert s.x == 0
@update
def up_wr_y():
s.y @= Bits4(0xf)
def construct(s):
s.x = Wire(Bits24)
s.A = Wire(Bits32)
s.y = Wire(Bits16)
connect(s.A[8:32], s.x)
connect(s.A[0:16], s.y)
@update
def up_rd_x():
assert s.x == 0x12
@update
def up_wr_y():
s.y @= Bits16(0x1234)
def construct(s):
s.x = Wire(Bits24)
s.A = Wire(Bits32)
s.y = Wire(Bits32)
connect(s.A[8:32], s.x)
connect(s.A, s.y)
@s.update
def up_wr_x():
s.x = Bits24(0x123456)
@s.update
def up_rd_y():
assert s.y == 0x12345600
def construct(s):
s.x = Wire(Bits24)
s.A = Wire(Bits32)
s.y = Wire(Bits32)
connect(s.A[8:32], s.x)
connect(s.A, s.y)
@update
def up_rd_x():
assert s.x == 0x123456
@update
def up_wr_y():
s.y @= Bits32(0x12345678)
def construct(s):
s.x = Wire(Bits24)
s.A = Wire(Bits32)
s.y = Wire(Bits16)
connect(s.A[8:32], s.x)
connect(s.A[0:16], s.y)
@update
def up_wr_x():
s.x @= Bits24(0x123456)
@update
def up_wr_y():
s.y @= Bits16(0x1234)
def construct(s):
s.x = Wire(Bits24)
s.y = Wire(Bits24)
s.A = Wire(Bits32)
connect(s.A[8:32], s.x)
connect(s.x, s.y)
@update
def up_wr_x():
s.x @= Bits24(0x123456)
@update
def up_wr_A():
s.A @= Bits32(0x12345678)
def construct(s):
s.x = Wire(Bits24)
s.A = Wire(Bits32)
connect(s.x, s.A[8:32])
@update
def up_wr_As():
s.A[0:4] @= Bits4(0xf)
@update
def up_wr_x():
s.x @= Bits24(0x654321)
@update
def up_rd_A():
assert s.A == 0x6543210f
def construct(s):
s.src_in0 = TestSource(Bits32, [4, 3, 2, 1])
s.src_in1 = TestSource(Bits32, [8, 7, 6, 5])
s.src_sel = TestSource(Bits1, [1, 0, 1, 0])
s.sink = TestSink(Bits32, [8, 3, 6, 1])
s.mux = Mux(Bits32, 2)
connect(s.mux.in_[MUX_SEL_0], s.src_in0.out)
connect(s.mux.in_[MUX_SEL_1], s.src_in1.out)
connect(s.mux.sel, s.src_sel.out)
connect(s.sink.in_, s.mux.out)
def construct(s):
s.src = [
TestSourceValRdy(Bits8, [i, i + 1, i + 2, i, i + 1, i + 2])
for i in range(4)
]
# (0+1+2+3)*4=24, (1+2+3+4)*4=40, (2+3+4+5)*5=56
s.sink = TestSinkValRdy(Bits8, [24, 40, 56, 24, 40, 56])
s.sb = SuperBundle(Bits8)
s.wire = [[Wire(Bits8) for i in range(4)] for j in range(4)]
for i in range(4):
connect(s.src[i].out.rdy, s.sink.in_.rdy)
for j in range(4):
connect(s.sb.req[i][j].msg, s.src[i].out.msg)
connect(s.wire[i][j], s.sb.req[i][j].msg)
@s.update
def up_from_req():
s.sink.in_.val = 1
s.sink.in_.msg = 0
for i in range(4):
for j in range(4):
s.sink.in_.msg += s.wire[i][j]
def construct(s):
s.recv = NonBlockingCalleeIfc()
s.send = NonBlockingCallerIfc()
s.q0 = QueueIncr()
s.q1 = QueueIncr()
connect(s.recv, s.q0.recv)
connect(s.q0.send, s.q1.recv)
connect(s.q1.send, s.send)
def construct( s ):
s.recv = CalleeIfcCL()
s.send = CallerIfcCL()
s.q0 = QueueIncr()
s.q1 = QueueIncr()
connect( s.recv, s.q0.recv )
connect( s.q0.send, s.q1.recv )
connect( s.q1.send, s.send )
def construct(s):
s.w = Wire(SomeMsg)
s.x = Wire(SomeMsg)
s.y = Wire(SomeMsg)
s.z = Wire(SomeMsg)
connect(s.w, s.x) # net1
connect(s.x.a, s.y.a) # net2
connect(s.y, s.z) # net3
@s.update
def up_wr_s_w():
s.w = SomeMsg(12, 123)
def construct(s):
s.w = Wire(Bits32)
s.x = Wire(Bits32)
s.y = Wire(Bits32)
s.z = Wire(Bits32)
connect(s.w[0:16], s.x[8:24]) # net1
connect(s.x[16:32], s.y[0:16]) # net2
connect(s.y[8:24], s.z[0:16]) # net3
@update
def up_wr_s_w():
s.w @= Bits32(0x12345678)
def construct(s):
s.A = Wire(Bits32)
s.x = Wire(Bits16)
s.y = Wire(Bits16)
s.z = Wire(Bits16)
connect(s.A[0:16], s.x) # net1
connect(s.A[8:24], s.y) # net2
connect(s.A[16:32], s.z) # net3
@update
def up_wr_s_w():
s.x @= Bits16(0x1234)
def construct(s):
s.A = Wire(Msg3)
s.x = Wire(Msg1)
s.y = Wire(Msg2)
s.z = Wire(Msg3)
s.w = Wire(int)
connect(s.A.y.p, s.x)
connect(s.A.z, s.w)
connect(s.A, s.z)
@s.update
def up_z():
yy = s.z
@s.update
def up_rd_x():
zz = s.x
@s.update
def up_wr_y():
s.w = Msg2(12, 123)
def construct(s):
s.in_ = InPort(B)
s.out = OutPort(Bits32)
# PyMTL mistakenly takes s.in_.foo[1] as a single bit!
connect(s.out, s.in_.foo[1])
def construct( s ):
s.a = A()
s.b = B()
for i in range( 10 ):
connect( s.b.recv[i], s.a.send[i] )
def construct( s ): s.a = A() s.b = B() connect( s.a.send, s.b.recv )
def construct(s):
s.wire = Wire(32)
s.A = AWrap()
connect(s.wire, s.A.A.out)
def construct(s):
s.a = A()
s.b = BWrap()
connect(s.a.out, s.b.in_)