def test_all_does_simulation_correct(self): r = pyrtl.Register(3, 'r') r.next <<= r + 1 a, b, c = r[0], r[1], r[2] o = pyrtl.Output(name='o') o <<= pyrtl.rtl_all(a, b, c) self.check_trace('o 00000001\nr 01234567\n')
def test_all_works_with_consts(self): a = pyrtl.WireVector(name='a', bitwidth=1) c = pyrtl.WireVector(name='c', bitwidth=1) r = pyrtl.rtl_all(a, 1, c)
def test_all_only_on_1_bit_vectors(self): a = pyrtl.WireVector(name='a', bitwidth=1) b = pyrtl.WireVector(name='b', bitwidth=1) c = pyrtl.WireVector(name='c', bitwidth=3) with self.assertRaises(pyrtl.PyrtlError): r = pyrtl.rtl_all(a, b, c)
def vmax(t, *in_list): combo_list = list(itertools.combinations(in_list, t)) prod_list = [pyrtl.rtl_all(*x) for x in combo_list] o = pyrtl.rtl_any(*prod_list) return o
def si(a, b, k, pke, pai, pbi, pae, pbe): index = rmin(rdelta(pai, a), rdelta(pbi, b)) a0 = pyrtl.rtl_any(rdelta(pae, a), rdelta(pbe, b), rdelta(pke, k)) a1 = pyrtl.rtl_all(rdelta(pae, a), rdelta(pbe, b), pke) o = mux(index, a0, a1) return o