def mm_lt24lcdsys(clock, reset,
lcd_on, lcd_resetn, lcd_csn, lcd_rs,
lcd_wrn, lcd_rdn, lcd_data):
"""
"""
# interfaces
glbl = Global(clock, reset)
lcd = LT24Interface()
resolution = lcd.resolution
color_depth = lcd.color_depth
refresh_rate = 60
vmem = VideoMemory(resolution=resolution, color_depth=color_depth)
# assign the ports to the interface
lcd.assign(lcd_on, lcd_resetn, lcd_csn, lcd_rs, lcd_wrn,
lcd_rdn, lcd_data)
# simulation mode, reduce the dead time between real-world ticks
# modules
gtck = glbl_timer_ticks(glbl, user_timer=16, tick_div=100)
gbar = color_bars(glbl, vmem, resolution=resolution,
color_depth=color_depth)
glcd = lt24lcd(glbl, vmem, lcd)
return gtck, gbar, glcd
def mm_lt24lcdsys(clock, reset, lcd_on, lcd_resetn, lcd_csn, lcd_rs, lcd_wrn,
lcd_rdn, lcd_data):
"""
"""
# interfaces
glbl = Global(clock, reset)
lcd = LT24Interface()
resolution = lcd.resolution
color_depth = lcd.color_depth
refresh_rate = 60
vmem = VideoMemory(resolution=resolution, color_depth=color_depth)
# assign the ports to the interface
lcd.assign(lcd_on, lcd_resetn, lcd_csn, lcd_rs, lcd_wrn, lcd_rdn, lcd_data)
# simulation mode, reduce the dead time between real-world ticks
# modules
tck_inst = glbl_timer_ticks(glbl, user_timer=16, tick_div=100)
bar_inst = color_bars(glbl,
vmem,
resolution=resolution,
color_depth=color_depth)
lcd_inst = lt24lcd(glbl, vmem, lcd)
return myhdl.instances()
def de0nano_lt24lcd(
clock,
reset,
led,
# LT24 LCD display signals
lcd_on,
lcd_resetn,
lcd_csn,
lcd_rs,
lcd_wrn,
lcd_rdn,
lcd_data,
):
"""
The port names are the same as those in the board definition
(names in the user manual) for automatic mapping by the
rhea.build automation.
"""
# signals and interfaces
glbl = Global(clock, reset)
# ----------------------------------------------------------------
# global ticks
gtick = glbl_timer_ticks(glbl, include_seconds=True, user_timer=16)
heartbeat = Signal(bool(0))
@always_seq(clock.posedge, reset=reset)
def rtl_leds():
if glbl.tick_sec:
heartbeat.next = not heartbeat
led.next = concat(intbv(0)[7:], heartbeat)
# ----------------------------------------------------------------
# LCD dislay
lcd = LT24Interface()
resolution, color_depth = lcd.resolution, lcd.color_depth
lcd.assign(lcd_on, lcd_resetn, lcd_csn, lcd_rs, lcd_wrn, lcd_rdn, lcd_data)
# color bars and the interface between video source-n-sink
vmem = VideoMemory(resolution=resolution, color_depth=color_depth)
gbar = color_bars(glbl, vmem, resolution=resolution, color_depth=color_depth)
# LCD video driver
glcd = lt24lcd(glbl, vmem, lcd)
gens = gtick, rtl_leds, gbar, glcd
return gens
def de0nano_lt24lcd(clock, reset, led,
# LT24 LCD display signals
lcd_on, lcd_resetn, lcd_csn, lcd_rs,
lcd_wrn, lcd_rdn, lcd_data
):
"""
The port names are the same as those in the board definition
(names in the user manual) for automatic mapping by the
rhea.build automation.
"""
# signals and interfaces
glbl = Global(clock, reset)
# ----------------------------------------------------------------
# global ticks
gtick = glbl_timer_ticks(glbl, include_seconds=True,
user_timer=16)
heartbeat = Signal(bool(0))
@always_seq(clock.posedge, reset=reset)
def rtl_leds():
if glbl.tick_sec:
heartbeat.next = not heartbeat
led.next = concat(intbv(0)[7:], heartbeat)
# ----------------------------------------------------------------
# LCD dislay
lcd = LT24Interface()
resolution, color_depth = lcd.resolution, lcd.color_depth
lcd.assign(lcd_on, lcd_resetn, lcd_csn, lcd_rs, lcd_wrn,
lcd_rdn, lcd_data)
# color bars and the interface between video source-n-sink
vmem = VideoMemory(resolution=resolution, color_depth=color_depth)
gbar = color_bars(glbl, vmem, resolution=resolution,
color_depth=color_depth)
# LCD video driver
glcd = lt24lcd(glbl, vmem, lcd)
gens = gtick, rtl_leds, gbar, glcd
return gens
def de0nano_converters(
clock,
reset,
led,
# ADC signals
adc_cs_n,
adc_saddr,
adc_sdat,
adc_sclk,
# Accelerometer and I2C signals
i2c_sclk,
i2c_sdat,
g_sensor_cs_n,
g_sensor_int,
# LT24 LCD display signals
lcd_on,
lcd_resetn,
lcd_csn,
lcd_rs,
lcd_wrn,
lcd_rdn,
lcd_data):
"""
The port names are the same as those in the board definition
(names in the user manual) for automatic mapping by the
rhea.build automation.
"""
# signals and interfaces
glbl = Global(clock, reset)
adcbus = SPIBus()
adcbus.mosi, adcbus.miso, adcbus.csn, adcbus.sck = (adc_saddr, adc_sdat,
adc_cs_n, adc_sclk)
fifobus = FIFOBus(width=16, size=16)
channel = Signal(intbv(0, min=0, max=8))
# ----------------------------------------------------------------
# global ticks
gtick = glbl_timer_ticks(glbl, include_seconds=True, user_timer=16)
# ----------------------------------------------------------------
# instantiate the ADC controller (retieves samples)
gconv = adc128s022(glbl, fifobus, adcbus, channel)
# read the samples out of the FIFO interface
fiford = Signal(bool(0))
@always(clock.posedge)
def rtl_read():
fiford = not fifobus.empty
@always_comb
def rtl_read_gate():
fifobus.rd.next = fiford and not fifobus.empty
# for now assign the samples to the LEDs for viewing
heartbeat = Signal(bool(0))
@always_seq(clock.posedge, reset=reset)
def rtl_leds():
if glbl.tick_sec:
heartbeat.next = not heartbeat
led.next = concat(fifobus.rdata[12:5], heartbeat)
# ----------------------------------------------------------------
# LCD dislay
lcd = LT24Interface()
resolution, color_depth = lcd.resolution, lcd.color_depth
lcd.assign(lcd_on, lcd_resetn, lcd_csn, lcd_rs, lcd_wrn, lcd_rdn, lcd_data)
# color bars and the interface between video source-n-sink
vmem = VideoMemory(resolution=resolution, color_depth=color_depth)
gbar = color_bars(glbl,
vmem,
resolution=resolution,
color_depth=color_depth)
# LCD video driver
glcd = lt24lcd(glbl, vmem, lcd)
gens = gtick, gconv, rtl_read, rtl_leds, gbar, glcd
return gens
def de0nano_converters(clock, reset, led,
# ADC signals
adc_cs_n, adc_saddr, adc_sdat, adc_sclk,
# Accelerometer and I2C signals
i2c_sclk, i2c_sdat, g_sensor_cs_n, g_sensor_int,
# LT24 LCD display signals
lcd_on, lcd_resetn, lcd_csn, lcd_rs,
lcd_wrn, lcd_rdn, lcd_data
):
"""
The port names are the same as those in the board definition
(names in the user manual) for automatic mapping by the
rhea.build automation.
"""
# signals and interfaces
glbl = Global(clock, reset)
adcbus = SPIBus()
adcbus.mosi, adcbus.miso, adcbus.csn, adcbus.sck = (
adc_saddr, adc_sdat, adc_cs_n, adc_sclk)
fifobus = FIFOBus(width=16, size=16)
channel = Signal(intbv(0, min=0, max=8))
# ----------------------------------------------------------------
# global ticks
gtick = glbl_timer_ticks(glbl, include_seconds=True,
user_timer=16)
# ----------------------------------------------------------------
# instantiate the ADC controller (retieves samples)
gconv = adc128s022(glbl, fifobus, adcbus, channel)
# read the samples out of the FIFO interface
fiford = Signal(bool(0))
@always(clock.posedge)
def rtl_read():
fiford = not fifobus.empty
@always_comb
def rtl_read_gate():
fifobus.rd.next = fiford and not fifobus.empty
# for now assign the samples to the LEDs for viewing
heartbeat = Signal(bool(0))
@always_seq(clock.posedge, reset=reset)
def rtl_leds():
if glbl.tick_sec:
heartbeat.next = not heartbeat
led.next = concat(fifobus.rdata[12:5], heartbeat)
# ----------------------------------------------------------------
# LCD dislay
lcd = LT24Interface()
resolution, color_depth = lcd.resolution, lcd.color_depth
lcd.assign(lcd_on, lcd_resetn, lcd_csn, lcd_rs, lcd_wrn,
lcd_rdn, lcd_data)
# color bars and the interface between video source-n-sink
vmem = VideoMemory(resolution=resolution, color_depth=color_depth)
gbar = color_bars(glbl, vmem, resolution=resolution,
color_depth=color_depth)
# LCD video driver
glcd = lt24lcd(glbl, vmem, lcd)
gens = gtick, gconv, rtl_read, rtl_leds, gbar, glcd
return gens
