Exemplo n.º 1
0
    def generate(self, **kargs):
        gpr_index = self.getRandomGPR(exclude="0")
        gpr_name = "x%d" % gpr_index
        self.reserveRegister(gpr_name)

        orig_gpr_val = self.random32()
        self.initializeRegister(gpr_name, orig_gpr_val)

        loop_control = LoopControl(self.genThread)
        loop_control.start(LoopCount=3)

        self.genInstruction("ADDI##RISCV", {
            "rd": gpr_index,
            "rs1": gpr_index,
            "simm12": 1
        })

        loop_control.end()

        (gpr_val, valid) = self.readRegister(gpr_name)
        if not valid:
            self.error("Unable to read register %s" % gpr_name)

        expected_gpr_val = orig_gpr_val + 3
        if gpr_val != expected_gpr_val:
            # self.error('Unexpected register value: Expected = 0x%x,
            #            Actual = 0x%x' % (expected_gpr_val, gpr_val))
            pass
Exemplo n.º 2
0
    def generate(self, **kargs):
        loop_reg_index = self.getRandomGPR(exclude="0")
        loop_reg_name = "x%d" % loop_reg_index
        self.reserveRegister(loop_reg_name)

        loop_control = LoopControl(self.genThread)
        loop_control.start(
            LoopReg=loop_reg_index, LoopCount=self.random32(2, 8)
        )

        for _ in range(self.random32(500, 1000)):
            self.genInstruction(
                self.pickWeighted(self.getInstructionWeights())
            )

        loop_control.end()

        (loop_reg_val, valid) = self.readRegister(loop_reg_name)
        if not valid:
            self.error("Unable to read register %s" % loop_reg_name)

        if loop_reg_val != 0:
            # self.error('Unexpected register value: Expected = 0x0,
            #            Actual = 0x%x' % loop_reg_val)
            pass
Exemplo n.º 3
0
    def generate(self, **kargs):
        gpr_index = self.getRandomGPR(exclude='0')
        gpr_name = 'x%d' % gpr_index
        self.reserveRegister(gpr_name)

        orig_gpr_val = self.random32()
        self.initializeRegister(gpr_name, orig_gpr_val)

        loop_control = LoopControl(self.genThread)
        loop_control.start(LoopCount=3)

        self.genInstruction('ADDI##RISCV', {
            'rd': gpr_index,
            'rs1': gpr_index,
            'simm12': 1
        })

        loop_control.end()

        (gpr_val, valid) = self.readRegister(gpr_name)
        if not valid:
            self.error('Unable to read register %s' % gpr_name)

        # TODO(Noah): Enable the error checking below when running Force with co-simulation is
        # enabled for RISCV.
        expected_gpr_val = orig_gpr_val + 3
        if gpr_val != expected_gpr_val:
            #self.error('Unexpected register value: Expected = 0x%x, Actual = 0x%x' % (expected_gpr_val, gpr_val))
            pass
Exemplo n.º 4
0
    def genInstructionLoop(self, loopGpr, loopCount, instrNum, instrList):
        loop_ctrl_seq = LoopControl(self.genThread)
        loop_ctrl_seq.start(LoopReg=loopGpr, LoopCount=loopCount)

        for i in range(instrNum):
            random_instr = self.pickWeighted(instrList)
            self.genInstruction(random_instr)

        loop_ctrl_seq.end()
Exemplo n.º 5
0
    def generate(self, **kargs):
        # Choose registers to serve as loop counters for test sequence
        (loop_gpr, inner_loop_gpr) = self.getRandomRegisters(2, "GPR", "0")

        # Any generated instructions after start() and before end() will be looped through twice
        loop_ctrl_seq = LoopControl(self.genThread)
        loop_ctrl_seq.start(LoopReg=loop_gpr, LoopCount=2)

        # Use genInstructionLoop sequence to create varying nested inner loops
        self.genInstructionLoop(inner_loop_gpr, 3, 10,
                                ALU_Int_All_instructions)
        self.genInstructionLoop(inner_loop_gpr, 5, 20,
                                ALU_Int_All_instructions)

        loop_ctrl_seq.end()
Exemplo n.º 6
0
    def generate(self, **kargs):
        loop_reg_index = self.getRandomGPR(exclude='0')
        loop_reg_name = 'x%d' % loop_reg_index
        self.reserveRegister(loop_reg_name)

        loop_control = LoopControl(self.genThread)
        loop_control.start(LoopReg=loop_reg_index,
                           LoopCount=self.random32(2, 8))

        for _ in range(self.random32(500, 1000)):
            self.genInstruction(self.pickWeighted(
                self.getInstructionWeights()))

        loop_control.end()

        (loop_reg_val, valid) = self.readRegister(loop_reg_name)
        if not valid:
            self.error('Unable to read register %s' % loop_reg_name)

        # TODO(Noah): Enable the error checking below when running Force with co-simulation is
        # enabled for RISCV.
        if loop_reg_val != 0:
            #self.error('Unexpected register value: Expected = 0x0, Actual = 0x%x' % loop_reg_val)
            pass