def test_get_full_display_string(self):
"""
Tests that the method get_full_display_string returns the correct
string.
"""
#Initialize the input wires:
wire1 = sw.StealthInputWire("wire1", True)
wire2 = sw.StealthInputWire("wire2", False)
#Initialize the gate:
unnegated_gate = sgo.StealthOrGate("unnegated_gate", [wire1, wire2],
[False, False])
somenegated_gate = sgo.StealthOrGate("somenegated_gate",
[wire1, wire2], [True, False])
negated_gate = sgo.StealthOrGate("negated_gate", [wire1, wire2],
[True, True])
self.assertEquals(unnegated_gate.get_full_display_string(),
"unnegated_gate:OR(wire1,wire2)")
self.assertEquals(somenegated_gate.get_full_display_string(),
"somenegated_gate:OR(N(wire1),wire2)")
self.assertEquals(negated_gate.get_full_display_string(),
"negated_gate:OR(N(wire1),N(wire2))")
def setUp(self):
# create a simple sample circuit:
w1 = sw.StealthInputWire("w1", True)
w2 = sw.StealthInputWire("w2", True)
w3 = sw.StealthInputWire("w3", False)
g1 = sga.StealthAndGate("g1", [w1, w2], [True, False])
g2 = sgo.StealthOrGate("g2", [g1, w3], [False, False])
output_gate = sgx.StealthXorGate("og", [g1, g2], [False, False])
self.circ = sc.StealthCircuit([w1, w2, w3], output_gate)
def test_bad_input(self):
"""
Test wire input setting when the input is not valid
(not a boolean or something that evaluates as such).
An error should be thrown.
"""
# setting a non-boolean input should throw an AssertionError.
w1_name = "w1"
w1 = sw.StealthInputWire(w1_name, None)
self.assertRaises(AssertionError, w1.evaluate)
w1 = sw.StealthInputWire(w1_name, "this_is_a_string")
self.assertRaises(AssertionError, w1.evaluate)
def test_or_with_negations(self):
"""
Tests that OR gates return the expected values on a two inputs with
each possible negation configuration.
"""
# or_inp_outp_map maps tuples of the form (inputs, negations)
# to the expected output:
or_inp_outp_map = {
((True, True), (True, True)): False,
((True, True), (True, False)): True,
((True, True), (False, True)): True,
((True, True), (False, False)): True,
((True, False), (True, True)): True,
((True, False), (True, False)): False,
((True, False), (False, True)): True,
((True, False), (False, False)): True,
((False, True), (True, True)): True,
((False, True), (True, False)): True,
((False, True), (False, True)): False,
((False, True), (False, False)): True,
((False, False), (True, True)): True,
((False, False), (True, False)): True,
((False, False), (False, True)): True,
((False, False), (False, False)): False
}
# check that each output is as expected:
for key in or_inp_outp_map.keys():
(inp_value_list, negation_list) = key
inp_wire_list = [
sw.StealthInputWire("wire", inp_value)
for inp_value in inp_value_list
]
gate = sgo.StealthOrGate("xr_gate", inp_wire_list, negation_list)
self.assertEqual(gate.evaluate(), or_inp_outp_map[key])
def test_or_without_negations(self):
"""
Tests that or gates return the expected values on a few inputs and
with no negations.
"""
# or_inp_outp_map maps the values of inputs of an or gate to the
# expected output:
or_inp_outp_map = {
(True, True): True,
(True, False): True,
(False, True): True,
(False, False): False,
(True, True, True): True,
(True, True, False): True,
(True, False, True): True,
(True, False, False): True,
(False, True, True): True,
(False, True, False): True,
(False, False, True): True,
(False, False, False): False
}
# check that each output is as expected:
for inp_value_list in or_inp_outp_map.keys():
inp_wire_list = [
sw.StealthInputWire("wire", inp_value)
for inp_value in inp_value_list
]
gate = sgo.StealthOrGate("or_gate", inp_wire_list,
[False for val in inp_value_list])
self.assertEqual(gate.evaluate(), or_inp_outp_map[inp_value_list])
def test_balancing_simple(self):
"""
Test to determine that balancing forces the desired output. Only tests
one simple case, where we take the desired output to be the negation
of the output of the comment example.
"""
# initialize the objects used as inputs in the example provided in the
# code comments.
wire1 = sw.StealthInputWire("wire1", True)
wire2 = sw.StealthInputWire("wire2", False)
# Instantiate our OR gate as follows:
this_gate = sgo.StealthOrGate("this_gate", [wire1, wire2],
[False, False])
val = this_gate.evaluate()
this_gate.balance(not val)
self.assertEqual(this_gate.evaluate(), not val)
def test_or_comment_example(self):
"""
Test to see whether the 'simple use' example in the comment for the
StealthOrGate class returns the expected value.
"""
# initialize the objects used as inputs in the example provided in the
# code comments.
wire1 = sw.StealthInputWire("wire1", True)
wire2 = sw.StealthInputWire("wire2", False)
# Instantiate our XOR gate as follows:
this_gate = sgo.StealthOrGate("this_gate", [wire1, wire2],
[False, False])
# Our OR gate can be prompted to return its value as follows:
val = this_gate.evaluate()
# val will be equal to True.
self.assertEqual(val, True)
def test_unimplemented_methods(self):
"""
Tests that calling methods which are only implemented in subclasses,
of calling methods which rely on other methods only implemented in
subclasses, causes AssertionErrors.
"""
#Initialize the input wires:
wire1 = sw.StealthInputWire("wire1", True)
wire2 = sw.StealthInputWire("wire2", False)
#Initialize the gate:
gate = sg.StealthGate("gate", [wire1, wire2], [False, False])
self.assertRaises(AssertionError, gate.get_full_display_string)
self.assertRaises(AssertionError, gate.evaluate)
self.assertRaises(AssertionError, gate.balance, True)
def test_good_input(self):
"""
Test wire setting and evaluation when the input is valid (a boolean).
"""
w1_name = "w1"
w1 = sw.StealthInputWire(w1_name, True)
# a wire with a 'True' input should evaluate to 'True'.
w1.set_input(True)
self.assertEqual(w1.evaluate(), True)
# a wire with a '1' input should evaluate to 'True'.
w1.set_input(1)
self.assertEqual(w1.evaluate(), True)
# a wire with a 'False' input should evaluate to 'False'.
w1.set_input(False)
self.assertEqual(w1.evaluate(), False)
# a wire with a '0' input should evaluate to 'False'.
w1.set_input(0)
self.assertEqual(w1.evaluate(), False)
def test_balancing_randomized(self):
"""
Test to determine that balancing forces the desired output. Tests
many randomized cases.
"""
num_tests = 100
min_num_inputs = 2
max_num_inputs = 20
for test_num in xrange(num_tests):
num_inputs = sr.randint(min_num_inputs, max_num_inputs)
inputs = [
sw.StealthInputWire("wire", bool(sr.randbit()))
for input_num in xrange(num_inputs)
]
negations = [
bool(sr.randbit()) for input_num in xrange(num_inputs)
]
gate = sgo.StealthOrGate("or_gate", inputs, negations)
desired_output = bool(sr.randbit())
gate.balance(desired_output)
self.assertEqual(gate.evaluate(), desired_output)
def generate(self):
"""Populates the circuit, input and output files with a circuit, an
input, and the corresponding output with the appropriate parameters."""
# create the header and write it to the circuit file:
header_string = self._create_circuit_header()
# create the input wires and write the inputs to the input file:
input_wires = self._create_input_wires()
# create the output and write it to the output file:
output = self._create_output()
# initialize the global gate counter, which acts as the unique numerical
# id of each gate:
unique_gate_num_gen = itertools.count(self._W, 1)
# set the 'ultimate level' for the first level of gates:
ultimate_level = input_wires
# for each level:
for level_ind in xrange(len(self._level_type_array)):
if not self._trimming:
# if this circuit is not being trimmed, then we have to write
# 'L' to the circuit file, because we will not be creating a
# circuit object to take care of our printing for us:
self._circuit_file.write("\nL")
# if this is an intermediate level:
if self._level_type_array[level_ind] == LEVEL_TYPES.RANDOM:
num_gates = self._G
fanin_frac = self._fg
make_gate = self._gate_maker
# if this is an XOR level:
elif self._level_type_array[level_ind] == LEVEL_TYPES.XOR:
num_gates = self._X
fanin_frac = self._fx
make_gate = TYPE_TO_GATE_GEN[GATE_TYPES.XOR]
# Create the list of gates at this level:
this_level = [None] * num_gates
for gate_ind in xrange(num_gates):
displayname = "".join(["G", str(unique_gate_num_gen.next())])
# make the random gate:
new_gate = make_gate(ultimate_level, fanin_frac, displayname)
# choose a random output, and balance the new gate with respect
# to that output:
new_gate_output = sr.randbit()
new_gate.balance(new_gate_output)
if not self._trimming:
# if this circuit is not being trimmed, then we can just
# write the gate to the circuit file right away:
self._circuit_file.write(
"".join(["\n", new_gate.get_full_display_string()]))
# since this gate is already written to the circuit file,
# we can save on memory space by re-representing it as an
# input wire with the correct value:
new_gate = sw.StealthInputWire(displayname, new_gate_output)
# add this gate to our list of gates at this level:
this_level[gate_ind] = new_gate
# increment the global gate counter:
# set things up for the next level:
ultimate_level = this_level
# create the output gate:
negations = [sr.randbit() for neg_ind in xrange(len(ultimate_level))]
output_gate = self._gate_maker(ultimate_level, 1, "output_gate")
# balance the output gate with respect to the chosen output:
output_gate.balance(output)
if self._trimming:
# if this circuit is being trimmed, then we create a circuit and
# write it to the circuit_file:
circ = sc.StealthCircuit(input_wires, output_gate)
self._circuit_file.write(circ.display())
else:
# otherwise, we will have already written all the gates as we went
# along, so we only need to record the output gate:
self._circuit_file.write("".join(["\nL\n",
output_gate.get_full_display_string()]))
def make_random_input_wire(displayname):
"""Makes a random input wire with the displayname. Its value is set to True
with probability .5, and to False with probability .5."""
val = sr.randbit()
return sw.StealthInputWire(displayname, val)
