def cnot_to_hczh(gate: Gate) -> Optional[DiGraph]:
if gate._gate != 'CNOT':
return None
else:
first = Gate('H', gate._qubits[1:])
second = Gate('CZ', gate._qubits)
third = Gate('H', gate._qubits[1:])
return DiGraph([(first, second), (second, third)])
def h_to_rzrxrz(gate: Gate) -> Optional[DiGraph]:
if gate._gate != 'H':
return None
else:
first = Gate('RZ', gate._qubits, 'pi/2')
second = Gate('RX', gate._qubits, 'pi/2')
third = Gate('RZ', gate._qubits, 'pi/2')
return DiGraph([(first, second), (second, third)])
def ry_to_rxrzrx(gate: Gate) -> Optional[DiGraph]:
if gate._gate != 'RY':
return None
else:
first = Gate('RX', gate._qubits, 'pi/2')
second = Gate('RZ', gate._qubits, *gate._args)
third = Gate('RX', gate._qubits, '-pi/2')
return DiGraph([(first, second), (second, third)])
def z_to_rz(gate: Gate) -> Optional[DiGraph]:
if gate._gate != 'Z':
return None
else:
graph = DiGraph()
graph.add_node(Gate('RZ', gate._qubits, 'pi'))
return graph
def from_quil(filename: str) -> 'Circuit':
dag = nx.DiGraph()
with open(filename, 'r') as f:
for line in f.readlines():
line = line.strip()
parsed_line = re.match(r'([a-zA-Z0-9]+)(?:\((.+)\))? ([\d ]+)',
line)
operator, argument, qubits = parsed_line.groups()
qubits = tuple(int(qubit) for qubit in qubits.split(' '))
# TODO: check values
operator_node = Gate(operator, qubits, argument)
for qubit in qubits:
out_qubit = Qubit(qubit, side='out')
if out_qubit not in dag:
dag.add_edge(Qubit(qubit, side='in'),
out_qubit,
qubit=qubit)
previous_node = next(dag.predecessors(out_qubit))
dag.remove_edge(previous_node, out_qubit)
dag.add_edge(previous_node, operator_node, qubit=qubit)
dag.add_edge(operator_node, out_qubit, qubit=qubit)
return Circuit(dag=dag)
def consecutive_hs(gate1: Gate, gate2: Gate) -> Optional[DiGraph]:
if not ((gate1._gate == gate2._gate) and
(gate1._qubits == gate2._qubits) and (gate1._gate == 'H')):
return None
else:
graph = DiGraph()
graph.add_node(Gate('I', gate1._qubits))
return graph
def consecutive_rzs(gate1: Gate, gate2: Gate) -> Optional[DiGraph]:
if not ((gate1._gate == gate2._gate) and
(gate1._qubits == gate2._qubits) and
(gate1._gate in ('RX', 'RY', 'RZ'))):
return None
else:
gate = gate1._gate
arg = gate1._args[0] + ' + ' + gate2._args[0]
graph = DiGraph()
graph.add_node(Gate(gate, gate1._qubits, arg))
return graph