def test_smrr():
"""Test the SMRR-related configuration"""
cpus = sorted(bits.cpus())
if not testmsr.test_msr_consistency(
text="IA32_MTRRCAP Bit [11] (SMRR Supported) must be consistent", first_msr=0xFE, shift=11, mask=1
):
return
ia32_mtrrcap = bits.rdmsr(cpus[0], 0xFE)
if ia32_mtrrcap is not None and not ia32_mtrrcap & (1 << 11):
return
if testmsr.msr_available(0x1F2) and testmsr.msr_available(0x1F3):
MSR_SMRR_PHYS_BASE = 0x1F2
MSR_SMRR_PHYS_MASK = 0x1F3
elif testmsr.msr_available(0xA0) and testmsr.msr_available(0xA1):
MSR_SMRR_PHYS_BASE = 0xA0
MSR_SMRR_PHYS_MASK = 0xA1
return
else:
return
testmsr.test_msr_consistency(
text="SMRR must be consistent across all processors", first_msr=MSR_SMRR_PHYS_BASE, last_msr=MSR_SMRR_PHYS_MASK
)
for apicid in cpus:
smrr_physbase, smrr_physbase_str = testmsr.MSR("SMRR Physbase", apicid, MSR_SMRR_PHYS_BASE, 31, 12)
smrr_type, smrr_type_str = testmsr.MSR("SMRR Type", apicid, MSR_SMRR_PHYS_BASE, 2, 0)
smrr_physmask, smrr_physmask_str = testmsr.MSR("SMRR Physmask", apicid, MSR_SMRR_PHYS_MASK, 31, 12)
smrr_valid, smrr_valid_str = testmsr.MSR("SMRR Valid", apicid, MSR_SMRR_PHYS_MASK, 11, 11)
testsuite.test("SMRR_PHYSBASE must be aligned on an 8MB boundary", (smrr_physbase % 0x800) == 0)
testsuite.print_detail(smrr_physbase_str)
testsuite.print_detail("SMRR_PHYSBASE % 0x800 must be 0")
testsuite.test("SMRR Type must be Write-Back (Best performance)", smrr_type == 6)
testsuite.print_detail(smrr_type_str)
testsuite.print_detail("SMRR Type must be 6")
testsuite.test("SMRR size must be at least 8MB", smrr_physmask >= 0x800)
testsuite.print_detail(smrr_physmask_str)
testsuite.print_detail("SMRR Physmask must be >= 0x800")
testsuite.test("SMRR Valid bit must be 1", smrr_valid)
testsuite.print_detail(smrr_valid_str)
def cmd_msr_available(args):
return testmsr.msr_available(args.msr)
