def __init__(self, vhdl_dict, mu_type, bitword=None, obj=None, link=-1, frame=-1, bx=-1, gPhi = None):
"""
ctor:
TAKES:
vhdl_dict as returned by ../../tools/vhdl.VHDLConstantsParser
mu_type either IN (inputs) or OUT (intermediates/outputs)
bitword can be None or a 64bit integer (for HW muons)
obj can be None or one of the emulator objects (for emulator muons)
link integer representing link the muon was received / is sent (HW only)
bx integer indicating the bunch-crossing the muon is associated with
"""
# get the bit boundaries for the muon quantities
self.bx = bx
pt_low = vhdl_dict["PT_{t}_LOW".format(t=mu_type)]
pt_high = vhdl_dict["PT_{t}_HIGH".format(t=mu_type)]
sysign_low = vhdl_dict["SIGN_{t}".format(t=mu_type)]
sysign_high = vhdl_dict["VALIDSIGN_{t}".format(t=mu_type)]
trackadd_low = 0
trackadd_high = 0
qual_low = vhdl_dict["QUAL_{t}_LOW".format(t=mu_type)]
qual_high = vhdl_dict["QUAL_{t}_HIGH".format(t=mu_type)]
eta_low = vhdl_dict["ETA_{t}_LOW".format(t=mu_type)]
eta_high = vhdl_dict["ETA_{t}_HIGH".format(t=mu_type)]
phi_low = vhdl_dict["PHI_{t}_LOW".format(t=mu_type)]
phi_high = vhdl_dict["PHI_{t}_HIGH".format(t=mu_type)]
if mu_type == "OUT":
iso_low = vhdl_dict["ISO_OUT_LOW"]
iso_high = vhdl_dict["ISO_OUT_HIGH"]
else:
trackadd_high = vhdl_dict["BMTF_ADDRESS_STATION_4_IN_LOW"] + 1
trackadd_low = vhdl_dict["BMTF_DETECTOR_SIDE_HIGH"] + 1
self.trackAddress = [0]*6
if obj == None and bitword != None: # for hardware
self.bitword = bitword
self.Sysign = bithlp.get_shifted_subword(self.bitword, sysign_low, sysign_high)
self.etaBits = bithlp.get_shifted_subword(self.bitword, eta_low, eta_high)
self.etaBits = bithlp.twos_complement_to_signed(self.etaBits, eta_high-eta_low+1)
self.qualityBits = bithlp.get_shifted_subword(self.bitword, qual_low, qual_high)
self.ptBits = bithlp.get_shifted_subword(self.bitword, pt_low, pt_high)
if mu_type == "OUT":
self.phiBits = bithlp.get_shifted_subword(self.bitword, phi_low, phi_high)
self.Iso = bithlp.get_shifted_subword(self.bitword, iso_low, iso_high)
else:
self.Iso = 0
# for input have to mask the 31st bit as it is control bit
# as of moving to local phi this is not needed anymore
# self.phiBits = self.decode_phi(phi_low, phi_high)
self.phiBits = bithlp.get_shifted_subword(self.bitword, phi_low, phi_high)
# we have to adjust these values as they are beyond the 32 bit boundary
self.rank = 0
self.globPhiBits = self.phiBits
elif bitword == None and obj != None: # for emulator
if gPhi is not None:
self.globPhiBits = gPhi
else:
self.globPhiBits = obj.hwPhi()
if mu_type == "OUT":
self.Iso = obj.hwIso()
self.rank = obj.hwRank()
self.Sysign = obj.hwCharge() + (obj.hwChargeValid() << 1)
else:
self.Iso = 0
self.rank = 0
self.Sysign = obj.hwSign() + (obj.hwSignValid() << 1)
sysign_low += 1
sysign_high += 1
self.trackAddress = obj.trackAddress()
self.phiBits = obj.hwPhi()
self.etaBits = obj.hwEta()
unsigned_eta = bithlp.twos_complement_to_unsigned(obj.hwEta(), 9)
self.qualityBits = obj.hwQual()
self.ptBits = obj.hwPt()
# calculate the bitword to make comparison with HW easy
self.bitword = (self.ptBits << pt_low)
self.bitword += (self.qualityBits << qual_low)
self.bitword += (self.Sysign << sysign_low)
self.bitword += (unsigned_eta << eta_low)
self.bitword += (self.phiBits << phi_low)
if mu_type == "OUT" and self.Iso > 0:
self.bitword += (self.Iso << iso_low)
self.frame = frame
self.link = link
self.local_link = -1
if self.link != -1:
self.local_link = self.link - 36
if self.local_link < vhdl_dict["EMTF_POS_HIGH"]:
pass
elif self.local_link < vhdl_dict["OMTF_POS_HIGH"]:
self.local_link -= vhdl_dict["OMTF_POS_LOW"]
elif self.local_link < vhdl_dict["BMTF_HIGH"]:
self.local_link -= vhdl_dict["BMTF_LOW"]
elif self.local_link < vhdl_dict["OMTF_NEG_HIGH"]:
self.local_link -= vhdl_dict["OMTF_NEG_LOW"]
else:
self.local_link -= vhdl_dict["EMTF_NEG_LOW"]
def __init__(self, vhdl_dict, mu_type, bitword=None, obj=None, link=-1, frame=-1, bx=-1, gPhi = None):
"""
ctor:
TAKES:
vhdl_dict as returned by ../../tools/vhdl.VHDLConstantsParser
mu_type either IN (inputs), OUT (outputs), SER (serializer), or IMD (intermediates)
bitword can be None or a 64bit integer (for HW muons)
obj can be None or one of the emulator objects (for emulator muons)
link integer representing link the muon was received / is sent (HW only)
bx integer indicating the bunch-crossing the muon is associated with
"""
# get the bit boundaries for the muon quantities
self.bx = bx
self.frame = frame
self.haloFine = 0
self.etaFine = 0
self.tftype = -1
self.link = link
self.local_link = link
if self.link != -1:
self.local_link = self.link - 36
if self.local_link < vhdl_dict["EMTF_POS_HIGH"]:
self.tftype = 2
pass
elif self.local_link < vhdl_dict["OMTF_POS_HIGH"]:
self.local_link -= vhdl_dict["OMTF_POS_LOW"]
self.tftype = 1
elif self.local_link < vhdl_dict["BMTF_HIGH"]:
self.local_link -= vhdl_dict["BMTF_LOW"]
self.tftype = 0
elif self.local_link < vhdl_dict["OMTF_NEG_HIGH"]:
self.local_link -= vhdl_dict["OMTF_NEG_LOW"]
self.tftype = 1
else:
self.local_link -= vhdl_dict["EMTF_NEG_LOW"]
self.tftype = 2
if mu_type == 'IMD' or mu_type == 'OUT' or mu_type == 'SER':
bitword_type = 'OUT'
else:
bitword_type = 'IN'
pt_low = vhdl_dict["PT_{t}_LOW".format(t=bitword_type)]
pt_high = vhdl_dict["PT_{t}_HIGH".format(t=bitword_type)]
sysign_low = vhdl_dict["SIGN_{t}".format(t=bitword_type)]
sysign_high = vhdl_dict["VALIDSIGN_{t}".format(t=bitword_type)]
trackadd_low = 0
trackadd_high = 0
qual_low = vhdl_dict["QUAL_{t}_LOW".format(t=bitword_type)]
qual_high = vhdl_dict["QUAL_{t}_HIGH".format(t=bitword_type)]
eta_low = vhdl_dict["ETA_{t}_LOW".format(t=bitword_type)]
eta_high = vhdl_dict["ETA_{t}_HIGH".format(t=bitword_type)]
phi_low = vhdl_dict["PHI_{t}_LOW".format(t=bitword_type)]
phi_high = vhdl_dict["PHI_{t}_HIGH".format(t=bitword_type)]
if bitword_type == "OUT":
iso_low = vhdl_dict["ISO_OUT_LOW"]
iso_high = vhdl_dict["ISO_OUT_HIGH"]
idx_low = vhdl_dict["IDX_OUT_LOW"]
idx_high = vhdl_dict["IDX_OUT_HIGH"]
else:
trackadd_low = vhdl_dict["BMTF_ADDRESS_STATION_4_IN_LOW"] - 2
trackadd_high = vhdl_dict["BMTF_DETECTOR_SIDE_HIGH"] + 4
hf_low = vhdl_dict["HALO_FINE_IN"]
self.trackAddress = [0]*6
if mu_type == "OUT":
phi_extrapolated_low = vhdl_dict["PHI_EXTRAPOLATED_LOW"]
phi_extrapolated_high = vhdl_dict["PHI_EXTRAPOLATED_HIGH"]
if obj == None and bitword != None: # for hardware
self.bitword = bitword
self.Sysign = bithlp.get_shifted_subword(self.bitword, sysign_low, sysign_high)
self.etaBits = bithlp.get_shifted_subword(self.bitword, eta_low, eta_high)
self.etaBits = bithlp.twos_complement_to_signed(self.etaBits, eta_high-eta_low+1)
self.qualityBits = bithlp.get_shifted_subword(self.bitword, qual_low, qual_high)
self.ptBits = bithlp.get_shifted_subword(self.bitword, pt_low, pt_high)
self.phiBits = bithlp.get_shifted_subword(self.bitword, phi_low, phi_high)
self.globPhiBits = self.phiBits
if mu_type == "OUT" or mu_type == "SER":
self.Iso = bithlp.get_shifted_subword(self.bitword, iso_low, iso_high)
self.tfMuonIndex = bithlp.get_shifted_subword(self.bitword, idx_low, idx_high)
if mu_type == "OUT":
self.phi_extrapol = bithlp.get_shifted_subword(self.bitword, phi_extrapolated_low, phi_extrapolated_high)
else:
self.phi_extrapol = 0
else:
self.phi_extrapol = -1
self.Iso = 0
self.tfMuonIndex = -1
if self.local_link != -1:
self.globPhiBits = self.calcGlobalPhi(self.ptBits, self.tftype, self.local_link)
if bitword_type != "OUT":
self.haloFine = bithlp.get_shifted_subword(self.bitword, hf_low, hf_low+1)
if self.tftype == 2:
self.etaFine = 1
else:
self.etaFine = self.haloFine
self.rank = 0
self.globPhiBits = self.phiBits
elif bitword == None and obj != None: # for emulator
if gPhi is not None:
self.globPhiBits = gPhi
else:
self.globPhiBits = obj.hwPhi()
if bitword_type == "OUT":
if mu_type == "OUT":
self.phi_extrapol = obj.hwPhi() + obj.hwDPhiExtra()
if self.phi_extrapol < 0:
self.phi_extrapol += 576 # wrap around
self.phi_extrapol %= 576 # wrap around
else:
self.phi_extrapol = 0
self.Iso = obj.hwIso()
self.rank = obj.hwRank()
self.Sysign = obj.hwCharge() + (obj.hwChargeValid() << 1)
self.tfMuonIndex = obj.tfMuonIndex()
else:
self.phi_extrapol = -1
self.Iso = 0
self.tfMuonIndex = -1
self.rank = 0
self.Sysign = obj.hwSign() + (obj.hwSignValid() << 1)
# shift by +1 necessary because of the control bit 31
sysign_low += 1
sysign_high += 1
trackadd_low += 1
trackadd_high += 1
self.trackAddress = obj.trackAddress()
self.haloFine = obj.hwHF()
self.etaFine = self.haloFine
self.tftype = obj.trackFinderType()
if self.tftype == 1 or self.tftype == 2:
self.tftype = 1
elif self.tftype == 3 or self.tftype == 4:
self.tftype = 2
self.etaFine = 1
if gPhi is None:
self.globPhiBits = self.calcGlobalPhi(obj.hwPhi(), obj.trackFinderType(), obj.processor())
self.phiBits = obj.hwPhi()
self.etaBits = obj.hwEta()
unsigned_eta = bithlp.twos_complement_to_unsigned(obj.hwEta(), 9)
unsigned_phi = bithlp.twos_complement_to_unsigned(obj.hwPhi(), 8)
self.qualityBits = obj.hwQual()
self.ptBits = obj.hwPt()
# calculate the bitword to make comparison with HW easy
self.bitword = (self.ptBits << pt_low)
self.bitword += (self.qualityBits << qual_low)
self.bitword += (self.Sysign << sysign_low)
self.bitword += (unsigned_eta << eta_low)
self.bitword += (unsigned_phi << phi_low)
if bitword_type == "OUT" and self.Iso > 0:
self.bitword += (self.Iso << iso_low)
if mu_type == "OUT" and self.phi_extrapol >= 0:
self.bitword += (self.phi_extrapol << phi_extrapolated_low)
if (mu_type == "OUT" or mu_type == "SER") and self.tfMuonIndex >= 0:
self.bitword += (self.tfMuonIndex << idx_low)
if bitword_type != "OUT":
self.bitword += (self.haloFine << hf_low)
if self.tftype == 0:
# shift by +1 necessary because of the control bit 31
self.bitword += self.trackAddress[0] << vhdl_dict["BMTF_DETECTOR_SIDE_LOW"] + 1
self.bitword += self.trackAddress[1] << vhdl_dict["BMTF_WHEEL_NO_IN_LOW"] + 1
self.bitword += self.trackAddress[2] << vhdl_dict["BMTF_ADDRESS_STATION_1_IN_LOW"] + 1
self.bitword += self.trackAddress[3] << vhdl_dict["BMTF_ADDRESS_STATION_2_IN_LOW"] + 1
self.bitword += self.trackAddress[4] << vhdl_dict["BMTF_ADDRESS_STATION_3_IN_LOW"] + 1
self.bitword += self.trackAddress[5] << vhdl_dict["BMTF_ADDRESS_STATION_4_IN_LOW"] + 1
elif self.tftype == 1:
self.bitword += self.trackAddress[0] << trackadd_low
elif self.tftype == 2:
self.bitword += self.trackAddress[0] << trackadd_low
def __init__(self, vhdl_dict, mu_type, bitword=None, obj=None, link=-1, frame=-1, bx=-1, gPhi = None):
"""
ctor:
TAKES:
vhdl_dict as returned by ../../tools/vhdl.VHDLConstantsParser
mu_type either IN (inputs), OUT (outputs), SER (serializer), or IMD (intermediates)
bitword can be None or a 64bit integer (for HW muons)
obj can be None or one of the emulator objects (for emulator muons)
link integer representing link the muon was received / is sent (HW only)
bx integer indicating the bunch-crossing the muon is associated with
"""
# get the bit boundaries for the muon quantities
self.bx = bx
self.frame = frame
self.haloFine = 0
self.etaFine = 0
self.tftype = -1
self.link = link
self.local_link = link
if self.link != -1:
self.local_link = self.link - 36
if self.local_link < vhdl_dict["EMTF_POS_HIGH"]:
self.tftype = 2
pass
elif self.local_link < vhdl_dict["OMTF_POS_HIGH"]:
self.local_link -= vhdl_dict["OMTF_POS_LOW"]
self.tftype = 1
elif self.local_link < vhdl_dict["BMTF_HIGH"]:
self.local_link -= vhdl_dict["BMTF_LOW"]
self.tftype = 0
elif self.local_link < vhdl_dict["OMTF_NEG_HIGH"]:
self.local_link -= vhdl_dict["OMTF_NEG_LOW"]
self.tftype = 1
else:
self.local_link -= vhdl_dict["EMTF_NEG_LOW"]
self.tftype = 2
if mu_type == 'IMD' or mu_type == 'OUT' or mu_type == 'SER':
bitword_type = 'OUT'
else:
bitword_type = 'IN'
pt_low = vhdl_dict["PT_{t}_LOW".format(t=bitword_type)]
pt_high = vhdl_dict["PT_{t}_HIGH".format(t=bitword_type)]
sysign_low = vhdl_dict["SIGN_{t}".format(t=bitword_type)]
sysign_high = vhdl_dict["VALIDSIGN_{t}".format(t=bitword_type)]
trackadd_low = 0
trackadd_high = 0
qual_low = vhdl_dict["QUAL_{t}_LOW".format(t=bitword_type)]
qual_high = vhdl_dict["QUAL_{t}_HIGH".format(t=bitword_type)]
eta_low = vhdl_dict["ETA_{t}_LOW".format(t=bitword_type)]
eta_high = vhdl_dict["ETA_{t}_HIGH".format(t=bitword_type)]
phi_low = vhdl_dict["PHI_{t}_LOW".format(t=bitword_type)]
phi_high = vhdl_dict["PHI_{t}_HIGH".format(t=bitword_type)]
if bitword_type == "OUT":
iso_low = vhdl_dict["ISO_OUT_LOW"]
iso_high = vhdl_dict["ISO_OUT_HIGH"]
idx_low = vhdl_dict["IDX_OUT_LOW"]
idx_high = vhdl_dict["IDX_OUT_HIGH"]
else:
trackadd_low = vhdl_dict["BMTF_ADDRESS_STATION_4_IN_LOW"] - 2
trackadd_high = vhdl_dict["BMTF_DETECTOR_SIDE_HIGH"] + 4
hf_low = vhdl_dict["HALO_FINE_IN"]
self.trackAddress = [0]*6
if mu_type == "OUT" or mu_type == 'SER':
phi_extrapolated_low = vhdl_dict["PHI_EXTRAPOLATED_LOW"]
phi_extrapolated_high = vhdl_dict["PHI_EXTRAPOLATED_HIGH"]
eta_extrapolated_low = vhdl_dict["ETA_EXTRAPOLATED_LOW"]
eta_extrapolated_high = vhdl_dict["ETA_EXTRAPOLATED_HIGH"]
if obj == None and bitword != None: # for hardware
self.bitword = bitword
self.Sysign = bithlp.get_shifted_subword(self.bitword, sysign_low, sysign_high)
self.etaBits = bithlp.get_shifted_subword(self.bitword, eta_low, eta_high)
self.etaBits = bithlp.twos_complement_to_signed(self.etaBits, eta_high-eta_low+1)
self.qualityBits = bithlp.get_shifted_subword(self.bitword, qual_low, qual_high)
self.ptBits = bithlp.get_shifted_subword(self.bitword, pt_low, pt_high)
self.phiBits = bithlp.get_shifted_subword(self.bitword, phi_low, phi_high)
self.globPhiBits = self.phiBits
if mu_type == "OUT" or mu_type == "SER":
self.Iso = bithlp.get_shifted_subword(self.bitword, iso_low, iso_high)
self.tfMuonIndex = bithlp.get_shifted_subword(self.bitword, idx_low, idx_high)
self.phi_extrapol = bithlp.get_shifted_subword(self.bitword, phi_extrapolated_low, phi_extrapolated_high)
self.eta_extrapol = bithlp.get_shifted_subword(self.bitword, eta_extrapolated_low, eta_extrapolated_high)
else:
self.phi_extrapol = -1
self.eta_extrapol = -9999
self.Iso = 0
self.tfMuonIndex = -1
if self.local_link != -1:
self.globPhiBits = self.calcGlobalPhi(self.ptBits, self.tftype, self.local_link)
if bitword_type != "OUT":
self.haloFine = bithlp.get_shifted_subword(self.bitword, hf_low, hf_low+1)
if self.tftype == 2:
self.etaFine = 1
else:
self.etaFine = self.haloFine
self.rank = 0
self.globPhiBits = self.phiBits
elif bitword == None and obj != None: # for emulator
if gPhi is not None:
self.globPhiBits = gPhi
else:
self.globPhiBits = obj.hwPhi()
if bitword_type == "OUT":
if mu_type == "OUT" or mu_type == 'SER':
self.phi_extrapol = obj.hwPhiAtVtx()
self.eta_extrapol = obj.hwEtaAtVtx()
else:
self.phi_extrapol = 0
self.eta_extrapol = 0
self.Iso = obj.hwIso()
self.rank = obj.hwRank()
self.Sysign = obj.hwCharge() + (obj.hwChargeValid() << 1)
self.tfMuonIndex = obj.tfMuonIndex()
else:
self.phi_extrapol = -1
self.eta_extrapol = -9999
self.Iso = 0
self.tfMuonIndex = -1
self.rank = 0
self.Sysign = obj.hwSign() + (obj.hwSignValid() << 1)
# shift by +1 necessary because of the control bit 31
sysign_low += 1
sysign_high += 1
trackadd_low += 1
trackadd_high += 1
self.trackAddress = obj.trackAddress()
self.haloFine = obj.hwHF()
self.etaFine = self.haloFine
self.tftype = obj.trackFinderType()
if self.tftype == 1 or self.tftype == 2:
self.tftype = 1
elif self.tftype == 3 or self.tftype == 4:
self.tftype = 2
self.etaFine = 1
if gPhi is None:
self.globPhiBits = self.calcGlobalPhi(obj.hwPhi(), obj.trackFinderType(), obj.processor())
self.phiBits = obj.hwPhi()
self.etaBits = obj.hwEta()
unsigned_eta = bithlp.twos_complement_to_unsigned(obj.hwEta(), eta_high-eta_low+1)
unsigned_phi = bithlp.twos_complement_to_unsigned(obj.hwPhi(), phi_high-phi_low+1)
self.qualityBits = obj.hwQual()
self.ptBits = obj.hwPt()
# calculate the bitword to make comparison with HW easy
self.bitword = (self.ptBits << pt_low)
self.bitword += (self.qualityBits << qual_low)
self.bitword += (self.Sysign << sysign_low)
self.bitword += (unsigned_eta << eta_low)
self.bitword += (unsigned_phi << phi_low)
if bitword_type == "OUT" and self.Iso > 0:
self.bitword += (self.Iso << iso_low)
if mu_type == "OUT" or mu_type == "SER":
if self.phi_extrapol >= 0:
self.bitword += (self.phi_extrapol << phi_extrapolated_low)
if self.eta_extrapol >= -1 * (1 << (eta_extrapolated_high - eta_extrapolated_low)):
unsigned_eta_extrapol = bithlp.twos_complement_to_unsigned(self.eta_extrapol, eta_extrapolated_high - eta_extrapolated_low + 1)
self.bitword += (unsigned_eta_extrapol << eta_extrapolated_low)
if self.tfMuonIndex >= 0:
self.bitword += (self.tfMuonIndex << idx_low)
if bitword_type != "OUT":
self.bitword += (self.haloFine << hf_low)
if self.tftype == 0:
# shift by +1 necessary because of the control bit 31
self.bitword += self.trackAddress[0] << vhdl_dict["BMTF_DETECTOR_SIDE_LOW"] + 1
self.bitword += self.trackAddress[1] << vhdl_dict["BMTF_WHEEL_NO_IN_LOW"] + 1
self.bitword += self.trackAddress[2] << vhdl_dict["BMTF_ADDRESS_STATION_1_IN_LOW"] + 1
self.bitword += self.trackAddress[3] << vhdl_dict["BMTF_ADDRESS_STATION_2_IN_LOW"] + 1
self.bitword += self.trackAddress[4] << vhdl_dict["BMTF_ADDRESS_STATION_3_IN_LOW"] + 1
self.bitword += self.trackAddress[5] << vhdl_dict["BMTF_ADDRESS_STATION_4_IN_LOW"] + 1
elif self.tftype == 1:
self.bitword += self.trackAddress[0] << trackadd_low
elif self.tftype == 2:
self.bitword += self.trackAddress[0] << trackadd_low
def __init__(self,
vhdl_dict,
mu_type,
bitword=None,
obj=None,
link=-1,
frame=-1,
bx=-1,
gPhi=None):
"""
ctor:
TAKES:
vhdl_dict as returned by ../../tools/vhdl.VHDLConstantsParser
mu_type either IN (inputs) or OUT (intermediates/outputs)
bitword can be None or a 64bit integer (for HW muons)
obj can be None or one of the emulator objects (for emulator muons)
link integer representing link the muon was received / is sent (HW only)
bx integer indicating the bunch-crossing the muon is associated with
"""
# get the bit boundaries for the muon quantities
self.bx = bx
pt_low = vhdl_dict["PT_{t}_LOW".format(t=mu_type)]
pt_high = vhdl_dict["PT_{t}_HIGH".format(t=mu_type)]
sysign_low = vhdl_dict["SIGN_{t}".format(t=mu_type)]
sysign_high = vhdl_dict["VALIDSIGN_{t}".format(t=mu_type)]
trackadd_low = 0
trackadd_high = 0
qual_low = vhdl_dict["QUAL_{t}_LOW".format(t=mu_type)]
qual_high = vhdl_dict["QUAL_{t}_HIGH".format(t=mu_type)]
eta_low = vhdl_dict["ETA_{t}_LOW".format(t=mu_type)]
eta_high = vhdl_dict["ETA_{t}_HIGH".format(t=mu_type)]
phi_low = vhdl_dict["PHI_{t}_LOW".format(t=mu_type)]
phi_high = vhdl_dict["PHI_{t}_HIGH".format(t=mu_type)]
if mu_type == "OUT":
iso_low = vhdl_dict["ISO_OUT_LOW"]
iso_high = vhdl_dict["ISO_OUT_HIGH"]
else:
trackadd_high = vhdl_dict["BMTF_ADDRESS_STATION_4_IN_LOW"] + 1
trackadd_low = vhdl_dict["BMTF_DETECTOR_SIDE_HIGH"] + 1
self.trackAddress = [0] * 6
if obj == None and bitword != None: # for hardware
self.bitword = bitword
self.Sysign = bithlp.get_shifted_subword(self.bitword, sysign_low,
sysign_high)
self.etaBits = bithlp.get_shifted_subword(self.bitword, eta_low,
eta_high)
self.etaBits = bithlp.twos_complement_to_signed(
self.etaBits, eta_high - eta_low + 1)
self.qualityBits = bithlp.get_shifted_subword(
self.bitword, qual_low, qual_high)
self.ptBits = bithlp.get_shifted_subword(self.bitword, pt_low,
pt_high)
if mu_type == "OUT":
self.phiBits = bithlp.get_shifted_subword(
self.bitword, phi_low, phi_high)
self.Iso = bithlp.get_shifted_subword(self.bitword, iso_low,
iso_high)
else:
self.Iso = 0
# for input have to mask the 31st bit as it is control bit
# as of moving to local phi this is not needed anymore
# self.phiBits = self.decode_phi(phi_low, phi_high)
self.phiBits = bithlp.get_shifted_subword(
self.bitword, phi_low, phi_high)
# we have to adjust these values as they are beyond the 32 bit boundary
self.rank = 0
self.globPhiBits = self.phiBits
elif bitword == None and obj != None: # for emulator
if gPhi is not None:
self.globPhiBits = gPhi
else:
self.globPhiBits = obj.hwPhi()
if mu_type == "OUT":
self.Iso = obj.hwIso()
self.rank = obj.hwRank()
self.Sysign = obj.hwCharge() + (obj.hwChargeValid() << 1)
else:
self.Iso = 0
self.rank = 0
self.Sysign = obj.hwSign() + (obj.hwSignValid() << 1)
sysign_low += 1
sysign_high += 1
self.trackAddress = obj.trackAddress()
self.phiBits = obj.hwPhi()
self.etaBits = obj.hwEta()
unsigned_eta = bithlp.twos_complement_to_unsigned(obj.hwEta(), 9)
self.qualityBits = obj.hwQual()
self.ptBits = obj.hwPt()
# calculate the bitword to make comparison with HW easy
self.bitword = (self.ptBits << pt_low)
self.bitword += (self.qualityBits << qual_low)
self.bitword += (self.Sysign << sysign_low)
self.bitword += (unsigned_eta << eta_low)
self.bitword += (self.phiBits << phi_low)
if mu_type == "OUT" and self.Iso > 0:
self.bitword += (self.Iso << iso_low)
self.frame = frame
self.link = link
self.local_link = -1
if self.link != -1:
self.local_link = self.link - 36
if self.local_link < vhdl_dict["EMTF_POS_HIGH"]:
pass
elif self.local_link < vhdl_dict["OMTF_POS_HIGH"]:
self.local_link -= vhdl_dict["OMTF_POS_LOW"]
elif self.local_link < vhdl_dict["BMTF_HIGH"]:
self.local_link -= vhdl_dict["BMTF_LOW"]
elif self.local_link < vhdl_dict["OMTF_NEG_HIGH"]:
self.local_link -= vhdl_dict["OMTF_NEG_LOW"]
else:
self.local_link -= vhdl_dict["EMTF_NEG_LOW"]