def __init__(self, connection_file, id=None, uri=None, address_table=None):
"""
Gets the parameters to build the necessary Pycohal's ConnectionManager object.
If it succeeds, the HW mapping starts
"""
self.__hw_manager = None
self.__ip_end_points = []
# self.__ip_to_nodeId_to_value = {}
if connection_file:
self.__connection_file = connection_file
self.__hw_manager = uhal.ConnectionManager(
str("file://" + self.__connection_file))
print "DEBUG: HardwareStruct instantiated with file name %s" % self.__connection_file
elif id and uri and address_table:
self.__id = id
self.__uri = uri
self.__address_table = address_table
self.__hw_manager = uhal.ConnectionManager(self.__id, self.__uri,
self.__address_table)
print "DEBUG: HardwareStruct instantiated with id: %s, uri: %s, address_table: %s" % (
self.__id, self.__uri, self.__address_table)
else:
print "ERROR: HardwareStruct object not properly instantiated"
if self.__hw_manager:
self.__load_hardware()
else:
print "ERROR: could not start uhal.ConnectionManager object. Cannot start the default gui"
def read_write_single_reg(reg_num):
connectionFilePath = "./connection_file/connection_file.xml"
deviceId = "dummy.udp.0"
registerName = reg_num
connectionMgr = uhal.ConnectionManager("file://" + connectionFilePath)
hw = connectionMgr.getDevice(deviceId)
node = hw.getNode(registerName)
print "Reading from register '" + registerName + "' ..."
reg = node.read()
# dispatch method sends read request to hardware, and waits for result to return
# N.B. Before dispatch, reg.valid() == false, and reg.value() will throw
hw.dispatch()
print "... success!"
print "Value =", hex(reg)
print "Writing random value to register '" + registerName + "' ..."
node.write(random.randint(0, 0xffffffff))
# N.B. Depending on how many transactions are already queued, this write request may either be sent to the board during the write method, or when the dispatch method is called
hw.dispatch()
# In case there are any problems with the transaction, an exception will be thrown from the dispatch method
# Alternatively, if you want to check whether an individual write succeeded or failed, you can call the 'valid()' method of the uhal::ValHeader object that is returned by the write method
print "... success!"
return "success", hex(reg)
def main():
# this setup stuff should eventually go into the data base
phi_node_dict = {}
node_prefix = "payload.mu_deserialization."
offsets = []
node_names = []
for j in range(2): # for both endcap+ and overlap+ 60 degrees sectors
for i in range(6): # 6 channels each
offsets.append(i*96 + 24)
for i in range(12): # for barrel 12*30 degree wedges
offsets.append((i * 48 + 576 - 24) % 576)
for j in range(2): # for both endcap- and overlap- 60 degrees sectors
for i in range(6): # 6 channels each
offsets.append(i*96 + 24)
for quad in range(9):
for channel in range(4):
node_name = node_prefix + "mu_quad{q}.phi_offset_{ch}".format(q=quad, ch=channel)
phi_node_dict[node_name] = offsets[quad*4+channel]
node_names.append(node_name)
opts = parse_options()
uhal.setLogLevelTo(uhal.LogLevel.ERROR)
cm = uhal.ConnectionManager("file://${MP7_TESTS}/etc/mp7/connections-test.xml")
board = cm.getDevice(opts.board)
board.getNode('ctrl.id').read()
try:
board.dispatch()
except:
# print something here when if times out
print 'MP7 access failed (name:', board.id(), 'uri:', board.uri(), ')'
sys.exit(-1)
if opts.mode == "read":
values = {}
for node, value in phi_node_dict.iteritems():
values[node] = board.getNode(node).read()
try:
board.dispatch()
except:
print 'read failed'
sys.exit(-1)
for node in node_names:
print node, " = ", hex(values[node]), " .. should be", hex(phi_node_dict[node])
return
if opts.mode == "write":
for node, value in phi_node_dict.iteritems():
board.getNode(node).write(value)
try:
board.dispatch()
except:
print 'write failed'
sys.exit(-1)
print "wrote values to phi offset registers."
def getinfo():
uhal.setLogLevelTo(uhal.LogLevel.WARNING)
cm = uhal.ConnectionManager(
'file://${TIMING_SHARE}/config/etc/connections.xml')
device = cm.getDevice('OVLD_TUN')
readMAC(device)
def __init__(self, dev_name, man_file):
self.dev_name = dev_name
self.manager = uhal.ConnectionManager(man_file)
self.hw = self.manager.getDevice(self.dev_name)
#self.fwVersion = self.hw.getNode("version").read()
#self.hw.dispatch()
#print "--", self.dev_name, "FIRMWARE VERSION= " , hex(self.fwVersion)
# Instantiate a I2C core to configure components
#self.i2c_master= I2CCore(self.hw, 10, 5, "i2c_master", None)
self.i2c_master = I2CCore(self.hw, 10, 5, "io.i2c", None)
# Instantiate a secondary I2C core for SFP cage (not working yet)
self.i2c_secondary = I2CCore(self.hw, 10, 5, "io.usfp_i2c", None)
# Enable the I2C interface on enclustra
enableCore = True #Only need to run this once, after power-up
self._enableCore()
# Instantiate EEPROM
self.zeEEPROM = E24AA025E48T(self.i2c_master, 0x57)
# Instantiate clock chip
self.zeClock = si5345(self.i2c_master, 0x68)
res = self.zeClock.getDeviceVersion()
self.zeClock.checkDesignID()
# Instantiate expander for the equalizers (IC28)
self.exp_EQ = PCA9539PW(self.i2c_master, 0x74)
self.exp_EQ.setInvertReg(0, 0x00) # 0= normal
self.exp_EQ.setIOReg(0, 0x00) # 0= output <<<<<<<<<<<<<<<<<<<
self.exp_EQ.setInvertReg(1, 0x00) # 0= normal
self.exp_EQ.setIOReg(1, 0x00) # 0= output <<<<<<<<<<<<<<<<<<<
# Instantiate expander for SFP signals (IC29)
self.exp_SFP = PCA9539PW(self.i2c_master, 0x75)
self.exp_SFP.setInvertReg(0, 0x00) # 0= normal
self.exp_SFP.setIOReg(0, 0x00) # 0= output <<<<<<<<<<<<<<<<<<<
self.exp_SFP.setInvertReg(1, 0x00) # 0= normal
self.exp_SFP.setIOReg(1, 0xFF) # FF= input <<<<<<<<<<<<<<<<<<<
# Instantiate expander for LED control (IC27)
self.exp_LED = PCA9539PW(self.i2c_master, 0x76)
self.exp_LED.setInvertReg(0, 0x00) # 0= normal
self.exp_LED.setIOReg(0, 0x00) # 0= output (LED) <<<<<<<<<<<<<<<<<<<
self.exp_LED.setInvertReg(1, 0x00) # 0= normal
self.exp_LED.setIOReg(1, 0x00) # 0= output <<<<<<<<<<<<<<<<<<<
# Instantiate I2C multiplexer
self.mux_I2C = PCA9548ADW(self.i2c_master, 0x73)
# Instantiate CDR for upstream and multiplexer
self.cdr_UPS = ADN2814ACPZ(self.i2c_master, 0x40)
self.cdr_MUX = ADN2814ACPZ(self.i2c_master, 0x60)
def __init__(self,connection="file://connection.xml",device="vice"):
self._manager=uhal.ConnectionManager(connection)
self._hw=self._manager.getDevice(device)
# I2C registers
self._i2c_master = self._hw.getNode("ctrl.i2c")
self._i2c_pre_lo = self._i2c_master.getNode("i2c_pre_lo")
self._i2c_pre_hi = self._i2c_master.getNode("i2c_pre_hi")
self._i2c_ctrl = self._i2c_master.getNode("i2c_ctrl")
self._i2c_rxtx = self._i2c_master.getNode("i2c_rxtx")
self._i2c_cmdstatus = self._i2c_master.getNode("i2c_cmdstatus")
# Memory registers
self._datapath = self._hw.getNode("datapath")
self._capture = self._datapath.getNode("mem_cnf.ctrl.capture")
self._ch0_mode = self._datapath.getNode("mem_cnf.ctrl.modes.ch0_mode")
self._ch1_mode = self._datapath.getNode("mem_cnf.ctrl.modes.ch1_mode")
self._ch2_mode = self._datapath.getNode("mem_cnf.ctrl.modes.ch2_mode")
self._ch3_mode = self._datapath.getNode("mem_cnf.ctrl.modes.ch3_mode")
self._ch4_mode = self._datapath.getNode("mem_cnf.ctrl.modes.ch4_mode")
self._ch0_mem = self._datapath.getNode("ch0_mem")
self._ch1_mem = self._datapath.getNode("ch1_mem")
self._ch2_mem = self._datapath.getNode("ch2_mem")
self._ch3_mem = self._datapath.getNode("ch3_mem")
self._ch4_mem = self._datapath.getNode("ch4_mem")
# Firmware version info
self._fw_version = self._hw.getNode("ctrl.ver")
self._fw_val = self._fw_version.read()
self._hw.dispatch()
self._nn = '{0:08x}'.format(int(self._fw_val.value()))[6:8]
self._dd = '{0:08x}'.format(int(self._fw_val.value()))[4:6]
self._mm = '{0:08x}'.format(int(self._fw_val.value()))[2:4]
self._yy = '{0:08x}'.format(int(self._fw_val.value()))[0:2]
# STAT/CTRL registers
self._control = self._hw.getNode("ctrl.conf.ctrl")
self._nuke = self._control.getNode("nuke")
self._soft_rst = self._control.getNode("soft_rst")
self._rst40 = self._control.getNode("rst40")
self._clk_sel = self._control.getNode("clk_sel")
self._sel_mode = self._control.getNode("sel_mode")
self._force_mode = self._control.getNode("force_mode")
self._gpio = self._control.getNode("gpio")
self._status = self._hw.getNode("ctrl.conf.stat")
self._addr = self._status.getNode("addr")
self._mmcm_locked = self._status.getNode("mmcm_locked")
self.i2c_init()
def __init__(self, connections, verbose=0):
DEBUG_API(inspect.currentframe())
self.connections = connections
self.connectionManager = uhal.ConnectionManager(connections)
self.translator = ItemTranslator()
self.verbose = verbose
self.stdout = sys.stdout
info("TDF.ROOT_DIR:", TDF.ROOT_DIR)
info("TDF.CELLCONFIG_DIR:", TDF.CELLCONFIG_DIR)
info("TDF.L1MENU_DIR:", TDF.L1MENU_DIR)
info("TDF.MP7_ROOT_DIR:", TDF.MP7_ROOT_DIR)
info("TDF.AMC502_ROOT_DIR:", TDF.AMC502_ROOT_DIR)
info("XML connections file:", self.connections)
def __init__(self, dev_name, man_file):
self.dev_name = dev_name
self.manager = uhal.ConnectionManager(man_file)
self.hw = self.manager.getDevice(self.dev_name)
self.nDUTs = 4 #Number of DUT connectors
self.nChannels = 6 #Number of trigger inputs
self.VrefInt = 2.5 #Internal DAC voltage reference
self.VrefExt = 1.3 #External DAC voltage reference
self.intRefOn = False #Internal reference is OFF by default
self.fwVersion = self.hw.getNode("version").read()
self.hw.dispatch()
print "EUDUMMY FIRMWARE VERSION= ", hex(self.fwVersion)
# Instantiate a I2C core to configure components
self.TLU_I2C = I2CCore(self.hw, 10, 5, "i2c_master", None)
#self.TLU_I2C.state()
enableCore = True #Only need to run this once, after power-up
self.enableCore()
# Instantiate clock chip
self.zeClock = si5345(self.TLU_I2C, 0x68)
res = self.zeClock.getDeviceVersion()
self.zeClock.checkDesignID()
# Instantiate DACs and configure them to use reference based on TLU setting
self.zeDAC1 = AD5665R(self.TLU_I2C, 0x13)
self.zeDAC2 = AD5665R(self.TLU_I2C, 0x1F)
self.zeDAC1.setIntRef(self.intRefOn)
self.zeDAC2.setIntRef(self.intRefOn)
# Instantiate the serial line expanders and configure them to default values
self.IC6 = PCA9539PW(self.TLU_I2C, 0x74)
self.IC6.setInvertReg(0, 0x00) # 0= normal, 1= inverted
self.IC6.setIOReg(0, 0x00) # 0= output, 1= input
self.IC6.setOutputs(0, 0xAA) # If output, set to XX
self.IC6.setInvertReg(1, 0x00) # 0= normal, 1= inverted
self.IC6.setIOReg(1, 0x00) # 0= output, 1= input
self.IC6.setOutputs(1, 0xAA) # If output, set to XX
self.IC7 = PCA9539PW(self.TLU_I2C, 0x75)
self.IC7.setInvertReg(0, 0x00) # 0= normal, 1= inverted
self.IC7.setIOReg(0, 0x00) # 0= output, 1= input
self.IC7.setOutputs(0, 0x0F) # If output, set to XX
self.IC7.setInvertReg(1, 0x00) # 0= normal, 1= inverted
self.IC7.setIOReg(1, 0x00) # 0= output, 1= input
self.IC7.setOutputs(1, 0x50) # If output, set to XX
def __init__(self, mode):
self.connection_mode = mode
if self.connection_mode == 0: # IPbus/pyChips mode
print "Entering normal mode"
if self.connection_mode == 1: # Simulation mode
with open("./data/FPGA_statusfile.dat", "w") as myfile:
print "Entering Simulation mode."
myfile.write("0")
if self.connection_mode == 2: # Serial mode
print "Entering Aamir mode."
if self.connection_mode == 3: # IPbus/uHal mode
#self.glib = GLIB()
#self.glib.get("ext_adc")
import uhal
manager = uhal.ConnectionManager("file://connections.xml")
self.hw = manager.getDevice("VFAT3_TB")
self.hw.setTimeoutPeriod(5000)
#self.hw.getNode("STATE").write(1)
#self.hw.dispatch()
reg = self.hw.getNode("STATE").read()
self.hw.dispatch()
print reg
self.FCC_LUT_L = {
"AAAA":"00000000",
"PPPP":"11111111",
"0000":"00010111",
"1111":"11101000",
"0001":"00001111",
"0010":"00110011",
"0011":"00111100",
"0100":"01010101",
"0101":"01011010",
"0110":"01100110",
"0111":"01101001",
"1000":"10010110",
"1001":"10011001",
"1010":"10100101",
"1011":"10101010",
"1100":"11000011",
"1101":"11001100",
"1110":"11110000"
}
def __init__(self, dev_name, man_file):
self.dev_name = dev_name
self.manager = uhal.ConnectionManager(man_file)
self.hw = self.manager.getDevice(self.dev_name)
self.nChannels = 4
self.VrefInt = 2.5 #Internal DAC voltage reference
self.VrefExt = 1.3 #External DAC voltage reference
self.intRefOn = False #Internal reference is OFF by default
self.fwVersion = self.hw.getNode("version").read()
self.hw.dispatch()
print "uHAL VERSION= ", hex(self.fwVersion)
# Instantiate a I2C core to configure the DACs
self.TLU_I2C = I2CCore(self.hw, 10, 5, "i2c_master", None)
self.TLU_I2C.state()
def read_single_reg(
deviceID,
reg,
connectionFilePath="./connection_file/connection_file.xml"):
# Creating the HwInterface
connectionMgr = uhal.ConnectionManager("file://" + connectionFilePath)
hw = connectionMgr.getDevice(deviceID)
node = hw.getNode(reg)
# Reading from the register
value = node.read()
#print "Value =", hex(value)
# dispatch method sends read request to hardware, and waits for result to return
# N.B. Before dispatch, mem.valid() == false, and mem.value() will throw
hw.dispatch()
return "success", "", value
def loadConnections(self, filename):
# Create connection manager and fetch devices.
cm = uhal.ConnectionManager(
'file://{filename}'.format(filename=os.path.abspath(filename)))
self.deviceTabWidget.clear()
for name in cm.getDevices():
device = cm.getDevice(name)
self.deviceTabWidget.addDevice(device)
# After loading a conenction file, it is possible to refresh the current module.
self.configureAct.setEnabled(True)
self.findAct.setEnabled(True)
self.refreshAct.setEnabled(True)
self.expandAllAct.setEnabled(True)
self.collapseAllAct.setEnabled(True)
self.setWindowTitle("TDF Control - {filename}".format(
filename=os.path.basename(filename)))
def write_single_reg(
deviceID,
reg,
value,
connectionFilePath="./connection_file/connection_file.xml"):
## Creating the HwInterface
connectionMgr = uhal.ConnectionManager("file://" + connectionFilePath)
hw = connectionMgr.getDevice(deviceID)
node = hw.getNode(reg)
# Writing value to the register
node.write(value)
# N.B. Depending on how many transactions are already queued, this write request may either be sent to the board during the write method, or when the dispatch method is called
hw.dispatch()
# In case there are any problems with the transaction, an exception will be thrown from the dispatch method
# Alternatively, if you want to check whether an individual write succeeded or failed, you can call the 'valid()' method of the uhal::ValHeader object that is returned by the write method
return "success", ""
def main():
# I'm so sorry..
state = "Undefined"
# Sanitise the connection string
conns = opts.connections_file.split(';')
for i,c in enumerate(conns):
if re.match('^\w+://.*', c) is None:
conns[i] = 'file://'+c
print 'Using file',conns
cm = uhal.ConnectionManager(';'.join(conns))
amc13T1 = cm.getDevice('T1')
amc13T2 = cm.getDevice('T2')
amc13 = dtm.DTManager(t1=amc13T1, t2=amc13T2)
help_string = 'Available commands: status, reset, configureTTC, configure, start, stop, spy, q'
while True:
print help_string
c = raw_input("--> ")
if c == 'status':
status(amc13, state)
elif c == 'reset':
state = reset(amc13)
elif c == 'configureTTC':
state = configureTTC(amc13, state)
elif c == 'configure':
state = configure(amc13, state)
elif c == 'start':
state = start(amc13, state)
elif c == 'stop':
state = stop(amc13, state)
elif c == 'spy':
spy(amc13, state)
elif c == 'q':
break
else:
print "Error: Unrecognized command. Try again."
def read_write_single_reg():
# PART 1: Argument parsing
#if len(sys.argv) != 4:
# print "Incorrect usage!"
# print "usage: read_write_single_register.py <path_to_connection_file> <connection_id> <register_name>"
# sys.exit(1)
#connectionFilePath = sys.argv[1];
#deviceId = sys.argv[2];
#registerName = sys.argv[3];
connectionFilePath = "../connection_file/connection_file.xml";
deviceId = "dummy.udp.0";
registerName = "reg1";
# PART 2: Creating the HwInterface
connectionMgr = uhal.ConnectionManager("file://" + connectionFilePath);
hw = connectionMgr.getDevice(deviceId);
node = hw.getNode(registerName)
# PART 3: Reading from the register
print "Reading from register '" + registerName + "' ..."
reg = node.read();
# dispatch method sends read request to hardware, and waits for result to return
# N.B. Before dispatch, reg.valid() == false, and reg.value() will throw
hw.dispatch();
print "... success!"
print "Value =", hex(reg)
# PART 4: Writing (random value) to the register
print "Writing random value to register '" + registerName + "' ..."
node.write(random.randint(0, 0xffffffff));
# N.B. Depending on how many transactions are already queued, this write request may either be sent to the board during the write method, or when the dispatch method is called
hw.dispatch();
# In case there are any problems with the transaction, an exception will be thrown from the dispatch method
# Alternatively, if you want to check whether an individual write succeeded or failed, you can call the 'valid()' method of the uhal::ValHeader object that is returned by the write method
print "... success!"
def read_block_or_fifo(
deviceID,
nodeIdPath,
connectionFilePath="./connection_file/connection_file.xml"):
## Creating the HwInterface
connectionMgr = uhal.ConnectionManager("file://" + connectionFilePath)
hw = connectionMgr.getDevice(deviceID)
node = hw.getNode(nodeIdPath)
## Reading from the memory block / FIFO
mem = node.readBlock(node.getSize())
# dispatch method sends read request to hardware, and waits for result to return
# N.B. Before dispatch, mem.valid() == false, and mem.value() will throw
hw.dispatch()
buf = b''
for item in mem:
buf += bin(item).replace('0b', '')
return "success", "", buf
def __init_hw(self, file_name):
"""
Initializes the __hw_tree, __hw_complete and __devices objects
"""
self.__cm = uhal.ConnectionManager(str("file://" + file_name))
self.__devices = {}
for device in self.__cm.getDevices():
device_object = self.__cm.getDevice(device)
self.__hw_tree[device_object] = {}
self.__devices[device] = device_object
self.__hw_complete[device] = {}
node_vs_value = {}
for node in device_object.getNodes():
node_vs_value[node] = 0
self.__hw_complete[device] = node_vs_value
def write_block_or_fifo(
deviceID,
nodeIdPath,
data_,
connectionFilePath="./connection_file/connection_file.xml"):
data = bytes_to_list(data_)
## Creating the HwInterface
connectionMgr = uhal.ConnectionManager("file://" + connectionFilePath)
hw = connectionMgr.getDevice(deviceID)
node = hw.getNode(nodeIdPath)
## Writing data to the memory block
node.writeBlock(data)
# N.B. Depending on the size of the memory block some/all of the values will only be sent to the device when the dispatch method is called
hw.dispatch()
# In case there are any problems with the transaction, an exception will be thrown from the dispatch method
# Alternatively, if you want to check whether an individual write succeeded or failed, you can call the 'valid()' method of the uhal::ValHeader object that is returned by the write method
return "success", ""
default=False,
help='go!')
(options, args) = parser.parse_args()
############################################
############################################################
def randuint32():
return randint(0, 0xffffffff)
if __name__ == '__main__':
manager = uhal.ConnectionManager("file://../data/vipram_connections.xml")
hw = manager.getDevice("Mezz1")
uhal.setLogLevelTo(uhal.LogLevel.NOTICE)
reg0 = hw.getNode("VipMEM.V_DVDD").read()
reg1 = hw.getNode("VipMEM.V_VDD").read()
reg2 = hw.getNode("VipMEM.V_VPRECH").read()
ireg0 = hw.getNode("VipMEM.I_DVDD").read()
ireg1 = hw.getNode("VipMEM.I_VDD").read()
ireg2 = hw.getNode("VipMEM.I_VPRECH").read()
vccreg = hw.getNode("VipMEM.V_VCC3V3").read()
tmpreg = hw.getNode("VipMEM.Temperature").read()
ltcreg = hw.getNode("VipMEM.LTC2991").read()
import uhal
uhal.setLogLevelTo(uhal.LogLevel.ERROR)
manager = uhal.ConnectionManager('file://etc/connections.xml')
rdout = manager.getDevice('hgcal.rdout0')
block_ready = rdout.getNode('BLOCK_READY').read()
rdout.dispatch()
if block_ready:
print "Block is ready"
else:
print "Block is not ready"
return regValues
if __name__=="__main__":
parser = argparse.ArgumentParser(formatter_class=argparse.ArgumentDefaultsHelpFormatter, description=__doc__)
parser.add_argument('device_id', help='Board URI or ID within connections file')
parser.add_argument('reg_name', help='Register node name')
group = parser.add_mutually_exclusive_group(required=True)
group.add_argument('-c','--conn_file', default=None, help='Connections file URI (e.g. file://path/to/file.xml)')
group.add_argument('-a','--addr_file', default=None, help='Address file URI (e.g. file://path/to/file.xml)')
parser.add_argument('-r','--regex', default='.*', help='Regex pattern')
args = parser.parse_args()
# Create HwInterface and print node values
uhal.setLogLevelTo( uhal.LogLevel.ERROR )
if args.conn_file is None:
device = uhal.getDevice("device", args.device_id, args.addr_file)
else:
cm = uhal.ConnectionManager(args.conn_file)
device = cm.getDevice(args.device_id)
print('Values of registers below node "'+args.reg_name+'" in device "'+args.device_id+'"')
for name, value in snapshot(device.getNode(args.reg_name), args.regex):
print(" +", name, ":", hex(value))
#LOCAL MACHINE
import sys
sys.path.append('/users/phpgb/workspace/myFirmware/AIDA/packages')
import uhal
from I2CuHal2 import I2CCore
import time
#import miniTLU
from si5345 import si5345
from AD5665R import AD5665R
from PCA9539PW import PCA9539PW
from E24AA025E48T import E24AA025E48T
from PCA9548ADW import PCA9548ADW
from ADN2814ACPZ import ADN2814ACPZ
manager = uhal.ConnectionManager("file://./pc059_connection.xml")
hw = manager.getDevice("sfpfanout")
# hw.getNode("A").write(255)
#reg = hw.getNode("version").read()
#hw.dispatch()
#print "CHECK REG= ", hex(reg)
# #Main I2C core
print ("Instantiating master I2C core:")
#master_I2C= I2CCore(hw, 12800, 10, "i2c_master", None)
master_I2C= I2CCore(hw, 10, 5, "io.i2c", None)
master_I2C.state()
# #Secondary I2C core for SFP
import uhal
uhal.disableLogging()
hw_man = uhal.ConnectionManager("file://connection.xml")
wfd = hw_man.getDevice("wfd")
amc13 = hw_man.getDevice("amc13")
for i in range(0, 50):
# trigger the rider
wfd.getNode("wo.trigger").write(1)
wfd.dispatch()
# trigger the amc13
amc13.getNode("CONTROL0").write(0x400)
amc13.dispatch()
print "Sent trigger #%d." % (i + 1)
print " "
print "Done."
def get_lut_16bit_word(address):
from random import randint
# 0 <= ret <= (2^32-1)
val = randint(0, 65535)
if len(bin(val).replace("0b", "")) > 16: #dirty check for me
print hex(val)
return val
opts, args = parse_options()
uhal.setLogLevelTo(uhal.LogLevel.ERROR)
hlp.initLogging(logging.DEBUG)
cm = uhal.ConnectionManager(opts.connectionFile)
board = cm.getDevice(opts.board)
# run a simple access test
hlp.testAccess(board)
v = board.getNode('ctrl.id').read()
try:
board.dispatch()
except:
import sys
# print something here when if times out
print 'MP7 access failed (name:', board.id(), 'uri:', board.uri(), ')'
sys.exit(-1)
print 'MP7 access successful:'
print ' name :', board.id()
print ''
print 'Setup TCDS...'
os.system("python /nfshome0/ugtts/software/tcds/setup-tcds.py")
print ''
if args.configure_amc13:
state = "Undefined"
# Sanitise the connection string
conns = args.connections_file_amc13.split(';')
for i, c in enumerate(conns):
if re.match('^\w+://.*', c) is None:
conns[i] = 'file://' + c
print 'Using file', conns
cm = uhal.ConnectionManager(';'.join(conns))
amc13T1 = cm.getDevice('T1')
amc13T2 = cm.getDevice('T2')
amc13 = dtm.DTManager(t1=amc13T1, t2=amc13T2)
# Reset AMC13 and set to 'Halted'
state = reset(amc13)
# Reconfigure uGT FPGA
mp7butler("rebootfpga", args.device, args.fwversion)
# Reset link's logic
mp7butler("reset", args.device, "--clksrc", args.clksrc)
# each stdin line like 'reg_name' causes a read; each stdin line like 'reg_name:value' causes a write
#
# Dave Newbold, December 2020
import uhal
import time
import sys
import argparse
parser = argparse.ArgumentParser(description="IPbus general getter / setter script")
parser.add_argument('-c', "--connections-file", help = "specify connections file", default = "connections.xml")
parser.add_argument('device', help = "device name")
args = parser.parse_args()
uhal.setLogLevelTo(uhal.LogLevel.ERROR)
manager = uhal.ConnectionManager("file://" + args.connections_file)
hw = manager.getDevice(args.device)
while True:
line = sys.stdin.readline().rstrip('\n')
if not line:
break
if ':' in line:
(r, v) = line.split(':')
hw.getNode(r).write(int(v, 0))
hw.dispatch()
print r, "<-", v
else:
v = hw.getNode(line).read()
hw.dispatch()
print line, 'is', hex(v)
#!/bin/env python
import argparse
import os
import uhal
if 'XDAQ_ROOT' not in os.environ:
os.environ['XDAQ_ROOT'] = '/opt/xdaq'
desc = '''
Hacky script to apply a bunch mask range to the LPM
'''
parser = argparse.ArgumentParser(
formatter_class=argparse.ArgumentDefaultsHelpFormatter, description=desc)
parser.add_argument('enable', choices=['yes', 'no'])
args = parser.parse_args()
uhal.setLogLevelTo(uhal.LogLevel.WARNING)
cm = uhal.ConnectionManager(
'file:///opt/xdaq/share/tcdsp5/etc/tcds_connections.xml')
lpm = cm.getDevice('lpm-trig')
# Generator 4: Periodic resyncs
generatorId = 4
lpm.getNode('ipm.cyclic_generator%d.configuration.enabled' %
generatorId).write(args.enable == 'yes')
lpm.dispatch()
#!/usr/bin/python
# This script resets the board
from __future__ import print_function
import uhal
import time
import sys
import collections
uhal.setLogLevelTo(uhal.LogLevel.ERROR)
manager = uhal.ConnectionManager("file://connections.xml")
board = manager.getDevice(sys.argv[1])
board.getClient().setTimeoutPeriod(10000)
v = board.getNode("csr.id").read()
board.dispatch()
print("Board ID:", hex(v))
board.getNode("daq.timing.csr.ctrl.rst").write(1) # Hold clk40 domain in reset
board.dispatch()
board.getNode("csr.ctrl.soft_rst").write(1) # Reset ipbus registers
board.dispatch()
import uhal
if __name__ == '__main__':
# PART 1: Argument parsing
if len(sys.argv) != 4:
print "Incorrect usage!"
print "usage: read_write_block_of_fifo.py <path_to_connection_file> <connection_id> <node_name>"
sys.exit(1)
connectionFilePath = sys.argv[1]
deviceId = sys.argv[2]
nodeIdPath = sys.argv[3]
# PART 2: Creating the HwInterface
connectionMgr = uhal.ConnectionManager("file://" + connectionFilePath)
hw = connectionMgr.getDevice(deviceId)
node = hw.getNode(nodeIdPath)
# PART 3: Reading from the memory block / FIFO
print "Reading from memory block / FIFO '" + nodeIdPath + "' ..."
mem = node.readBlock(node.getSize())
# dispatch method sends read request to hardware, and waits for result to return
# N.B. Before dispatch, mem.valid() == false, and mem.value() will throw
hw.dispatch()
print "... success!"
print "Contents of memory block / FIFO '" + nodeIdPath + "':"
print mem
#for item in mem:
# print " ", hex(item)
# -*- coding: utf-8 -*-
import uhal
from I2CuHal import I2CCore
import time
#import miniTLU
from si5345 import si5345
from AD5665R import AD5665R
from PCA9539PW import PCA9539PW
from E24AA025E48T import E24AA025E48T
manager = uhal.ConnectionManager("file://./EUDETdummyconnection.xml")
hw = manager.getDevice("eudummy")
# hw.getNode("A").write(255)
reg = hw.getNode("version").read()
hw.dispatch()
print "CHECK REG= ", hex(reg)
# #First I2C core
print("Instantiating master I2C core:")
master_I2C = I2CCore(hw, 10, 5, "i2c_master", None)
master_I2C.state()
#
# #######################################
enableCore = True #Only need to run this once, after power-up
if (enableCore):
mystop = True
print " Write RegDir to set I/O[7] to output:"
myslave = 0x21
mycmd = [0x01, 0x7F]
