def testBaseRegPropagation2(self):
code = io.StringIO(r"""
.fun foo NORMAL [] = []
.reg S32 [x]
.reg U32 [y]
.reg A32 [a counter]
.bbl start
poparg counter
poparg y
lea a counter 666
ld x = a 0
mul x = x 777
st a 334 = x
lea a counter y
ld x = a 0
mul x = x 777
st a 0 = x
lea a counter y
ld x = a 0
mul x = x 777
st a 0 = x
mov a counter
ld x = a 0
mul x = x 777
st a 334 = x
ret
""")
unit = serialize.UnitParseFromAsm(code, False)
fun = unit.fun_syms["foo"]
bbl = fun.bbls[0]
cfg.FunInitCFG(fun)
liveness.FunComputeLivenessInfo(fun)
reaching_defs.FunComputeReachingDefs(fun)
reaching_defs.FunPropagateConsts(fun)
reaching_defs.FunLoadStoreSimplify(fun)
liveness.FunRemoveUselessInstructions(fun)
print("\n".join(serialize.FunRenderToAsm(fun)))
# all ld/st were re-written
for ins in bbl.inss:
self.assertIn(ins.opcode.name, {
"ret",
"mul",
"poparg",
"ld",
"ld",
"st",
"st",
})
def RenderFun(fun: ir.Fun) -> List[str]:
out = []
for line in serialize.FunRenderToAsm(fun):
if line.startswith(".fun"):
out.append(f"<span class=fun>{line}</span>")
elif line.startswith(".bbl"):
out.append(f"<span class=bbl>{line}</span>")
else:
prefix = " " if line.startswith(" ") else ""
out.append(f"{prefix}{line}")
return out
def DumpFun(reason: str, fun: ir.Fun):
print("#" * 60)
print(f"# {reason}", fun.name)
print("#" * 60)
print("\n".join(serialize.FunRenderToAsm(fun)))
def testBaseRegPropagation1(self):
code = io.StringIO(r"""
.mem COUNTER 4 RW
.data 4 [0]
.fun foo NORMAL [] = []
.stk array 4 4000
.reg S32 [x]
.reg U32 [y]
.reg A32 [counter]
.bbl start
lea.mem counter = COUNTER 0
ld x = counter 0
add x = x 1
st counter 0 = x
lea.mem counter = COUNTER 100
ld x = counter 100
add x = x 1
st counter 300 = x
mov y 666
lea.mem counter = COUNTER 0
ld x = counter y
add x = x 1
st counter y = x
lea.stk counter = array 0
ld x = counter 0
add x = x 1
st counter 0 = x
lea.stk counter = array 100
ld x = counter 100
add x = x 1
st counter 300 = x
mov y 666
lea.stk counter = array 0
ld x = counter y
add x = x 1
st counter y = x
ret
""")
unit = serialize.UnitParseFromAsm(code, False)
fun = unit.fun_syms["foo"]
bbl = fun.bbls[0]
cfg.FunInitCFG(fun)
liveness.FunComputeLivenessInfo(fun)
reaching_defs.FunComputeReachingDefs(fun)
reaching_defs.FunPropagateConsts(fun)
# reaching_defs.FunConstantFold(fun, True)
reaching_defs.FunLoadStoreSimplify(fun)
liveness.FunRemoveUselessInstructions(fun)
print("\n".join(serialize.FunRenderToAsm(fun)))
# all ld/st were re-written
for ins in bbl.inss:
self.assertIn(
ins.opcode.name,
{"ret", "add", "ld.mem", "st.mem", "ld.stk", "st.stk"})