def create_scratchpad_mux(self, definition):
memtype = 'scratchpad_mux'
name = definition.name
datawidth = definition.datawidth
addrlen = definition.addrlen
numports = definition.numports
rslt = memory_generator.generate(self.env, memtype,
name, datawidth=datawidth, addrlen=addrlen,
numports=numports)
return rslt
def create_offchipmemory(self):
memtype = 'offchipmemory'
name = self.offchipmemory.name
offchip_datawidth = self.offchipmemory.datawidth
offchip_addrlen = int(math.ceil(math.log(self.offchipmemory.size, 2)))
offchip_numports = self.offchipmemory.numports
rslt = memory_generator.generate(self.env, memtype,
name, offchip_datawidth=offchip_datawidth,
offchip_addrlen=offchip_addrlen,
offchip_numports=offchip_numports)
return rslt
def create_marshaller(self, definition):
memtype = 'marshaller'
name = definition.name
addrlen = definition.addrlen
offchip_datawidth = self.offchipmemory.datawidth
linewidth = definition.cache_linewidth
rslt = memory_generator.generate(self.env, memtype,
name, addrlen=addrlen,
linewidth=linewidth,
offchip_datawidth=offchip_datawidth)
return rslt
def create_offchipmemory(self):
memtype = 'offchipmemory'
name = self.offchipmemory.name
offchip_datawidth = self.offchipmemory.datawidth
offchip_addrlen = int(math.ceil(math.log(self.offchipmemory.size, 2)))
offchip_numports = self.offchipmemory.numports
rslt = memory_generator.generate(self.env,
memtype,
name,
offchip_datawidth=offchip_datawidth,
offchip_addrlen=offchip_addrlen,
offchip_numports=offchip_numports)
return rslt
def create_marshaller(self, definition):
memtype = 'marshaller'
name = definition.name
addrlen = definition.addrlen
offchip_datawidth = self.offchipmemory.datawidth
linewidth = definition.cache_linewidth
rslt = memory_generator.generate(self.env,
memtype,
name,
addrlen=addrlen,
linewidth=linewidth,
offchip_datawidth=offchip_datawidth)
return rslt
def create_scratchpad_mux(self, definition):
memtype = 'scratchpad_mux'
name = definition.name
datawidth = definition.datawidth
addrlen = definition.addrlen
numports = definition.numports
rslt = memory_generator.generate(self.env,
memtype,
name,
datawidth=datawidth,
addrlen=addrlen,
numports=numports)
return rslt
def create_addressmapper(self, definition):
memtype = 'addressmapper'
name = definition.name
addrlen = definition.addrlen
offchip_datawidth = self.offchipmemory.datawidth
offchip_addrlen = self.offchipmemory.addrlen
addrmap_start = definition.offset
rslt = memory_generator.generate(self.env, memtype,
name, addrlen=addrlen,
offchip_datawidth=offchip_datawidth,
offchip_addrlen=offchip_addrlen,
addrmap_start=addrmap_start)
return rslt
def create_addressmapper(self, definition):
memtype = 'addressmapper'
name = definition.name
addrlen = definition.addrlen
offchip_datawidth = self.offchipmemory.datawidth
offchip_addrlen = self.offchipmemory.addrlen
addrmap_start = definition.offset
rslt = memory_generator.generate(self.env,
memtype,
name,
addrlen=addrlen,
offchip_datawidth=offchip_datawidth,
offchip_addrlen=offchip_addrlen,
addrmap_start=addrmap_start)
return rslt
def create_cache(self, definition):
memtype = 'banked_cache' # 'cache'
name = definition.name
datawidth = definition.datawidth
addrlen = definition.addrlen
numports = definition.numports
cache_capacity = definition.cache_capacity
numways = definition.cache_way
linewidth = definition.cache_linewidth
offchip_datawidth = self.offchipmemory.datawidth
offchip_addrlen = int(math.ceil(math.log(self.offchipmemory.size, 2)))
rslt = memory_generator.generate(self.env, memtype,
name, datawidth=datawidth, addrlen=addrlen,
numports=numports,
cache_capacity=cache_capacity,
numways=numways,
linewidth=linewidth,
offchip_datawidth=offchip_datawidth,
offchip_addrlen=offchip_addrlen)
return rslt
def create_cache(self, definition):
memtype = 'banked_cache' # 'cache'
name = definition.name
datawidth = definition.datawidth
addrlen = definition.addrlen
numports = definition.numports
cache_capacity = definition.cache_capacity
numways = definition.cache_way
linewidth = definition.cache_linewidth
offchip_datawidth = self.offchipmemory.datawidth
offchip_addrlen = int(math.ceil(math.log(self.offchipmemory.size, 2)))
rslt = memory_generator.generate(self.env,
memtype,
name,
datawidth=datawidth,
addrlen=addrlen,
numports=numports,
cache_capacity=cache_capacity,
numways=numways,
linewidth=linewidth,
offchip_datawidth=offchip_datawidth,
offchip_addrlen=offchip_addrlen)
return rslt
