def main():
arty = artyS7(dev_path=read_dev_path("./conf/uart_path.txt"))
print("Enable DDR3 interface")
arty.fpga_write("ddr3_enable", 1)
cal_done = arty.fpga_read("ddr3_cal_complete")
print(f"cal complete: {cal_done}")
print(f"selecting ddr3 page transfer dpram...")
arty.fpga_write("dpram_sel", 0)
pg = 0
# test writing random patterns to the memory chip
print(f"writing ramp to page {pg}")
data = np.arange(2048)
hdata = "".join(f"{val:04x}" for val in data)
arty.fpga_burst_write(0, hdata)
time.sleep(0.05)
readback = arty.fpga_read(0, 2048)
if not np.array_equal(data, readback):
raise RuntimeError(
"Could not successfully read data back from page transfer DPRAM"
)
# pages.append(data)
# ship to DDR3 memory
send_DPRAM_to_pg(arty, pg)
print("clearing dpram...")
arty.fpga_burst_write(0, "0" * 8192)
assert np.array_equal(np.zeros(2048, dtype=np.int16), arty.fpga_read(0, 2048))
print("Reading page 0 back")
pg_data = read_DDR3_pg(arty, pg)
if np.array_equal(pg_data, data):
print("Match!")
else:
print("Mismatch!")
# ship to addr 2
print("shipping page to DDR3 addr 16...")
set_DDR3_addr(arty, 16)
arty.fpga_write("dpram_sel", 0)
arty.fpga_write("ddr3_pg_optype", 1)
arty.fpga_write("ddr3_pg_req", 1)
# read back page 0
print("reading back page 0")
set_DDR3_addr(arty, 0)
arty.fpga_write("ddr3_pg_optype", 0)
arty.fpga_write("ddr3_pg_req", 1)
def main():
arty = artyS7(dev_path=read_dev_path("./conf/uart_path.txt"))
for i in range(3):
arty.disable_led(i)
arty.set_rgb_led_color((4000, 0, 0))
arty.enable_led(0)
time.sleep(1)
arty.set_rgb_led_color((0, 4000, 0))
time.sleep(1)
arty.set_rgb_led_color((0, 0, 4000))
time.sleep(1)
arty.set_rgb_led_color((1000, 5000, 3000))
arty.disable_led(0)
arty.enable_led(1)
time.sleep(5)
arty.fpga_write("rgb_cycle_speed_sel", 2)
time.sleep(10)
arty.enable_led(2)
for i in range(4):
time.sleep(2)
arty.fpga_write("kr_speed_sel", i)
for i in range(3):
arty.disable_led(i)
def main():
arty = artyS7(dev_path=read_dev_path("./conf/uart_path.txt"))
print("Enable DDR3 interface")
arty.fpga_write("ddr3_enable", 1)
time.sleep(0.1)
cal_done = arty.fpga_read("ddr3_cal_complete")
print(f"cal complete: {cal_done}")
print(f"selecting ddr3 page transfer dpram...")
arty.fpga_write("dpram_sel", 0)
pages = []
# test writing random patterns to the memory chip
for pg in range(START_PG, START_PG + PGS_TO_TEST):
print(f"writing to page {pg}")
data = np.random.randint(0, 0x10000, size=2048)
hdata = "".join(f"{val:04x}" for val in data)
arty.fpga_burst_write(0, hdata)
time.sleep(0.05)
readback = arty.fpga_read(0, 2048)
if not np.array_equal(data, readback):
raise RuntimeError(
"Could not successfully read data back from page transfer DPRAM"
)
pages.append(data)
# ship to DDR3 memory
send_DPRAM_to_pg(arty, pg)
print("clearing dpram...")
arty.fpga_burst_write(0, "0" * 8192)
assert np.array_equal(np.zeros(2048, dtype=np.int16), arty.fpga_read(0, 2048))
print("Reading pages back")
all_good = True
for i, pg in enumerate(range(START_PG, START_PG + PGS_TO_TEST)):
print(f"checking page {pg}")
pg_data = read_DDR3_pg(arty, pg)
if np.array_equal(pg_data, pages[i]):
print("Match!")
else:
print("Mismatch!")
all_good = False
if all_good:
print("Success!")
else:
print("Failure!")
def main():
arty = artyS7(dev_path=read_dev_path("./conf/uart_path.txt"))
wfm = arty.read_waveform()
print(wfm)
print(f'n samples: {len(wfm["adc_samples"])}')
# check ramp
print(f"ramping adc samples: {check_ramp(wfm)}")
def main():
arty = artyS7(dev_path=read_dev_path("./conf/uart_path.txt"))
print("Resetting waveform buffers...")
arty.fpga_write(0xEF9, 0xFFFF)
arty.fpga_write(0xEF0, 0xFFFF)
arty.fpga_write(0xEF9, 0x0)
arty.fpga_write(0xEF0, 0x0)
print("Configuring test conf")
arty.fpga_write("test_conf", test_conf)
arty.fpga_write("buf_reader_dpram_mode", 1)
print_wfm_count(arty)
print("Sending software triggers")
arty.fpga_write(0xFFC, 0xFFFF)
arty.fpga_write(0xEF4, 0xFFFF)
print_wfm_count(arty)
print("Enabling reader")
ltcs = [None, None]
arty.fpga_write("buf_reader_enable", 0x1)
while True:
wfm = arty.read_waveform()
if wfm is None:
break
chan = wfm["chan_num"]
evt_len = wfm["evt_len"]
ltc = wfm["ltc"]
ltc_ind = 1 if chan > 15 else 0
if ltcs[ltc_ind] is None:
ltcs[ltc_ind] = ltc
try:
check_wfm(wfm, ltcs)
except:
print("Failed wfm!")
print(wfm)
raise
print(f'chan {chan} discr_samples: {wfm["discr_samples"][:5]}')
print_wfm_count(arty)
print("disabling reader...")
arty.fpga_write("buf_reader_enable", 0x0)
def main():
arty = artyS7(dev_path=read_dev_path("./conf/uart_path.txt"))
# enable DDR3
arty.fpga_write("ddr3_enable", 1)
# allocate 10 pages
arty.fpga_write("hbuf_stop_pg", 10)
# enable the reader
arty.fpga_write("buf_reader_enable", 1)
# start the controller
arty.fpga_write("hbuf_enable", 1)
print(f'Reader status: {arty.fpga_read("hbuf_stat")}')
print(f'Reader last page: {arty.fpga_read("hbuf_last_pg")}')
def main():
if len(sys.argv) < 3:
print("Usage: fpga_brd.py <start_adr> <read_len>")
return 0
start_adr = sys.argv[1]
arty = artyS7(dev_path=read_dev_path("./conf/uart_path.txt"))
n_to_read = int(sys.argv[2])
read_data = arty.fpga_read(start_adr, read_len=n_to_read)
if n_to_read == 1:
read_data = [read_data]
for word in read_data:
print(hex(word))
def main():
if len(sys.argv) == 1:
print_register_map()
return 0
adr = sys.argv[1]
if len(sys.argv) >= 3:
data = sys.argv[2]
else:
data = None
arty = artyS7(dev_path=read_dev_path("./conf/uart_path.txt"))
if data is not None:
arty.fpga_write(adr, data)
print(hex(arty.fpga_read(adr)))
def main():
if len(sys.argv) < 3:
print("Usage: bwr_from_file.py <start_adr> <file_name>")
return 0
start_adr = sys.argv[1]
h_data = read_file(sys.argv[2])
arty = artyS7(dev_path=read_dev_path("./conf/uart_path.txt"))
arty.fpga_burst_write(start_adr, h_data)
time.sleep(0.001)
n_to_read = len(h_data) // 4
read_data = arty.fpga_read(start_adr, read_len=n_to_read)
for word in read_data:
print(f"0x{word:4x}")
def main():
arty = artyS7(dev_path=read_dev_path("./conf/uart_path.txt"))
print("Resetting waveform buffers...")
arty.fpga_write(0xEF9, 0xFFFF)
arty.fpga_write(0xEF0, 0xFFFF)
arty.fpga_write(0xEF9, 0x0)
arty.fpga_write(0xEF0, 0x0)
print("Configuring test conf")
arty.fpga_write("test_conf", test_conf)
print("Causing buffer overflow...")
while arty.fpga_read(0xEFA) != 0xFFFF or arty.fpga_read(0xEF1) != 0xFF:
arty.fpga_write(0xFFC, 0xFFFF)
arty.fpga_write(0xEF4, 0xFFFF)
print_wfm_count(arty)
print("Enabling reader")
arty.fpga_write("buf_reader_enable", 0x1)
print("draining buffers...")
counter = 0
while True:
wfm = arty.read_waveform()
if wfm is None:
break
counter = counter + 1
if counter % 100 == 0:
print_wfm_count(arty)
print(counter)
print_wfm_count(arty)
print("disabling reader...")
arty.fpga_write("buf_reader_enable", 0x0)
def main():
arty = artyS7(dev_path=read_dev_path("./conf/uart_path.txt"))
setting = 10
for reg in ["const_conf", "test_conf", "pre_conf", "post_conf"]:
arty.fpga_write(reg, setting)
def main():
arty = artyS7(dev_path=read_dev_path("./conf/uart_path.txt"))
print("Resetting waveform buffers...")
arty.fpga_write(0xEF9, 0xFFFF)
arty.fpga_write(0xEF0, 0xFFFF)
arty.fpga_write(0xEF9, 0x0)
arty.fpga_write(0xEF0, 0x0)
print("Configuring pre/post conf")
arty.fpga_write("pre_conf", PRE_CONF)
arty.fpga_write("post_conf", POST_CONF)
arty.fpga_write("buf_reader_dpram_mode", 1)
print_wfm_count(arty)
print("Enabling memory controller and hbuf controller")
arty.fpga_write("hbuf_enable", 0)
arty.fpga_write("ddr3_enable", 1)
arty.fpga_write("hbuf_start_pg", START_PG)
arty.fpga_write("hbuf_stop_pg", STOP_PG)
arty.fpga_write("hbuf_enable", 1)
print(f'hbuf first pg: {arty.fpga_read("hbuf_first_pg")}')
print(f'hbuf last pg: {arty.fpga_read("hbuf_last_pg")}')
print_hbuf_status(arty)
time.sleep(0.1)
cal_done = arty.fpga_read("ddr3_cal_complete")
print(f"cal complete: {cal_done}")
print("Enabling reader")
arty.fpga_write("buf_reader_enable", 0x1)
print("Setting trigger threshold and enabling triggers")
arty.fpga_write("trig_threshold", TRIG_THRESH)
arty.fpga_write("trig_settings", 0x21)
time.sleep(0.5)
print("Disabling triggers")
arty.fpga_write("trig_settings", 0x0)
print_hbuf_status(arty)
low_overflow = arty.fpga_read(0xEFA)
high_overflow = arty.fpga_read(0xEF1)
overflow = (high_overflow << 16) | low_overflow
print(f"overflow status: 0x{overflow:06x}")
print("Flushing hbuf")
arty.fpga_write("hbuf_task_reg", 0x1)
print_hbuf_status(arty)
# check waveforms, verify trigger rates, etc
print(f"Reading the first {PGS_TO_READ} pages")
pgs = [pop_hbuf_pg(arty) for i in range(PGS_TO_READ)]
print_hbuf_status(arty)
wfms = unpack_and_sort_wfms(pgs)
analyze_wfms(wfms)
# clear the hit buffer
print("Clearing the hit buffer")
arty.fpga_write("hbuf_pg_clr_count", 0xFFFF)
arty.fpga_write("hbuf_task_reg", 0x2)
print_hbuf_status(arty)
def main():
arty = artyS7(dev_path=read_dev_path("./conf/uart_path.txt"))
print("Resetting waveform buffers...")
arty.fpga_write(0xEF9, 0xFFFF)
arty.fpga_write(0xEF0, 0xFFFF)
arty.fpga_write(0xEF9, 0x0)
arty.fpga_write(0xEF0, 0x0)
print("Configuring test conf")
arty.fpga_write("test_conf", test_conf)
arty.fpga_write("buf_reader_dpram_mode", 1)
print_wfm_count(arty)
print("Enabling memory controller and hbuf controller")
arty.fpga_write("ddr3_enable", 1)
arty.fpga_write("hbuf_start_pg", START_PG)
arty.fpga_write("hbuf_stop_pg", STOP_PG)
arty.fpga_write("hbuf_enable", 1)
print(f'hbuf first pg: {arty.fpga_read("hbuf_first_pg")}')
print(f'hbuf last pg: {arty.fpga_read("hbuf_last_pg")}')
print_hbuf_status(arty)
time.sleep(0.1)
cal_done = arty.fpga_read("ddr3_cal_complete")
print(f"cal complete: {cal_done}")
print("Sending software triggers")
arty.fpga_write(0xFFC, 0xFFFF)
arty.fpga_write(0xEF4, 0xFFFF)
print_wfm_count(arty)
print("Enabling reader")
arty.fpga_write("buf_reader_enable", 0x1)
print_wfm_count(arty)
print_hbuf_status(arty)
print("Sending more software triggers")
arty.fpga_write(0xFFC, 0xFFFF)
arty.fpga_write(0xEF4, 0xFFFF)
print_wfm_count(arty)
print_hbuf_status(arty)
print("Flushing hbuf")
arty.fpga_write("hbuf_task_reg", 0x1)
print_hbuf_status(arty)
print("Draining hit buffer")
pages = []
while True:
pg = pop_hbuf_pg(arty)
if pg is None:
break
pages.append(pg)
print_hbuf_status(arty)
print("disabling reader...")
arty.fpga_write("buf_reader_enable", 0x0)
print("Unpacking waveforms...")
unpack_and_check_wfms(pages)
def main():
arty = artyS7(dev_path=read_dev_path("./conf/uart_path.txt"))
print("Resetting waveform buffers...")
arty.fpga_write(0xEF9, 0xFFFF)
arty.fpga_write(0xEF0, 0xFFFF)
arty.fpga_write(0xEF9, 0x0)
arty.fpga_write(0xEF0, 0x0)
print("Configuring trigger settings")
arty.fpga_write("pre_conf", pre_conf)
arty.fpga_write("post_conf", post_conf)
arty.fpga_write("trig_mode", 1)
arty.fpga_write("trig_threshold", thresh_val)
print("Arming triggers")
arty.fpga_write(0xFFA, 0xFFFF)
arty.fpga_write(0xEF3, 0xFFFF)
print("Armed readback:")
print(hex(arty.fpga_read(0xFF9)))
print(hex(arty.fpga_read(0xEF2)))
print_wfm_count(arty)
print("Enabling triggers")
arty.fpga_write("trig_settings", 0x21)
print("Armed readback:")
print(hex(arty.fpga_read(0xFF9)))
print(hex(arty.fpga_read(0xEF2)))
print_wfm_count(arty)
print("Enabling reader")
arty.fpga_write("buf_reader_dpram_mode", 1)
ltcs = [None, None]
arty.fpga_write("buf_reader_enable", 0x1)
while True:
wfm = arty.read_waveform()
if wfm is None:
break
chan = wfm["chan_num"]
evt_len = wfm["evt_len"]
ltc = wfm["ltc"]
ltc_ind = 1 if chan > 15 else 0
if ltcs[ltc_ind] is None:
ltcs[ltc_ind] = ltc
try:
check_wfm(wfm, ltcs)
except:
print("Failed wfm!")
print(wfm)
raise
print(f'chan {chan} discr_samples: {wfm["discr_samples"][:5]}')
print_wfm_count(arty)
print("disabling triggers...")
arty.fpga_write("trig_settings", 0x0)
arty.fpga_write("trig_mode", 0x0)
arty.fpga_write("trig_threshold", 0x0)
print("disabling reader...")
arty.fpga_write("buf_reader_enable", 0x0)