def _translate_bsh(self, oprnd1, oprnd2, oprnd3):
"""Return a formula representation of a BSH instruction.
"""
assert oprnd1.size and oprnd2.size and oprnd3.size
assert oprnd1.size == oprnd2.size
op1_var = self._translate_src_oprnd(oprnd1)
op2_var = self._translate_src_oprnd(oprnd2)
op3_var, _ = self._translate_dst_oprnd(oprnd3)
if oprnd3.size > oprnd1.size:
op1_var_zx = smtlibv2.ZEXTEND(op1_var, oprnd3.size)
op2_var_zx = smtlibv2.ZEXTEND(op2_var, oprnd3.size)
op2_var_neg = (-op2_var)
op2_var_neg_sx = smtlibv2.SEXTEND(op2_var_neg, oprnd2.size,
oprnd3.size)
shl = smtlibv2.EXTRACT(op1_var_zx >> op2_var_neg_sx, 0,
op3_var.size)
shr = smtlibv2.EXTRACT(op1_var_zx << op2_var_zx, 0, op3_var.size)
elif oprnd3.size < oprnd1.size:
shl = smtlibv2.EXTRACT(op1_var >> (-op2_var), 0, op3_var.size)
shr = smtlibv2.EXTRACT(op1_var << op2_var, 0, op3_var.size)
else:
shl = op1_var >> (-op2_var)
shr = op1_var << op2_var
return [(op3_var == smtlibv2.ITEBV(oprnd3.size, op2_var >= 0, shr,
shl))]
def _translate_sext(self, oprnd1, oprnd2, oprnd3):
"""Return a formula representation of a SEXT instruction.
"""
assert oprnd1.size and oprnd3.size
op1_var = self._translate_src_oprnd(oprnd1)
op3_var, parent_reg_constrs = self._translate_dst_oprnd(oprnd3)
dst_size = op3_var.size
constrs = []
if oprnd1.size == oprnd3.size:
expr = (op1_var == op3_var)
elif oprnd1.size < oprnd3.size:
expr = (op3_var == smtlibv2.SEXTEND(op1_var, op1_var.size,
op3_var.size))
# Make sure that the values that can take dst operand
# do not exceed the range of the source operand.
# TODO: Find a better way to enforce this.
# TODO: This should not be needed any more.
# fmt = "#b%0{0}d".format(op3_var.size - op1_var.size)
# imm = smtlibv2.BitVec(op3_var.size - op1_var.size, fmt % 0)
# constrs = [(imm == smtlibv2.EXTRACT(op3_var, op1_var.size, op3_var.size - op1_var.size))]
else:
raise Exception("Invalid operand size: %d" % str(oprnd3))
rv = [expr]
if constrs:
rv += constrs
if parent_reg_constrs:
rv += parent_reg_constrs
return rv