def check_simple_divide_uu():
for a in blip.gen_fixtures(32, 500, 2):
for b in blip.gen_fixtures(32, 100, 2):
if b == 0: continue
q, r = divide_serial_uu(a, b)
assert q == a // b
assert r == a % b
def check_add_u64():
src = """
add X, X, Y
ext T
add Y, Z, W
add Y, T
sys 1
"""
binary, pc = assemble_and_link(src)
for ox in blip.gen_fixtures(32, 200, 2):
for oy in blip.gen_fixtures(32, 50, 2):
x = ox << 16
y = oy << 16
assert x <= 0xffff_ffff_ffff_ffff
assert y <= 0xffff_ffff_ffff_ffff
emu = run_binary(binary,
pc,
regs={
Reg.X: x & 0xffff_ffff,
Reg.Y: y & 0xffff_ffff,
Reg.Z: x >> 32,
Reg.W: y >> 32,
})
ref_lo = (x + y) & 0xffff_ffff
ref_hi = (x + y) >> 32
assert ref_hi <= 0xffff_ffff
assert emu.regs[Reg.X] == ref_lo
assert emu.regs[Reg.Y] == ref_hi
def process():
nonlocal num_checks
for op in isa.AluOp:
yield alu.op.eq(op)
for a in blip.gen_fixtures(32, 24, 2):
yield alu.a.eq(a)
for b in blip.gen_fixtures(32, 12, 2):
if op == isa.AluOp.DIV and b == 0: continue
yield alu.b.eq(b)
yield Delay(1e-9)
ref_out, ref_ext, ref_flags = isa.emu.eval_alu(op, a, b)
out = yield alu.out
assert out == ref_out
num_checks += 1
def check_divmod():
src = """
div X, Y
ext Y
sys 1
"""
binary, pc = assemble_and_link(src)
for x in blip.gen_fixtures(32, 200, 2):
for y in blip.gen_fixtures(32, 50, 2):
if y == 0: continue
emu = run_binary(binary, pc, regs={
Reg.X: x,
Reg.Y: y,
})
assert emu.regs[Reg.X] == (x // y)
assert emu.regs[Reg.Y] == (x % y)
def check_mul_s64():
src = """
muls X, Y
ext Y
sys 1
"""
binary, pc = assemble_and_link(src)
for x in blip.gen_fixtures(32, 200, 2):
for y in blip.gen_fixtures(32, 50, 2):
emu = run_binary(binary, pc, regs={
Reg.X: x,
Reg.Y: y,
})
ref = blip.to_signed(x, 32) * blip.to_signed(y, 32)
ref_lo = ref & 0xffff_ffff
ref_hi = ref >> 32 & 0xffff_ffff
assert emu.regs[Reg.X] == ref_lo
assert emu.regs[Reg.Y] == ref_hi
def check_mul_u64():
src = """
mul X, Y
ext Y
sys 1
"""
binary, pc = assemble_and_link(src)
for x in blip.gen_fixtures(32, 200, 2):
for y in blip.gen_fixtures(32, 50, 2):
emu = run_binary(binary, pc, regs={
Reg.X: x,
Reg.Y: y,
})
ref_lo = (x * y) & 0xffff_ffff
ref_hi = (x * y) >> 32
assert ref_hi <= 0xffff_ffff
assert emu.regs[Reg.X] == ref_lo
assert emu.regs[Reg.Y] == ref_hi
def check_rotr():
src = """
shr X, Y
ext T
or X, T
sys 1
"""
binary, pc = assemble_and_link(src)
for x in blip.gen_fixtures(32, 300, 1):
for y in range(33):
emu = run_binary(binary, pc, regs={
Reg.X: x,
Reg.Y: y,
})
ref = ((x >> y) | (x << (32 - y))) & 0xffff_ffff
assert emu.regs[Reg.X] == ref
