def __init__(self, panel_desc, led_domain="sync"):
self.pd = panel_desc
self.gp = GammaParameters(gamma=2.5, bpp=8)
self.panel = FramebufferedHUB75Driver(self.pd,
led_domain=led_domain,
gamma_params=self.gp)
self.cpu_rom = Memory(width=16,
depth=256,
init=Instr.assemble(firmware(self.gp.bpp)))
self.cpu_core = CoreFSM(alsru_cls=ALSRU_4LUT, memory=self.cpu_rom)
def __init__(self, panel_shape):
# panel shape: physical (width, height) in LEDs
# i.e. width is how many pixels to shift out per row
# and height is 2**(addr_bits)/2 (assuming two rows are driven at once)
self.panel_shape = panel_shape
self.ftg = FrameTimingGenerator(panel_shape)
self.pbr0 = PixelBuffer(panel_shape)
self.cpu_rom = Memory(width=16,
depth=256,
init=Instr.assemble(firmware()))
self.cpu_core = CoreFSM(alsru_cls=ALSRU_4LUT, memory=self.cpu_rom)
def __init__(self, panel_desc, led_domain="sync"):
self.pd = panel_desc
self.gp = GammaParameters(gamma=2.5, bpp=8)
self.panel = FramebufferedHUB75Driver(self.pd,
led_domain=led_domain,
gamma_params=self.gp)
self.cpu_rom = Memory(width=16,
depth=512,
init=Instr.assemble(firmware(self.gp.bpp)))
self.cpu_ram = SPRAM()
self.cpu_core = CoreFSM(alsru_cls=ALSRU_4LUT)
self.uart = uart.SimpleUART(
default_divisor=uart.calculate_divisor(12e6, 115200))
def __init__(self, panel_desc, led_domain="sync"):
self.pd = panel_desc
self.gp = GammaParameters(gamma=2.5, bpp=8)
self.panel = FramebufferedHUB75Driver(self.pd,
led_domain=led_domain,
gamma_params=self.gp)
self.cpu_rom = Memory(width=16,
depth=512,
init=boneload.boneload_fw(uart_addr=0,
spi_addr=16))
self.cpu_ram = SPRAM()
self.cpu_core = CoreFSM(alsru_cls=ALSRU_4LUT,
reset_pc=0xFE00,
reset_w=0xFFF8)
self.uart = uart.SimpleUART(
default_divisor=uart.calculate_divisor(12e6, 115200))
self.spi = spi.SimpleSPI(fifo_depth=512)
self.mul = multiplier.Multiplier(signed=True)
def __init__(self, platform, debug=True):
self.platform = platform
self.debug = debug
if self.platform.device == "iCE40UP5K":
# lots of spram , use it
self.depth = 512 # 2 brams for bootloader
self.split_mem = True
self.cpu_ram = SPRAM()
else:
self.depth = 6 * 1024 # tinyfpga_bx
self.split_mem = False
# load testing firmware if debug is on
init_data = []
if self.debug:
print("setting test firmware")
init_data = firm_test.fw()
else:
init_data = (boneload.boneload_fw(platform.user_flash,
uart_addr=0,
spi_addr=16), )
# generate the default memory
self.cpu_rom = Memory(width=16, depth=self.depth, init=init_data)
# create the core
# TODO fix reset_c,_w
self.cpu_core = CoreFSM(alsru_cls=ALSRU_4LUT,
reset_pc=0xFE00,
reset_w=0xFFF8)
# add a uart
self.uart = uart.SimpleUART(default_divisor=uart.calculate_divisor(
platform.default_clk_frequency, 115200))
# add the spi flash
self.spi = spi.SimpleSPI(fifo_depth=512)
self.led = led.Leds()
def __init__(self, snes_signals, uart_signals, memory_signals):
self.snes_signals = snes_signals
self.uart_signals = uart_signals
self.memory_signals = memory_signals
self.o_reset_req = Signal() # request a full system reset, active high
# compile the bootloader first. we have a bootloader so a) the code can
# be updated without having to reconfigure the FPGA and b) because the
# main RAM can't always be loaded from configuration anyway.
# we can store seven info words that the PC bootload script will read
# and give to the PC application. eventually we may do some sort of
# capability list, but for now it's empty.
self.bootrom_data = make_bootloader([0] * 4)
# the main CPU. configured to start in the boot ROM.
self.cpu_core = CoreFSM(alsru_cls=ALSRU_4LUT,
reset_pc=0xFF00,
reset_w=0xFFF8)
# the boot ROM, which holds the bootloader (and its RAM).
self.bootrom = Memory(width=16, depth=256, init=self.bootrom_data)
# the reset request peripheral. this lets us get the system into a clean
# state from a remote command or similar
self.reset_req = reset_req.ResetReq()
# the UART peripheral. it runs at a fixed 2 megabaud so we can stream
# ultra fast TASes in without a problem.
self.uart = uart.SysUART(divisor=uart.calculate_divisor(12e6, 2000000))
# the (very simple) timers. used for various housekeeping things
self.timer = timer.Timer()
# the SNES communication peripheral. emulates the controllers and drives
# the APU clock
self.snes = snes.SNES(self.snes_signals)
def __init__(self, firmware=[]):
self.memory = Memory(width=16, depth=256, init=firmware)
self.core = CoreFSM(alsru_cls=ALSRU_4LUT, memory=self.memory)