def _load_params(self, ptA_addr = 3, ptB_addr = 4, pC_addr = 5, pC_aux_addr = 6):
# Load addresses from function parameters
ppc.addi(self.r_tA_addr, ptA_addr, 0)
ppc.addi(self.r_tB_addr, ptB_addr, 0)
ppc.addi(self.r_C_addr, pC_addr, 0)
ppc.addi(self.r_C_aux_addr, pC_aux_addr, 0)
return
def _load_params(self, ptA_addr = 3, ptB_addr = 4, pC_addr = 5, pC_aux_addr = 6):
# Load addresses from function parameters
ppc.addi(self.r_tA_addr, ptA_addr, 0)
ppc.addi(self.r_tB_addr, ptB_addr, 0)
ppc.addi(self.r_C_addr, pC_addr, 0)
ppc.addi(self.r_C_aux_addr, pC_aux_addr, 0)
return
def copy_param(code, target, param):
"""
Copy a parameter to the taget register.
"""
if param not in (gp_param_1, gp_param_2, gp_param_3):
raise Exception('Invalid parameter id: ' + str(param))
code.add(ppc.addi(target, param, 0))
return
def return_var(var):
if isinstance(var.reg, type(var.code.prgm.gp_return)):
var.code.add(ppc.addi(var.code.prgm.gp_return, var, 0))
elif isinstance(var.reg, type(var.code.prgm.fp_return)):
var.code.add(ppc.fmrx(var.code.prgm.fp_return, var))
else:
raise Exception('Return not supported for %s registers' % (str(type(var.reg))))
return
def copy_param(code, target, param):
"""
Copy a parameter to the taget register.
"""
if param not in (gp_param_1, gp_param_2, gp_param_3):
raise Exception("Invalid parameter id: " + str(param))
code.add(ppc.addi(target, GPRegister(param), 0))
return
def TestExtended():
class Add10(spe.ExtendedInstruction):
isa_module = ppc
def __init__(self, d, value):
self.d = d
self.value = value
spe.ExtendedInstruction.__init__(self)
return
def block(self):
for i in range(10):
ppc.addi(self.d, self.d, self.value)
return
code = InstructionStream()
proc = Processor()
# Using code.add
code.add(ppc.addi(code.gp_return, 0, 0))
code.add(Add10(code.gp_return, 1))
Add10.ex(1).eval(code, reg=code.gp_return)
code.print_code()
r = proc.execute(code)
print r
assert r == 20
# Using active code
code.reset()
ppc.set_active_code(code)
ppc.addi(code.gp_return, 0, 0)
Add10(code.gp_return, 1)
Add10.ex(1).eval(ppc.get_active_code(), reg=code.gp_return)
code.print_code()
r = proc.execute(code)
print r
assert r == 20
return
def TestExtended():
class Add10(spe.ExtendedInstruction):
isa_module = ppc
def __init__(self, d, value):
self.d = d
self.value = value
spe.ExtendedInstruction.__init__(self)
return
def block(self):
for i in range(10):
ppc.addi(self.d, self.d, self.value)
return
code = InstructionStream()
proc = Processor()
# Using code.add
code.add(ppc.addi(code.gp_return, 0, 0))
code.add(Add10(code.gp_return, 1))
Add10.ex(1).eval(code, reg=code.gp_return)
code.print_code()
r = proc.execute(code)
print r
assert (r == 20)
# Using active code
code.reset()
ppc.set_active_code(code)
ppc.addi(code.gp_return, 0, 0)
Add10(code.gp_return, 1)
Add10.ex(1).eval(ppc.get_active_code(), reg=code.gp_return)
code.print_code()
r = proc.execute(code)
print r
assert (r == 20)
return
def return_var(var):
if isinstance(var.reg, type(var.code.prgm.gp_return)):
var.code.add(ppc.addi(var.code.prgm.gp_return, var, 0))
elif isinstance(var.reg, type(var.code.prgm.fp_return)):
var.code.add(ppc.fmrx(var.code.prgm.fp_return, var))
else:
raise Exception('Return not supported for %s registers' %
(str(type(var.reg))))
return
def _save_registers(self):
"""
Add the parameter loading instructions to the prologue.
"""
synppc.InstructionStream._save_registers(self)
# Rank and Size are the only two parameters to the function. Note
# that the ABI conventions appear to be off by one word. r1
# contains the stack pointer.
# self._prologue.add(ppc.lwz(self.r_rank, 1, 24)) # param 1 should be + 24
# self._prologue.add(ppc.lwz(self.r_size, 1, 28)) # param 2 should be + 28
# Register parameter values
raise Exception('Fix this')
self._prologue.add(ppc.addi(self.r_rank, 3, 0))
self._prologue.add(ppc.addi(self.r_size, 4, 0))
return
def cleanup(self):
# Update the current count
if self.mode == DEC:
# Note: using addic here may cause problems with zip/nested loops...tread with caution!
self.code.add(ppc.addic_(self.r_count, self.r_count, -self.step_size()))
elif self.mode == INC:
self.code.add(ppc.addi(self.r_count, self.r_count, self.step_size()))
return
def TestInt():
code = InstructionStream()
proc = Processor()
code.add(ppc.addi(code.gp_return, 0, 12))
r = proc.execute(code, debug=True)
assert r == 12
print "int result:", r
return
def TestInt():
code = InstructionStream()
proc = Processor()
code.add(ppc.addi(code.gp_return, 0, 12))
r = proc.execute(code, debug=True)
assert (r == 12)
print 'int result:', r
return
def _set_literal_value(self, value):
# Put the lower 16 bits into r-temp
self.code.add(ppc.addi(self.reg, 0, value & 0xFFFF))
# Addis r-temp with the upper 16 bits (shifted add immediate) and
# put the result in r-target
if (value & 0x7FFF) != value:
self.code.add(
ppc.addis(self.reg, self.reg, ((value + 32768) >> 16)))
return
def _load_word(self, array, reg, word):
"""Load an immediate value into a register w/o using load_word(); instead
append the instruction objects to an array.
Used when synthesizing the prologue/epilogue."""
array.append(ppc.addi(reg, 0, word & 0xFFFF, ignore_active=True))
if (word & 0xFFFF) != word:
array.append(
ppc.addis(reg,
reg, ((word + 32768) >> 16) & 0xFFFF,
ignore_active=True))
return
def TestInt():
prgm = Program()
code = prgm.get_stream()
prgm += code
proc = Processor()
code.add(ppc.addi(prgm.gp_return, 0, 12))
r = proc.execute(prgm)
assert (r == 12)
print 'int result:', r
return
def TestInt(): prgm = Program() code = prgm.get_stream() prgm += code proc = Processor() code.add(ppc.addi(prgm.gp_return, 0, 12)) r = proc.execute(prgm) assert(r == 12) print 'int result:', r return
def load_word(code, r_target, word):
"""
Generate the instruction sequence to load a word into r-target.
This can be used for any value greater than 2^16.
"""
# Put the lower 16 bits into r-temp
start = code.add(ppc.addi(r_target, 0, word & 0xFFFF))
# Addis r-temp with the upper 16 bits (shifted add immediate) and
# put the result in r-target
if (word & 0xFFFF) != word:
code.add(ppc.addis(r_target, r_target,
((word + 32768) >> 16) & 0xFFFF))
return start
def _load_word(self, array, reg, word):
"""Load an immediate value into a register w/o using load_word(); instead
append the instruction objects to an array.
Used when synthesizing the prologue/epilogue."""
array.append(ppc.addi(reg, 0, word & 0xFFFF, ignore_active=True))
uw = (word >> 16) & 0xFFFF
msb = word & 0x8000
if msb != 0:
# lower 16-bit MSB is set, upper 16 bits are 1, adjust uw
# If all upper 16 bits are 1, that is the value -1, so add 1 back in.
uw = (uw + 1) & 0xFFFF
if uw != 0:
array.append(ppc.addis(reg, reg, uw, ignore_active=True))
return
def _load_word(self, array, reg, word):
"""Load an immediate value into a register w/o using load_word(); instead
append the instruction objects to an array.
Used when synthesizing the prologue/epilogue."""
array.append(ppc.addi(reg, 0, word & 0xFFFF, ignore_active=True))
uw = (word >> 16) & 0xFFFF
msb = word & 0x8000
if msb != 0:
# lower 16-bit MSB is set, upper 16 bits are 1, adjust uw
# If all upper 16 bits are 1, that is the value -1, so add 1 back in.
uw = (uw + 1) & 0xFFFF
if uw != 0:
array.append(ppc.addis(reg, reg, uw, ignore_active=True))
return
def SimpleTest():
"""
Just make sure things are working...
"""
import corepy.arch.ppc.platform as env
prgm = env.Program()
code = prgm.get_stream()
proc = env.Processor()
prgm.add(code)
# Without active code
a = SignedWord(11, code)
b = SignedWord(31, code, reg = code.prgm.acquire_register())
c = SignedWord(code = code, reg = prgm.gp_return)
byte_mask = Bits(0xFF, code)
code.add(ppc.addi(prgm.gp_return, 0, 31))
# c.v = a + SignedWord.cast(b & byte_mask) + 12
c.v = a + (byte_mask & b) + 12
if True:
r = proc.execute(prgm)
assert(r == (42 + 12))
# With active code
code.reset()
ppc.set_active_code(code)
a = SignedWord(11)
b = SignedWord(31)
c = SignedWord(reg = prgm.gp_return)
byte_mask = Bits(0xFF)
c.v = a + (b & byte_mask)
ppc.set_active_code(None)
r = proc.execute(prgm)
# code.print_code()
assert(r == 42)
return
def load_word(code, r_target, word):
"""
Generate the instruction sequence to load a word into r-target.
This can be used for any value greater than 2^16.
"""
# Put the lower 16 bits into r_target
start = code.add(ppc.addi(r_target, 0, word & 0xFFFF))
uw = (word >> 16) & 0xFFFF
msb = word & 0x8000
if msb != 0:
# lower 16-bit MSB is set, upper 16 bits are 1, adjust uw
# If all upper 16 bits are 1, that is the value -1, so add 1 back in.
uw = (uw + 1) & 0xFFFF
# Only issue addis if the value added (uw) is not zero.
if uw != 0:
code.add(ppc.addis(r_target, r_target, uw))
return start
def load_word(code, r_target, word):
"""
Generate the instruction sequence to load a word into r-target.
This can be used for any value greater than 2^16.
"""
# Put the lower 16 bits into r_target
start = code.add(ppc.addi(r_target, 0, word & 0xFFFF))
uw = (word >> 16) & 0xFFFF
msb = word & 0x8000
if msb != 0:
# lower 16-bit MSB is set, upper 16 bits are 1, adjust uw
# If all upper 16 bits are 1, that is the value -1, so add 1 back in.
uw = (uw + 1) & 0xFFFF
# Only issue addis if the value added (uw) is not zero.
if uw != 0:
code.add(ppc.addis(r_target, r_target, uw))
return start
code = prgm.get_stream()
# proc is a platform-specific execution environemnt
proc = env.Processor()
# Setting the active code allows you call instructions directly
# and automatically add them to the instruction stream.
#
# Add instruction without active code:
# code.add(ppc.addi(...))
#
# Add instruction wit active code:
# ppc.addi(...)
ppc.set_active_code(code)
ppc.addi(prgm.gp_return, 0, 12)
ppc.b(prgm.lbl_epilogue)
prgm.add(code)
prgm.print_code(pro=True, epi=True, binary=True)
r = proc.execute(prgm, debug=True)
print 'int result:', r
assert (r == 12)
code.reset()
a = array.array('d', [3.14])
load_word(code, prgm.gp_return, a.buffer_info()[0])
def copy_register(self, other): return self.code.add(ppc.addi(self, other, 0))
# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. import corepy.arch.ppc.isa as ppc import corepy.arch.vmx.isa as vmx import corepy.arch.ppc.platform as env prgm = env.Program() code = prgm.get_stream() proc = env.Processor() # Generate sub-stream # Multiple eax by 2, add 1 subcode = prgm.get_stream() subcode.add(ppc.mulli(prgm.gp_return, prgm.gp_return, 2)) subcode.add(ppc.addi(prgm.gp_return, prgm.gp_return, 1)) # Initialize a register, insert code code.add(ppc.addi(prgm.gp_return, 0, 5)) code.add(subcode) # Add 3, insert again code.add(ppc.addi(prgm.gp_return, prgm.gp_return, 3)) code.add(subcode) prgm.add(code) prgm.print_code() ret = proc.execute(prgm, mode = 'int') print "ret", ret
# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. import corepy.arch.ppc.isa as ppc import corepy.arch.vmx.isa as vmx import corepy.arch.ppc.platform as env prgm = env.Program() code = prgm.get_stream() proc = env.Processor() # Generate sub-stream # Multiple eax by 2, add 1 subcode = prgm.get_stream() subcode.add(ppc.mulli(prgm.gp_return, prgm.gp_return, 2)) subcode.add(ppc.addi(prgm.gp_return, prgm.gp_return, 1)) # Initialize a register, insert code code.add(ppc.addi(prgm.gp_return, 0, 5)) code.add(subcode) # Add 3, insert again code.add(ppc.addi(prgm.gp_return, prgm.gp_return, 3)) code.add(subcode) prgm.add(code) prgm.print_code() ret = proc.execute(prgm, mode='int') print "ret", ret prgm = env.Program()
code = env.InstructionStream()
# proc is a platform-specific execution environemnt
proc = env.Processor()
# Setting the active code allows you call instructions directly
# and automatically add them to the instruction stream.
#
# Add instruction without active code:
# code.add(ppc.addi(...))
#
# Add instruction wit active code:
# ppc.addi(...)
ppc.set_active_code(code)
ppc.addi(code.gp_return, 0, 12)
ppc.b(code.lbl_epilogue)
code.cache_code()
code.print_code(pro=True, epi=True, binary=True)
r = proc.execute(code, debug=True)
print 'int result:', r
assert (r == 12)
code.reset()
a = array.array('d', [3.14])
load_word(code, code.gp_return, a.buffer_info()[0])
code = prgm.get_stream()
# proc is a platform-specific execution environemnt
proc = env.Processor()
# Setting the active code allows you call instructions directly
# and automatically add them to the instruction stream.
#
# Add instruction without active code:
# code.add(ppc.addi(...))
#
# Add instruction wit active code:
# ppc.addi(...)
ppc.set_active_code(code)
ppc.addi(prgm.gp_return, 0, 12)
ppc.b(prgm.lbl_epilogue)
prgm.add(code)
prgm.print_code(pro=True, epi=True, binary=True)
r = proc.execute(prgm, debug=True)
print 'int result:', r
assert(r == 12)
code.reset()
a = array.array('d', [3.14])
load_word(code, prgm.gp_return, a.buffer_info()[0])
def block(self):
for i in range(10):
ppc.addi(self.d, self.d, self.value)
return
def block(self):
for i in range(10):
ppc.addi(self.d, self.d, self.value)
return
