def init(self):
logging.debug('stm32l486 init')
CortexM.init(self)
self.writeMemory(DBGMCU_CR, DBGMCU_VAL)
self.writeMemory(DBGMCU_APB1_CR1, DBGMCU_APB1_VAL1)
self.writeMemory(DBGMCU_APB1_CR2, DBGMCU_APB1_VAL2)
self.writeMemory(DBGMCU_APB2_CR, DBGMCU_APB2_VAL)
def init(self):
CortexM.init(self, False)
# check for flash security
val = self.transport.readAP(MDM_IDR)
if val != 0x001c0020:
logging.error("KL25Z: bad flash ID")
val = self.transport.readAP(MDM_STATUS)
if (val & (1 << 2)):
logging.warning("KL25Z secure state: will try to unlock")
self.transport.assertReset(True)
while True:
self.transport.writeAP(MDM_CTRL, 1)
val = self.transport.readAP(MDM_STATUS)
logging.info(val)
if (val & 1):
break
while True:
self.transport.writeAP(MDM_CTRL, 0)
val = self.transport.readAP(MDM_CTRL)
if (val == 0):
break
logging.info("KL25Z not in secure state")
self.halt()
self.setupFPB()
def init(self):
CortexM.init(self, False)
# check for flash security
val = self.transport.readAP(MDM_IDR)
if val != 0x001c0020:
logging.error("KL25Z: bad flash ID")
val = self.transport.readAP(MDM_STATUS)
if (val & (1 << 2)):
logging.warning("KL25Z secure state: will try to unlock")
self.transport.assertReset(True)
while True:
self.transport.writeAP(MDM_CTRL, 1)
val = self.transport.readAP(MDM_STATUS)
logging.info(val)
if (val & 1):
break
while True:
self.transport.writeAP(MDM_CTRL, 0)
val = self.transport.readAP(MDM_CTRL)
if (val == 0):
break
logging.info("KL25Z not in secure state")
self.halt()
self.setupFPB()
def init(self):
logging.debug('stm32f051 init')
CortexM.init(self)
enclock = self.readMemory(RCC_APB2ENR_CR)
enclock |= RCC_APB2ENR_DBGMCU
self.writeMemory(RCC_APB2ENR_CR, enclock);
self.writeMemory(DBGMCU_APB1_CR, DBGMCU_APB1_VAL);
self.writeMemory(DBGMCU_APB2_CR, DBGMCU_APB2_VAL);
def init(self):
logging.debug('stm32f051 init')
CortexM.init(self)
enclock = self.readMemory(RCC_APB2ENR_CR)
enclock |= RCC_APB2ENR_DBGMCU
self.writeMemory(RCC_APB2ENR_CR, enclock)
self.writeMemory(DBGMCU_APB1_CR, DBGMCU_APB1_VAL)
self.writeMemory(DBGMCU_APB2_CR, DBGMCU_APB2_VAL)
def init(self):
CortexM.init(self, False, False)
# check for flash security
val = self.transport.readAP(MDM_IDR)
if val != self.mdm_idr:
logging.error("%s: bad MDM-AP IDR (is 0x%08x, expected 0x%08x)", self.part_number, val, self.mdm_idr)
if self.isLocked():
logging.warning("%s in secure state: will try to unlock via mass erase", self.part_number)
# keep the target in reset until is had been erased and halted
self.transport.assertReset(True)
if not self.massErase():
self.transport.assertReset(False)
logging.error("%s: mass erase failed", self.part_number)
raise Exception("unable to unlock device")
# Use the MDM to keep the target halted after reset has been released
self.transport.writeAP(MDM_CTRL, MDM_CTRL_DEBUG_REQUEST)
# Enable debug
self.writeMemory(DHCSR, DBGKEY | C_DEBUGEN)
self.transport.assertReset(False)
while self.transport.readAP(MDM_STATUS) & MDM_STATUS_CORE_HALTED != MDM_STATUS_CORE_HALTED:
logging.debug("Waiting for mdm halt (erase)")
sleep(0.01)
# release MDM halt once it has taken effect in the DHCSR
self.transport.writeAP(MDM_CTRL, 0)
else:
logging.info("%s not in secure state", self.part_number)
# Prevent the target from resetting if it has invalid code
self.transport.writeAP(MDM_CTRL, MDM_CTRL_DEBUG_REQUEST | MDM_CTRL_CORE_HOLD_RESET)
while self.transport.readAP(MDM_CTRL) & (MDM_CTRL_DEBUG_REQUEST | MDM_CTRL_CORE_HOLD_RESET) != (MDM_CTRL_DEBUG_REQUEST | MDM_CTRL_CORE_HOLD_RESET):
self.transport.writeAP(MDM_CTRL, MDM_CTRL_DEBUG_REQUEST | MDM_CTRL_CORE_HOLD_RESET)
# Enable debug
self.writeMemory(DHCSR, DBGKEY | C_DEBUGEN)
# Disable holding the core in reset, leave MDM halt on
self.transport.writeAP(MDM_CTRL, MDM_CTRL_DEBUG_REQUEST)
# Wait until the target is halted
while self.transport.readAP(MDM_STATUS) & MDM_STATUS_CORE_HALTED != MDM_STATUS_CORE_HALTED:
logging.debug("Waiting for mdm halt")
sleep(0.01)
# release MDM halt once it has taken effect in the DHCSR
self.transport.writeAP(MDM_CTRL, 0)
# sanity check that the target is still halted
if self.getState() == TARGET_RUNNING:
raise Exception("Target failed to stay halted during init sequence")
self.setupFPB()
self.setupDWT()
self.readCoreType()
self.checkForFPU()
def init(self):
CortexM.init(self, False)
# check for flash security
val = self.transport.readAP(MDM_IDR)
if val != self.mdm_idr:
logging.error("%s: bad MDM-AP IDR (is 0x%08x, expected 0x%08x)", self.part_number, val, self.mdm_idr)
self.checkSecurity()
self.halt()
self.setupFPB()
self.readCoreType()
self.checkForFPU()
def init(self):
CortexM.init(self, False)
# check for flash security
val = self.transport.readAP(MDM_IDR)
if val != self.mdm_idr:
logging.error("%s: bad MDM-AP IDR (is 0x%08x, expected 0x%08x)",
self.part_number, val, self.mdm_idr)
self.checkSecurity()
self.halt()
self.setupFPB()
self.readCoreType()
self.checkForFPU()
def init(self):
logging.debug('stm32f103rc init')
CortexM.init(self)
self.writeMemory(DBGMCU_CR, DBGMCU_VAL);
def init(self):
CortexM.init(self, False, False)
# check for flash security
val = self.transport.readAP(MDM_IDR)
if val != self.mdm_idr:
logging.error("%s: bad MDM-AP IDR (is 0x%08x, expected 0x%08x)",
self.part_number, val, self.mdm_idr)
if self.isLocked():
logging.warning(
"%s in secure state: will try to unlock via mass erase",
self.part_number)
# keep the target in reset until is had been erased and halted
self.transport.assertReset(True)
if not self.massErase():
self.transport.assertReset(False)
logging.error("%s: mass erase failed", self.part_number)
raise Exception("unable to unlock device")
# Use the MDM to keep the target halted after reset has been released
self.transport.writeAP(MDM_CTRL, MDM_CTRL_DEBUG_REQUEST)
# Enable debug
self.writeMemory(DHCSR, DBGKEY | C_DEBUGEN)
self.transport.assertReset(False)
while self.transport.readAP(
MDM_STATUS
) & MDM_STATUS_CORE_HALTED != MDM_STATUS_CORE_HALTED:
logging.debug("Waiting for mdm halt (erase)")
sleep(0.01)
# release MDM halt once it has taken effect in the DHCSR
self.transport.writeAP(MDM_CTRL, 0)
else:
logging.info("%s not in secure state", self.part_number)
# Prevent the target from resetting if it has invalid code
self.transport.writeAP(
MDM_CTRL, MDM_CTRL_DEBUG_REQUEST | MDM_CTRL_CORE_HOLD_RESET)
while self.transport.readAP(MDM_CTRL) & (
MDM_CTRL_DEBUG_REQUEST | MDM_CTRL_CORE_HOLD_RESET) != (
MDM_CTRL_DEBUG_REQUEST | MDM_CTRL_CORE_HOLD_RESET):
self.transport.writeAP(
MDM_CTRL, MDM_CTRL_DEBUG_REQUEST | MDM_CTRL_CORE_HOLD_RESET)
# Enable debug
self.writeMemory(DHCSR, DBGKEY | C_DEBUGEN)
# Disable holding the core in reset, leave MDM halt on
self.transport.writeAP(MDM_CTRL, MDM_CTRL_DEBUG_REQUEST)
# Wait until the target is halted
while self.transport.readAP(
MDM_STATUS) & MDM_STATUS_CORE_HALTED != MDM_STATUS_CORE_HALTED:
logging.debug("Waiting for mdm halt")
sleep(0.01)
# release MDM halt once it has taken effect in the DHCSR
self.transport.writeAP(MDM_CTRL, 0)
# sanity check that the target is still halted
if self.getState() == TARGET_RUNNING:
raise Exception(
"Target failed to stay halted during init sequence")
self.setupFPB()
self.setupDWT()
self.readCoreType()
self.checkForFPU()
def init(self):
logging.debug('stm32f405 init')
CortexM.init(self)
self.writeMemory(DBGMCU_CR, DBGMCU_VAL)
self.writeMemory(DBGMCU_APB1_CR, DBGMCU_APB1_VAL)
self.writeMemory(DBGMCU_APB2_CR, DBGMCU_APB2_VAL)
def init(self):
logging.debug('stm32f103rc init')
CortexM.init(self)
self.writeMemory(DBGMCU_CR, DBGMCU_VAL);
def init(self):
logging.debug('stm32f301K8 init')
CortexM.init(self)
self.writeMemory(DBGMCU_CR, DBGMCU_VAL)
self.writeMemory(DBGMCU_APB1_CR, DBGMCU_APB1_VAL)
self.writeMemory(DBGMCU_APB2_CR, DBGMCU_APB2_VAL)
def init(self):
CortexM.init(self, initial_setup=True, bus_accessible=False)
# check MDM-AP ID
val = self.transport.readAP(MDM_IDR)
if val != self.mdm_idr:
logging.error("%s: bad MDM-AP IDR (is 0x%08x, expected 0x%08x)",
self.part_number, val, self.mdm_idr)
# check for flash security
isLocked = self.isLocked()
if isLocked:
if self.do_auto_unlock:
logging.warning(
"%s in secure state: will try to unlock via mass erase",
self.part_number)
# keep the target in reset until is had been erased and halted
self.transport.assertReset(True)
if not self.massErase():
self.transport.assertReset(False)
logging.error("%s: mass erase failed", self.part_number)
raise Exception("unable to unlock device")
# Use the MDM to keep the target halted after reset has been released
self.transport.writeAP(MDM_CTRL, MDM_CTRL_DEBUG_REQUEST)
# Enable debug
self.writeMemory(CortexM.DHCSR,
CortexM.DBGKEY | CortexM.C_DEBUGEN)
self.transport.assertReset(False)
while self.transport.readAP(
MDM_STATUS
) & MDM_STATUS_CORE_HALTED != MDM_STATUS_CORE_HALTED:
logging.debug("Waiting for mdm halt (erase)")
sleep(0.01)
# release MDM halt once it has taken effect in the DHCSR
self.transport.writeAP(MDM_CTRL, 0)
isLocked = False
else:
logging.warning(
"%s in secure state: not automatically unlocking",
self.part_number)
else:
logging.info("%s not in secure state", self.part_number)
# Can't do anything more if the target is secure
if isLocked:
return
if self.halt_on_connect:
# Prevent the target from resetting if it has invalid code
self.transport.writeAP(
MDM_CTRL, MDM_CTRL_DEBUG_REQUEST | MDM_CTRL_CORE_HOLD_RESET)
while self.transport.readAP(MDM_CTRL) & (
MDM_CTRL_DEBUG_REQUEST | MDM_CTRL_CORE_HOLD_RESET) != (
MDM_CTRL_DEBUG_REQUEST | MDM_CTRL_CORE_HOLD_RESET):
self.transport.writeAP(
MDM_CTRL,
MDM_CTRL_DEBUG_REQUEST | MDM_CTRL_CORE_HOLD_RESET)
# Enable debug
self.writeMemory(CortexM.DHCSR, CortexM.DBGKEY | CortexM.C_DEBUGEN)
# Disable holding the core in reset, leave MDM halt on
self.transport.writeAP(MDM_CTRL, MDM_CTRL_DEBUG_REQUEST)
# Wait until the target is halted
while self.transport.readAP(
MDM_STATUS
) & MDM_STATUS_CORE_HALTED != MDM_STATUS_CORE_HALTED:
logging.debug("Waiting for mdm halt")
sleep(0.01)
# release MDM halt once it has taken effect in the DHCSR
self.transport.writeAP(MDM_CTRL, 0)
# sanity check that the target is still halted
if self.getState() == Target.TARGET_RUNNING:
raise Exception(
"Target failed to stay halted during init sequence")
CortexM.init(self, initial_setup=False, bus_accessible=True)
def init(self):
CortexM.init(self, initial_setup=True, bus_accessible=False)
# check MDM-AP ID
val = self.dap.readAP(MDM_IDR)
if val != self.mdm_idr:
logging.error("%s: bad MDM-AP IDR (is 0x%08x, expected 0x%08x)", self.part_number, val, self.mdm_idr)
# check for flash security
isLocked = self.isLocked()
if isLocked:
if self.do_auto_unlock:
logging.warning("%s in secure state: will try to unlock via mass erase", self.part_number)
# keep the target in reset until is had been erased and halted
self.link.assert_reset(True)
if not self.massErase():
self.link.assert_reset(False)
logging.error("%s: mass erase failed", self.part_number)
raise Exception("unable to unlock device")
# Use the MDM to keep the target halted after reset has been released
self.dap.writeAP(MDM_CTRL, MDM_CTRL_DEBUG_REQUEST)
# Enable debug
self.writeMemory(CortexM.DHCSR, CortexM.DBGKEY | CortexM.C_DEBUGEN)
self.link.assert_reset(False)
while self.dap.readAP(MDM_STATUS) & MDM_STATUS_CORE_HALTED != MDM_STATUS_CORE_HALTED:
logging.debug("Waiting for mdm halt (erase)")
sleep(0.01)
# release MDM halt once it has taken effect in the DHCSR
self.dap.writeAP(MDM_CTRL, 0)
isLocked = False
else:
logging.warning("%s in secure state: not automatically unlocking", self.part_number)
else:
logging.info("%s not in secure state", self.part_number)
# Can't do anything more if the target is secure
if isLocked:
return
if self.halt_on_connect:
# Prevent the target from resetting if it has invalid code
self.dap.writeAP(MDM_CTRL, MDM_CTRL_DEBUG_REQUEST | MDM_CTRL_CORE_HOLD_RESET)
while self.dap.readAP(MDM_CTRL) & (MDM_CTRL_DEBUG_REQUEST | MDM_CTRL_CORE_HOLD_RESET) != (MDM_CTRL_DEBUG_REQUEST | MDM_CTRL_CORE_HOLD_RESET):
self.dap.writeAP(MDM_CTRL, MDM_CTRL_DEBUG_REQUEST | MDM_CTRL_CORE_HOLD_RESET)
# Enable debug
self.writeMemory(CortexM.DHCSR, CortexM.DBGKEY | CortexM.C_DEBUGEN)
# Disable holding the core in reset, leave MDM halt on
self.dap.writeAP(MDM_CTRL, MDM_CTRL_DEBUG_REQUEST)
# Wait until the target is halted
while self.dap.readAP(MDM_STATUS) & MDM_STATUS_CORE_HALTED != MDM_STATUS_CORE_HALTED:
logging.debug("Waiting for mdm halt")
sleep(0.01)
# release MDM halt once it has taken effect in the DHCSR
self.dap.writeAP(MDM_CTRL, 0)
# sanity check that the target is still halted
if self.getState() == Target.TARGET_RUNNING:
raise Exception("Target failed to stay halted during init sequence")
CortexM.init(self, initial_setup=False, bus_accessible=True)
