def extend_ts(ts, modifier):
affect_init = False
if ts.ftrans is None:
return (ts, [])
new_ftrans = {}
vars = []
for (assign, cond_assign_list) in ts.ftrans.items():
fv = get_free_variables(assign)
assert len(fv) == 1
var = fv.pop()
is_next = TS.has_next(var)
refvar = TS.get_ref_var(var)
nomvar = Symbol(NOMIN % refvar.symbol_name(), var.symbol_type())
fvar = Symbol(FAULT % refvar.symbol_name(), BOOL)
vars.append(nomvar)
vars.append(fvar)
repldic = dict([(refvar.symbol_name(), nomvar.symbol_name()), \
(TS.get_prime(refvar).symbol_name(), TS.get_prime(nomvar).symbol_name())])
# Remapping nominal behavior to new variable
new_ftrans[substitute(assign,
repldic)] = [(substitute(c[0], repldic),
substitute(c[1], repldic))
for c in cond_assign_list]
# Definition of the nominal behavior
new_ftrans[refvar] = [(Not(fvar), nomvar)]
# Application of the faulty behavior
new_ftrans[refvar].append(
(fvar, modifier.get_behavior(nomvar, refvar)))
ts.trans = And(ts.trans, Implies(fvar, TS.get_prime(fvar)))
if affect_init:
ts.init = substitute(ts.init, repldic)
else:
ts.init = And(ts.init, Not(fvar))
# add the vars to the transition system
for var in vars:
ts.add_var(var)
ts.ftrans = new_ftrans
return (ts, vars)
def MemAcc(self, left, right):
primed = False
if TS.is_prime(left):
primed = True
left = TS.get_ref_var(left)
timed_symbol = lambda v: v if not primed else TS.get_prime(v)
memname = left.symbol_name()
allsymbols = list(get_env().formula_manager.get_all_symbols())
memsymbols = [(v.symbol_name(), timed_symbol(v)) for v in allsymbols \
if (not TS.is_prime(v)) and (not TS.is_timed(v)) and (v.symbol_name()[:len(memname)] == memname) \
and v.symbol_name() != memname]
memsymbols.sort()
memsize = len(memsymbols)
if memsize < 1:
Logger.error("Memory \"%s\" has size 1"%(memname))
if right.is_int_constant():
location = right.constant_value()
if location > memsize-1:
Logger.error("Out of bound access for memory \"%s\", size %d"%(memname, memsize))
return memsymbols[location][1]
else:
if not (right.is_symbol() and right.symbol_type().is_bv_type()):
Logger.error("Symbolic memory access requires Bitvector indexing")
width_idx = right.symbol_type().width
width_mem = min(memsize, width_idx)
return mem_access(right, [m[1] for m in memsymbols], width_idx)
def compile_sts(self, name, params):
ts = TS()
parsize = params[0]
size = None
if type(parsize) == str:
sparser = StringParser()
parsize = sparser.parse_formula(parsize)
if parsize.is_constant():
size = parsize.constant_value()
if get_type(parsize).is_bv_type():
size = get_type(parsize).width
if size is None:
Logger.error("Undefined size for symbol \"%s\"" % (params[0]))
value = Symbol("%s.value" % name, BVType(size))
ts.add_var(value)
ts.trans = EqualsOrIff(value, TS.get_prime(value))
return ts
def parse_string(self, strinput):
hts = HTS()
ts = TS()
nodemap = {}
node_covered = set([])
# list of tuples of var and cond_assign_list
# cond_assign_list is tuples of (condition, value)
# where everything is a pysmt FNode
# for btor, the condition is always True
ftrans = []
initlist = []
invarlist = []
invar_props = []
ltl_props = []
prop_count = 0
# clean string input, remove special characters from names
for sc, rep in special_char_replacements.items():
strinput = strinput.replace(sc, rep)
def getnode(nid):
node_covered.add(nid)
if int(nid) < 0:
return Ite(BV2B(nodemap[str(-int(nid))]), BV(0,1), BV(1,1))
return nodemap[nid]
def binary_op(bvop, bop, left, right):
if (get_type(left) == BOOL) and (get_type(right) == BOOL):
return bop(left, right)
return bvop(B2BV(left), B2BV(right))
def unary_op(bvop, bop, left):
if (get_type(left) == BOOL):
return bop(left)
return bvop(left)
for line in strinput.split(NL):
linetok = line.split()
if len(linetok) == 0:
continue
if linetok[0] == COM:
continue
(nid, ntype, *nids) = linetok
if ntype == SORT:
(stype, *attr) = nids
if stype == BITVEC:
nodemap[nid] = BVType(int(attr[0]))
node_covered.add(nid)
if stype == ARRAY:
nodemap[nid] = ArrayType(getnode(attr[0]), getnode(attr[1]))
node_covered.add(nid)
if ntype == WRITE:
nodemap[nid] = Store(*[getnode(n) for n in nids[1:4]])
if ntype == READ:
nodemap[nid] = Select(getnode(nids[1]), getnode(nids[2]))
if ntype == ZERO:
nodemap[nid] = BV(0, getnode(nids[0]).width)
if ntype == ONE:
nodemap[nid] = BV(1, getnode(nids[0]).width)
if ntype == ONES:
width = getnode(nids[0]).width
nodemap[nid] = BV((2**width)-1, width)
if ntype == REDOR:
width = get_type(getnode(nids[1])).width
zeros = BV(0, width)
nodemap[nid] = BVNot(BVComp(getnode(nids[1]), zeros))
if ntype == REDXOR:
width = get_type(getnode(nids[1])).width
nodemap[nid] = BV(0, width)
zeros = BV(0, width)
for yx_i in range(width):
tmp = BV(1 << yx_i, width)
tmp_2 = BVAnd(tmp, B2BV(getnode(nids[1])))
tmp_3 = BVZExt(B2BV(BVComp(tmp_2, zeros)), int(width - 1))
nodemap[nid] = BVAdd(tmp_3, nodemap[nid])
nodemap[nid] = BVComp(BVAnd(BV(1, width), nodemap[nid]), BV(1, width))
if ntype == REDAND:
width = get_type(getnode(nids[1])).width
ones = BV((2**width)-1, width)
nodemap[nid] = BVComp(getnode(nids[1]), ones)
if ntype == CONSTD:
width = getnode(nids[0]).width
nodemap[nid] = BV(int(nids[1]), width)
if ntype == CONST:
width = getnode(nids[0]).width
nodemap[nid] = BV(bin_to_dec(nids[1]), width)
if ntype == STATE:
if len(nids) > 1:
nodemap[nid] = Symbol(nids[1], getnode(nids[0]))
else:
nodemap[nid] = Symbol((SN%nid), getnode(nids[0]))
ts.add_state_var(nodemap[nid])
if ntype == INPUT:
if len(nids) > 1:
nodemap[nid] = Symbol(nids[1], getnode(nids[0]))
else:
nodemap[nid] = Symbol((SN%nid), getnode(nids[0]))
ts.add_input_var(nodemap[nid])
if ntype == OUTPUT:
# unfortunately we need to create an extra symbol just to have the output name
# we could be smarter about this, but then this parser can't be greedy
original_symbol = getnode(nids[0])
output_symbol = Symbol(nids[1], original_symbol.get_type())
nodemap[nid] = EqualsOrIff(output_symbol, original_symbol)
invarlist.append(nodemap[nid])
node_covered.add(nid)
ts.add_output_var(output_symbol)
if ntype == AND:
nodemap[nid] = binary_op(BVAnd, And, getnode(nids[1]), getnode(nids[2]))
if ntype == CONCAT:
nodemap[nid] = BVConcat(B2BV(getnode(nids[1])), B2BV(getnode(nids[2])))
if ntype == XOR:
nodemap[nid] = binary_op(BVXor, Xor, getnode(nids[1]), getnode(nids[2]))
if ntype == XNOR:
nodemap[nid] = BVNot(binary_op(BVXor, Xor, getnode(nids[1]), getnode(nids[2])))
if ntype == NAND:
bvop = lambda x,y: BVNot(BVAnd(x, y))
bop = lambda x,y: Not(And(x, y))
nodemap[nid] = binary_op(bvop, bop, getnode(nids[1]), getnode(nids[2]))
if ntype == IMPLIES:
nodemap[nid] = BVOr(BVNot(getnode(nids[1])), getnode(nids[2]))
if ntype == NOT:
nodemap[nid] = unary_op(BVNot, Not, getnode(nids[1]))
if ntype == NEG:
nodemap[nid] = unary_op(BVNeg, Not, getnode(nids[1]))
if ntype == UEXT:
nodemap[nid] = BVZExt(B2BV(getnode(nids[1])), int(nids[2]))
if ntype == SEXT:
nodemap[nid] = BVSExt(B2BV(getnode(nids[1])), int(nids[2]))
if ntype == OR:
nodemap[nid] = binary_op(BVOr, Or, getnode(nids[1]), getnode(nids[2]))
if ntype == ADD:
nodemap[nid] = BVAdd(B2BV(getnode(nids[1])), B2BV(getnode(nids[2])))
if ntype == SUB:
nodemap[nid] = BVSub(B2BV(getnode(nids[1])), B2BV(getnode(nids[2])))
if ntype == UGT:
nodemap[nid] = BVUGT(B2BV(getnode(nids[1])), B2BV(getnode(nids[2])))
if ntype == UGTE:
nodemap[nid] = BVUGE(B2BV(getnode(nids[1])), B2BV(getnode(nids[2])))
if ntype == ULT:
nodemap[nid] = BVULT(B2BV(getnode(nids[1])), B2BV(getnode(nids[2])))
if ntype == ULTE:
nodemap[nid] = BVULE(B2BV(getnode(nids[1])), B2BV(getnode(nids[2])))
if ntype == SGT:
nodemap[nid] = BVSGT(B2BV(getnode(nids[1])), B2BV(getnode(nids[2])))
if ntype == SGTE:
nodemap[nid] = BVSGE(B2BV(getnode(nids[1])), B2BV(getnode(nids[2])))
if ntype == SLT:
nodemap[nid] = BVSLT(B2BV(getnode(nids[1])), B2BV(getnode(nids[2])))
if ntype == SLTE:
nodemap[nid] = BVSLE(B2BV(getnode(nids[1])), B2BV(getnode(nids[2])))
if ntype == EQ:
nodemap[nid] = BVComp(B2BV(getnode(nids[1])), B2BV(getnode(nids[2])))
if ntype == NEQ:
nodemap[nid] = BVNot(BVComp(getnode(nids[1]), getnode(nids[2])))
if ntype == MUL:
nodemap[nid] = BVMul(B2BV(getnode(nids[1])), B2BV(getnode(nids[2])))
if ntype == SLICE:
nodemap[nid] = BVExtract(B2BV(getnode(nids[1])), int(nids[3]), int(nids[2]))
if ntype == SLL:
nodemap[nid] = BVLShl(getnode(nids[1]), getnode(nids[2]))
if ntype == SRA:
nodemap[nid] = BVAShr(getnode(nids[1]), getnode(nids[2]))
if ntype == SRL:
nodemap[nid] = BVLShr(getnode(nids[1]), getnode(nids[2]))
if ntype == ITE:
if (get_type(getnode(nids[2])) == BOOL) or (get_type(getnode(nids[3])) == BOOL):
nodemap[nid] = Ite(BV2B(getnode(nids[1])), B2BV(getnode(nids[2])), B2BV(getnode(nids[3])))
else:
nodemap[nid] = Ite(BV2B(getnode(nids[1])), getnode(nids[2]), getnode(nids[3]))
if ntype == NEXT:
if (get_type(getnode(nids[1])) == BOOL) or (get_type(getnode(nids[2])) == BOOL):
lval = TS.get_prime(getnode(nids[1]))
rval = BV2B(getnode(nids[2]))
else:
lval = TS.get_prime(getnode(nids[1]))
rval = getnode(nids[2])
nodemap[nid] = EqualsOrIff(lval, rval)
ftrans.append(
(lval,
[(TRUE(), rval)])
)
if ntype == INIT:
if (get_type(getnode(nids[1])) == BOOL) or (get_type(getnode(nids[2])) == BOOL):
nodemap[nid] = EqualsOrIff(BV2B(getnode(nids[1])), BV2B(getnode(nids[2])))
else:
nodemap[nid] = EqualsOrIff(getnode(nids[1]), getnode(nids[2]))
initlist.append(getnode(nid))
if ntype == CONSTRAINT:
nodemap[nid] = BV2B(getnode(nids[0]))
invarlist.append(getnode(nid))
if ntype == BAD:
nodemap[nid] = getnode(nids[0])
if ASSERTINFO in line:
filename_lineno = os.path.basename(nids[3])
assert_name = 'embedded_assertion_%s'%filename_lineno
description = "Embedded assertion at line {1} in {0}".format(*filename_lineno.split(COLON_REP))
else:
assert_name = 'embedded_assertion_%i'%prop_count
description = 'Embedded assertion number %i'%prop_count
prop_count += 1
# Following problem format (name, description, strformula)
invar_props.append((assert_name, description, Not(BV2B(getnode(nid)))))
if nid not in nodemap:
Logger.error("Unknown node type \"%s\""%ntype)
# get wirename if it exists
if ntype not in {STATE, INPUT, OUTPUT, BAD}:
# check for wirename, if it's an integer, then it's a node ref
try:
a = int(nids[-1])
except:
try:
wire = Symbol(str(nids[-1]), getnode(nids[0]))
invarlist.append(EqualsOrIff(wire, B2BV(nodemap[nid])))
ts.add_var(wire)
except:
pass
if Logger.level(1):
name = lambda x: str(nodemap[x]) if nodemap[x].is_symbol() else x
uncovered = [name(x) for x in nodemap if x not in node_covered]
uncovered.sort()
if len(uncovered) > 0:
Logger.warning("Unlinked nodes \"%s\""%",".join(uncovered))
if not self.symbolic_init:
init = simplify(And(initlist))
else:
init = TRUE()
invar = simplify(And(invarlist))
# instead of trans, we're using the ftrans format -- see below
ts.set_behavior(init, TRUE(), invar)
# add ftrans
for var, cond_assign_list in ftrans:
ts.add_func_trans(var, cond_assign_list)
hts.add_ts(ts)
return (hts, invar_props, ltl_props)
def parse_string(self, strinput):
hts = HTS()
ts = TS()
nodemap = {}
node_covered = set([])
# list of tuples of var and cond_assign_list
# cond_assign_list is tuples of (condition, value)
# where everything is a pysmt FNode
# for btor, the condition is always True
ftrans = []
initlist = []
invarlist = []
invar_props = []
ltl_props = []
prop_count = 0
# clean string input, remove special characters from names
for sc, rep in special_char_replacements.items():
strinput = strinput.replace(sc, rep)
def getnode(nid):
node_covered.add(nid)
if int(nid) < 0:
return Ite(BV2B(nodemap[str(-int(nid))]), BV(0, 1), BV(1, 1))
return nodemap[nid]
def binary_op(bvop, bop, left, right):
if (get_type(left) == BOOL) and (get_type(right) == BOOL):
return bop(left, right)
return bvop(B2BV(left), B2BV(right))
def unary_op(bvop, bop, left):
if (get_type(left) == BOOL):
return bop(left)
return bvop(left)
for line in strinput.split(NL):
linetok = line.split()
if len(linetok) == 0:
continue
if linetok[0] == COM:
continue
(nid, ntype, *nids) = linetok
if ntype == SORT:
(stype, *attr) = nids
if stype == BITVEC:
nodemap[nid] = BVType(int(attr[0]))
node_covered.add(nid)
if stype == ARRAY:
nodemap[nid] = ArrayType(getnode(attr[0]),
getnode(attr[1]))
node_covered.add(nid)
if ntype == WRITE:
nodemap[nid] = Store(*[getnode(n) for n in nids[1:4]])
if ntype == READ:
nodemap[nid] = Select(getnode(nids[1]), getnode(nids[2]))
if ntype == ZERO:
nodemap[nid] = BV(0, getnode(nids[0]).width)
if ntype == ONE:
nodemap[nid] = BV(1, getnode(nids[0]).width)
if ntype == ONES:
width = getnode(nids[0]).width
nodemap[nid] = BV((2**width) - 1, width)
if ntype == REDOR:
width = get_type(getnode(nids[1])).width
zeros = BV(0, width)
nodemap[nid] = BVNot(BVComp(getnode(nids[1]), zeros))
if ntype == REDAND:
width = get_type(getnode(nids[1])).width
ones = BV((2**width) - 1, width)
nodemap[nid] = BVComp(getnode(nids[1]), ones)
if ntype == CONSTD:
width = getnode(nids[0]).width
nodemap[nid] = BV(int(nids[1]), width)
if ntype == CONST:
width = getnode(nids[0]).width
try:
nodemap[nid] = BV(bin_to_dec(nids[1]), width)
except ValueError:
if not all([i == 'x' or i == 'z' for i in nids[1]]):
raise RuntimeError(
"If not a valid number, only support "
"all don't cares or high-impedance but got {}".
format(nids[1]))
# create a fresh variable for this non-deterministic constant
nodemap[nid] = Symbol('const_' + nids[1], BVType(width))
ts.add_state_var(nodemap[nid])
Logger.warning(
"Creating a fresh symbol for unsupported X/Z constant %s"
% nids[1])
if ntype == STATE:
if len(nids) > 1:
nodemap[nid] = Symbol(nids[1], getnode(nids[0]))
else:
nodemap[nid] = Symbol((SN % nid), getnode(nids[0]))
ts.add_state_var(nodemap[nid])
if ntype == INPUT:
if len(nids) > 1:
nodemap[nid] = Symbol(nids[1], getnode(nids[0]))
else:
nodemap[nid] = Symbol((SN % nid), getnode(nids[0]))
ts.add_input_var(nodemap[nid])
if ntype == OUTPUT:
# unfortunately we need to create an extra symbol just to have the output name
# we could be smarter about this, but then this parser can't be greedy
original_symbol = B2BV(getnode(nids[0]))
output_symbol = Symbol(nids[1], original_symbol.get_type())
nodemap[nid] = EqualsOrIff(output_symbol, original_symbol)
invarlist.append(nodemap[nid])
node_covered.add(nid)
ts.add_output_var(output_symbol)
if ntype == AND:
nodemap[nid] = binary_op(BVAnd, And, getnode(nids[1]),
getnode(nids[2]))
if ntype == CONCAT:
nodemap[nid] = BVConcat(B2BV(getnode(nids[1])),
B2BV(getnode(nids[2])))
if ntype == XOR:
nodemap[nid] = binary_op(BVXor, Xor, getnode(nids[1]),
getnode(nids[2]))
if ntype == XNOR:
nodemap[nid] = BVNot(
binary_op(BVXor, Xor, getnode(nids[1]), getnode(nids[2])))
if ntype == NAND:
bvop = lambda x, y: BVNot(BVAnd(x, y))
bop = lambda x, y: Not(And(x, y))
nodemap[nid] = binary_op(bvop, bop, getnode(nids[1]),
getnode(nids[2]))
if ntype == IMPLIES:
nodemap[nid] = BVOr(BVNot(getnode(nids[1])), getnode(nids[2]))
if ntype == NOT:
nodemap[nid] = unary_op(BVNot, Not, getnode(nids[1]))
if ntype == NEG:
nodemap[nid] = unary_op(BVNeg, Not, getnode(nids[1]))
if ntype == UEXT:
nodemap[nid] = BVZExt(B2BV(getnode(nids[1])), int(nids[2]))
if ntype == SEXT:
nodemap[nid] = BVSExt(B2BV(getnode(nids[1])), int(nids[2]))
if ntype == OR:
nodemap[nid] = binary_op(BVOr, Or, getnode(nids[1]),
getnode(nids[2]))
if ntype == ADD:
nodemap[nid] = BVAdd(B2BV(getnode(nids[1])),
B2BV(getnode(nids[2])))
if ntype == SUB:
nodemap[nid] = BVSub(B2BV(getnode(nids[1])),
B2BV(getnode(nids[2])))
if ntype == UGT:
nodemap[nid] = BVUGT(B2BV(getnode(nids[1])),
B2BV(getnode(nids[2])))
if ntype == UGTE:
nodemap[nid] = BVUGE(B2BV(getnode(nids[1])),
B2BV(getnode(nids[2])))
if ntype == ULT:
nodemap[nid] = BVULT(B2BV(getnode(nids[1])),
B2BV(getnode(nids[2])))
if ntype == ULTE:
nodemap[nid] = BVULE(B2BV(getnode(nids[1])),
B2BV(getnode(nids[2])))
if ntype == SGT:
nodemap[nid] = BVSGT(B2BV(getnode(nids[1])),
B2BV(getnode(nids[2])))
if ntype == SGTE:
nodemap[nid] = BVSGE(B2BV(getnode(nids[1])),
B2BV(getnode(nids[2])))
if ntype == SLT:
nodemap[nid] = BVSLT(B2BV(getnode(nids[1])),
B2BV(getnode(nids[2])))
if ntype == SLTE:
nodemap[nid] = BVSLE(B2BV(getnode(nids[1])),
B2BV(getnode(nids[2])))
if ntype == EQ:
nodemap[nid] = BVComp(B2BV(getnode(nids[1])),
B2BV(getnode(nids[2])))
if ntype == NEQ:
nodemap[nid] = BVNot(BVComp(getnode(nids[1]),
getnode(nids[2])))
if ntype == MUL:
nodemap[nid] = BVMul(B2BV(getnode(nids[1])),
B2BV(getnode(nids[2])))
if ntype == SLICE:
nodemap[nid] = BVExtract(B2BV(getnode(nids[1])), int(nids[3]),
int(nids[2]))
if ntype == SLL:
nodemap[nid] = BVLShl(getnode(nids[1]), getnode(nids[2]))
if ntype == SRA:
nodemap[nid] = BVAShr(getnode(nids[1]), getnode(nids[2]))
if ntype == SRL:
nodemap[nid] = BVLShr(getnode(nids[1]), getnode(nids[2]))
if ntype == ITE:
if (get_type(getnode(nids[2])) == BOOL) or (get_type(
getnode(nids[3])) == BOOL):
nodemap[nid] = Ite(BV2B(getnode(nids[1])),
B2BV(getnode(nids[2])),
B2BV(getnode(nids[3])))
else:
nodemap[nid] = Ite(BV2B(getnode(nids[1])),
getnode(nids[2]), getnode(nids[3]))
if ntype == NEXT:
if (get_type(getnode(nids[1])) == BOOL) or (get_type(
getnode(nids[2])) == BOOL):
lval = TS.get_prime(getnode(nids[1]))
rval = B2BV(getnode(nids[2]))
else:
lval = TS.get_prime(getnode(nids[1]))
rval = getnode(nids[2])
nodemap[nid] = EqualsOrIff(lval, rval)
ftrans.append((lval, [(TRUE(), rval)]))
if ntype == INIT:
if (get_type(getnode(nids[1])) == BOOL) or (get_type(
getnode(nids[2])) == BOOL):
nodemap[nid] = EqualsOrIff(BV2B(getnode(nids[1])),
BV2B(getnode(nids[2])))
elif get_type(getnode(nids[1])).is_array_type():
_type = get_type(getnode(nids[1]))
nodemap[nid] = EqualsOrIff(
getnode(nids[1]),
Array(_type.index_type, default=getnode(nids[2])))
else:
nodemap[nid] = EqualsOrIff(getnode(nids[1]),
getnode(nids[2]))
initlist.append(getnode(nid))
if ntype == CONSTRAINT:
nodemap[nid] = BV2B(getnode(nids[0]))
invarlist.append(getnode(nid))
if ntype == BAD:
nodemap[nid] = getnode(nids[0])
if len(nids) > 1:
assert_name = nids[1]
description = "Embedded assertion: {}".format(assert_name)
else:
assert_name = 'embedded_assertion_%i' % prop_count
description = 'Embedded assertion number %i' % prop_count
prop_count += 1
# Following problem format (name, description, strformula)
invar_props.append(
(assert_name, description, Not(BV2B(getnode(nid)))))
if nid not in nodemap:
Logger.error("Unknown node type \"%s\"" % ntype)
# get wirename if it exists
if ntype not in {STATE, INPUT, OUTPUT, BAD}:
# disregard comments at the end of the line
try:
symbol_idx = nids.index(';')
symbol_idx -= 1 # the symbol should be before the comment
except:
# the symbol is just the end
symbol_idx = -1
# check for wirename, if it's an integer, then it's a node ref
try:
a = int(nids[symbol_idx])
except:
try:
name = str(nids[symbol_idx])
# use the exact name, unless it has already been used
wire = Symbol(name, getnode(nids[0]))
if wire in ts.vars:
wire = FreshSymbol(getnode(nids[0]),
template=name + "%d")
invarlist.append(EqualsOrIff(wire, B2BV(nodemap[nid])))
ts.add_var(wire)
except:
pass
if Logger.level(1):
name = lambda x: str(nodemap[x]) if nodemap[x].is_symbol() else x
uncovered = [name(x) for x in nodemap if x not in node_covered]
uncovered.sort()
if len(uncovered) > 0:
Logger.warning("Unlinked nodes \"%s\"" % ",".join(uncovered))
if not self.symbolic_init:
init = simplify(And(initlist))
else:
init = TRUE()
invar = simplify(And(invarlist))
# instead of trans, we're using the ftrans format -- see below
ts.set_behavior(init, TRUE(), invar)
# add ftrans
for var, cond_assign_list in ftrans:
ts.add_func_trans(var, cond_assign_list)
hts.add_ts(ts)
return (hts, invar_props, ltl_props)
def parse_string(self, strinput):
hts = HTS()
ts = TS()
nodemap = {}
node_covered = set([])
translist = []
initlist = []
invarlist = []
invar_props = []
ltl_props = []
def getnode(nid):
node_covered.add(nid)
if int(nid) < 0:
return Ite(BV2B(nodemap[str(-int(nid))]), BV(0,1), BV(1,1))
return nodemap[nid]
def binary_op(bvop, bop, left, right):
if (get_type(left) == BOOL) and (get_type(right) == BOOL):
return bop(left, right)
return bvop(B2BV(left), B2BV(right))
def unary_op(bvop, bop, left):
if (get_type(left) == BOOL):
return bop(left)
return bvop(left)
for line in strinput.split(NL):
linetok = line.split()
if len(linetok) == 0:
continue
if linetok[0] == COM:
continue
(nid, ntype, *nids) = linetok
if ntype == SORT:
(stype, *attr) = nids
if stype == BITVEC:
nodemap[nid] = BVType(int(attr[0]))
node_covered.add(nid)
if stype == ARRAY:
nodemap[nid] = ArrayType(getnode(attr[0]), getnode(attr[1]))
node_covered.add(nid)
if ntype == WRITE:
nodemap[nid] = Store(*[getnode(n) for n in nids[1:4]])
if ntype == READ:
nodemap[nid] = Select(getnode(nids[1]), getnode(nids[2]))
if ntype == ZERO:
nodemap[nid] = BV(0, getnode(nids[0]).width)
if ntype == ONE:
nodemap[nid] = BV(1, getnode(nids[0]).width)
if ntype == ONES:
width = getnode(nids[0]).width
nodemap[nid] = BV((2**width)-1, width)
if ntype == REDOR:
width = get_type(getnode(nids[1])).width
zeros = BV(0, width)
nodemap[nid] = BVNot(BVComp(getnode(nids[1]), zeros))
if ntype == REDAND:
width = get_type(getnode(nids[1])).width
ones = BV((2**width)-1, width)
nodemap[nid] = BVComp(getnode(nids[1]), ones)
if ntype == CONSTD:
width = getnode(nids[0]).width
nodemap[nid] = BV(int(nids[1]), width)
if ntype == CONST:
width = getnode(nids[0]).width
nodemap[nid] = BV(bin_to_dec(nids[1]), width)
if ntype == STATE:
if len(nids) > 1:
nodemap[nid] = Symbol(nids[1], getnode(nids[0]))
else:
nodemap[nid] = Symbol((SN%nid), getnode(nids[0]))
ts.add_state_var(nodemap[nid])
if ntype == INPUT:
if len(nids) > 1:
nodemap[nid] = Symbol(nids[1], getnode(nids[0]))
else:
nodemap[nid] = Symbol((SN%nid), getnode(nids[0]))
ts.add_input_var(nodemap[nid])
if ntype == OUTPUT:
if len(nids) > 2:
symbol = Symbol(nids[2], getnode(nids[0]))
else:
symbol = Symbol((SN%nid), getnode(nids[0]))
nodemap[nid] = EqualsOrIff(symbol, B2BV(getnode(nids[1])))
invarlist.append(nodemap[nid])
node_covered.add(nid)
ts.add_output_var(symbol)
if ntype == AND:
nodemap[nid] = binary_op(BVAnd, And, getnode(nids[1]), getnode(nids[2]))
if ntype == CONCAT:
nodemap[nid] = BVConcat(B2BV(getnode(nids[1])), B2BV(getnode(nids[2])))
if ntype == XOR:
nodemap[nid] = binary_op(BVXor, Xor, getnode(nids[1]), getnode(nids[2]))
if ntype == NAND:
bvop = lambda x,y: BVNot(BVAnd(x, y))
bop = lambda x,y: Not(And(x, y))
nodemap[nid] = binary_op(bvop, bop, getnode(nids[1]), getnode(nids[2]))
if ntype == IMPLIES:
nodemap[nid] = BVOr(BVNot(getnode(nids[1])), getnode(nids[2]))
if ntype == NOT:
nodemap[nid] = unary_op(BVNot, Not, getnode(nids[1]))
if ntype == UEXT:
nodemap[nid] = BVZExt(B2BV(getnode(nids[1])), int(nids[2]))
if ntype == OR:
nodemap[nid] = binary_op(BVOr, Or, getnode(nids[1]), getnode(nids[2]))
if ntype == ADD:
nodemap[nid] = BVAdd(B2BV(getnode(nids[1])), B2BV(getnode(nids[2])))
if ntype == SUB:
nodemap[nid] = BVSub(B2BV(getnode(nids[1])), B2BV(getnode(nids[2])))
if ntype == UGT:
nodemap[nid] = BVUGT(B2BV(getnode(nids[1])), B2BV(getnode(nids[2])))
if ntype == UGTE:
nodemap[nid] = BVUGE(B2BV(getnode(nids[1])), B2BV(getnode(nids[2])))
if ntype == ULT:
nodemap[nid] = BVULT(B2BV(getnode(nids[1])), B2BV(getnode(nids[2])))
if ntype == ULTE:
nodemap[nid] = BVULE(B2BV(getnode(nids[1])), B2BV(getnode(nids[2])))
if ntype == EQ:
nodemap[nid] = BVComp(getnode(nids[1]), getnode(nids[2]))
if ntype == NE:
nodemap[nid] = BVNot(BVComp(getnode(nids[1]), getnode(nids[2])))
if ntype == MUL:
nodemap[nid] = BVMul(B2BV(getnode(nids[1])), B2BV(getnode(nids[2])))
if ntype == SLICE:
nodemap[nid] = BVExtract(B2BV(getnode(nids[1])), int(nids[3]), int(nids[2]))
if ntype == SLL:
nodemap[nid] = BVLShl(getnode(nids[1]), getnode(nids[2]))
if ntype == SRA:
nodemap[nid] = BVAShr(getnode(nids[1]), getnode(nids[2]))
if ntype == SRL:
nodemap[nid] = BVLShr(getnode(nids[1]), getnode(nids[2]))
if ntype == ITE:
if (get_type(getnode(nids[2])) == BOOL) or (get_type(getnode(nids[3])) == BOOL):
nodemap[nid] = Ite(BV2B(getnode(nids[1])), BV2B(getnode(nids[2])), BV2B(getnode(nids[3])))
else:
nodemap[nid] = Ite(BV2B(getnode(nids[1])), getnode(nids[2]), getnode(nids[3]))
if ntype == NEXT:
if (get_type(getnode(nids[1])) == BOOL) or (get_type(getnode(nids[2])) == BOOL):
nodemap[nid] = EqualsOrIff(BV2B(TS.get_prime(getnode(nids[1]))), BV2B(getnode(nids[2])))
else:
nodemap[nid] = EqualsOrIff(TS.get_prime(getnode(nids[1])), getnode(nids[2]))
translist.append(getnode(nid))
if ntype == INIT:
if (get_type(getnode(nids[1])) == BOOL) or (get_type(getnode(nids[2])) == BOOL):
nodemap[nid] = EqualsOrIff(BV2B(getnode(nids[1])), BV2B(getnode(nids[2])))
else:
nodemap[nid] = EqualsOrIff(getnode(nids[1]), getnode(nids[2]))
initlist.append(getnode(nid))
if ntype == CONSTRAINT:
nodemap[nid] = BV2B(getnode(nids[0]))
invarlist.append(getnode(nid))
if ntype == BAD:
nodemap[nid] = getnode(nids[0])
invar_props.append(Not(BV2B(getnode(nid))))
if nid not in nodemap:
Logger.error("Unknown node type \"%s\""%ntype)
if Logger.level(1):
name = lambda x: str(nodemap[x]) if nodemap[x].is_symbol() else x
uncovered = [name(x) for x in nodemap if x not in node_covered]
uncovered.sort()
if len(uncovered) > 0:
Logger.warning("Unlinked nodes \"%s\""%",".join(uncovered))
if not self.symbolic_init:
init = simplify(And(initlist))
else:
init = TRUE()
trans = simplify(And(translist))
invar = simplify(And(invarlist))
ts.set_behavior(init, trans, invar)
hts.add_ts(ts)
return (hts, invar_props, ltl_props)
def Reg(in_, clk, clr, rst, arst, out, initval, clk_posedge, arst_posedge):
# INIT: out = initval
# do_arst = Ite(arst_posedge, (!arst & arst'), (arst & !arst'))
# do_clk = Ite(clk_posedge, (!clk & clk'), (clk & !clk'))
# inr = Ite(clr, 0, Ite(rst, initval, in))
# if Modules.functional
# TRANS: out' = Ite(do_clk, Ite(clr, 0, Ite(rst, initval, in)), Ite(rst, initval, in))
# INVAR: True
# trans gives priority to clr signal over rst
# else
# act_trans = (out' = inr)
# pas_trans = (out' = out)
# TRANS: (!do_arst -> ((do_clk -> act_trans) & (!do_clk -> pas_trans))) & (do_arst -> (out' = initval))
# INVAR: True
# trans gives priority to clr signal over rst
vars_ = [in_, clk, clr, rst, arst, out]
comment = "Reg (in, clk, clr, rst, arst, out) = (%s, %s, %s, %s, %s, %s)" % (
tuple([str(x) for x in vars_]))
Logger.log(comment, 3)
init = TRUE()
trans = TRUE()
invar = TRUE()
initvar = None
basename = SEP.join(out.symbol_name().split(
SEP)[:-1]) if SEP in out.symbol_name() else out.symbol_name()
initname = basename + SEP + INIT
if initval is not None and not Modules.symbolic_init:
if out.symbol_type() == BOOL:
binitval = FALSE() if initval == 0 else TRUE()
else:
binitval = BV(initval, out.symbol_type().width)
initvar = binitval
else:
if out.symbol_type() == BOOL:
initvar = Symbol(initname, BOOL)
else:
initvar = Symbol(initname, BVType(out.symbol_type().width))
trans = And(trans, EqualsOrIff(initvar, TS.get_prime(initvar)))
vars_.append(initvar)
init = And(init, EqualsOrIff(out, initvar))
if arst_posedge is not None:
arst_posedge0 = False if arst_posedge else True
arst_posedge1 = True if arst_posedge else False
else:
arst_posedge0 = False
arst_posedge1 = True
if clk_posedge is not None:
clk_posedge0 = False if clk_posedge else True
clk_posedge1 = True if clk_posedge else False
else:
clk_posedge0 = False
clk_posedge1 = True
if clr is not None:
if clr.symbol_type() == BOOL:
clr0 = Not(clr)
clr1 = clr
else:
clr0 = EqualsOrIff(clr, BV(0, 1))
clr1 = EqualsOrIff(clr, BV(1, 1))
else:
clr0 = TRUE()
clr1 = FALSE()
if rst is not None:
if rst.symbol_type() == BOOL:
rst0 = Not(rst)
rst1 = rst
else:
rst0 = EqualsOrIff(rst, BV(0, 1))
rst1 = EqualsOrIff(rst, BV(1, 1))
else:
rst0 = TRUE()
rst1 = FALSE()
if arst is not None:
if arst.symbol_type() == BOOL:
arst0 = Not(arst)
arst1 = arst
else:
arst0 = EqualsOrIff(arst, BV(0, 1))
arst1 = EqualsOrIff(arst, BV(1, 1))
else:
arst0 = TRUE()
arst1 = FALSE()
if clk.symbol_type() == BOOL:
clk0 = Not(clk)
clk1 = clk
else:
clk0 = EqualsOrIff(clk, BV(0, 1))
clk1 = EqualsOrIff(clk, BV(1, 1))
if Modules.abstract_clock:
do_clk = TRUE()
else:
do_clk = And(TS.to_next(clk1), clk0) if clk_posedge1 else And(
TS.to_next(clk0), clk1)
if out.symbol_type() == BOOL:
out0 = FALSE()
else:
out0 = BV(0, out.symbol_type().width)
inr = Ite(clr1, out0, Ite(rst1, initvar, in_))
do_arst = And(TS.to_next(arst1), arst0) if arst_posedge1 else And(
TS.to_next(arst0), arst1)
ndo_arst = Not(do_arst)
ndo_clk = Not(do_clk)
act_trans = EqualsOrIff(inr, TS.get_prime(out))
pas_trans = EqualsOrIff(out, TS.get_prime(out))
if Modules.functional:
f_outr = Ite(rst1, initvar, out)
f_inr = Ite(rst1, initvar, in_)
f_clr_rst = Ite(clr1, out0, f_inr)
trans = And(
trans,
EqualsOrIff(TS.get_prime(out), Ite(do_clk, f_clr_rst, f_outr)))
else:
trans = And(trans, And(Implies(ndo_arst, And(Implies(do_clk, act_trans), Implies(ndo_clk, pas_trans))), \
Implies(do_arst, EqualsOrIff(TS.get_prime(out), initvar))))
trans = simplify(trans)
ts = TS(comment)
ts.vars, ts.state_vars = set([v for v in vars_
if v is not None]), set([out])
ts.set_behavior(init, trans, invar)
return ts
def parse_file(self, file_path, config, flags=None):
# coreir needs a string representing the path
strfile = str(file_path)
self.config = config
self.__reset_structures()
Logger.msg("Reading CoreIR system... ", 1)
top_module = self.context.load_from_file(strfile)
if config.run_coreir_passes:
self.run_passes()
Modules.abstract_clock = self.config.abstract_clock
Modules.symbolic_init = self.config.symbolic_init
top_def = top_module.definition
interface = list(top_module.type.items())
modules = {}
sym_map = {}
not_defined_mods = []
hts = HTS(top_module.name)
invar_props = []
ltl_props = []
Logger.msg("Starting encoding... ", 1)
count = 0
def extract_value(x, modname, inst_intr, inst_conf, inst_mod):
if x in inst_intr:
return self.BVVar(modname + x, inst_intr[x].size)
if x in inst_conf:
xval = inst_conf[x].value
if type(xval) == bool:
xval = 1 if xval else 0
else:
if type(xval) != int:
try:
xval = xval.as_uint()
except:
xval = None
return xval
if inst_mod.generated:
inst_args = inst_mod.generator_args
if x in inst_args:
return inst_args[x].value
return None
if Logger.level(1):
timer = Logger.start_timer("IntConvertion", False)
en_tprinting = False
if Logger.level(2):
ttimer = Logger.start_timer("Convertion", False)
td_instances = top_def.instances
top_def_instances = [(inst.selectpath, inst.config, inst.module)
for inst in td_instances]
# sorting keeps the behavior deterministic
top_def_instances.sort()
totalinst = len(top_def_instances)
for inst in top_def_instances:
if Logger.level(1):
count += 1
if count % 300 == 0:
dtime = Logger.get_timer(timer, False)
if dtime > 2:
en_tprinting = True
if en_tprinting:
Logger.inline(
"%s" % status_bar(
(float(count) / float(totalinst))), 1)
timer = Logger.start_timer("IntConvertion", False)
if Logger.level(2):
Logger.get_timer(timer, False)
ts = None
(inst_name, inst_conf, inst_mod) = inst
inst_type = inst_mod.name
inst_intr = dict(inst_mod.type.items())
modname = (SEP.join(inst_name)) + SEP
values_dic = {}
for x in self.attrnames:
values_dic[x] = extract_value(x, modname, inst_intr, inst_conf,
inst_mod)
def args(ports_list):
return [values_dic[x] for x in ports_list]
sym = self.__mod_to_sym(inst_type, args)
if sym is not None:
sym_map[sym[0].symbol_name()] = (sym[0], sym[1])
continue
ts = self.__mod_to_impl(inst_type, args)
if ts is not None:
if flags is not None:
if CoreIRModelFlags.NO_INIT in flags:
ts.init = TRUE()
if CoreIRModelFlags.FC_LEMMAS in flags:
for v in ts.vars:
v_name = v.symbol_name()
if (CR in v_name) or (RCR in v_name):
cons_v_name = v_name[:len(
CR)] if CR in v_name else v_name[:len(RCR)]
cons_v = Symbol(cons_v_name, v.symbol_type())
lemma = EqualsOrIff(
cons_v,
BV(values_dic[self.VALUE],
cons_v.symbol_type().width))
hts.add_lemma(lemma)
for v in ts.state_vars:
lemma = EqualsOrIff(
v,
BV(values_dic[self.INIT],
v.symbol_type().width))
hts.add_lemma(lemma)
hts.add_ts(ts)
else:
if inst_type not in not_defined_mods:
intface = ", ".join([
"%s" % (v) for v in values_dic
if values_dic[v] is not None
])
Logger.error(
"Module type \"%s\" with interface \"%s\" is not defined"
% (inst_type, intface))
not_defined_mods.append(inst_type)
Logger.clear_inline(1)
# sorting keeps the behavior deterministic
interface.sort()
for var in interface:
varname = SELF + SEP + var[0]
bvvar = self.BVVar(varname, var[1].size)
if (var[1].is_input()):
hts.add_input_var(bvvar)
else:
hts.add_output_var(bvvar)
if var[1].kind == NAMED and var[1].name == COREIR_CLK:
self.clock_list.add(bvvar)
if self.config.abstract_clock:
self.abstract_clock_list.add(
(bvvar, (BV(0, var[1].size), BV(1, var[1].size))))
else:
# add state variable that stores the previous clock value
# This is IMPORTANT for model checking soundness, but
# it isn't obvious that this is necessary
#
# imagine we have an explicit clock encoding (not abstract_clock), e.g.
# next(state_var) = (!clk & next(clk)) ? <state_update> : <old value>
# and if we're trying to prove something using k-induction, there's a "loop free"
# constraint that the state and output variables don't repeat (reach the same
# state twice) in the trace
# but on a negedge clock, there can be scenarios where no state or outputs
# can be updated and we'll get a trivial unsat which will be interpreted as
# a converged proof -- uh oh
#
# adding this state element just ensures that the loop free constraint won't
# be violated trivially
# e.g. on a neg-edge clock, this new state element will have changed
# make it hidden (won't be printed)
# HIDDEN_VAR is a prefix that printers check for
trailing_clock_var = self.BVVar(
"{}{}__prev".format(HIDDEN_VAR, varname), var[1].size)
ts = TS()
ts.add_state_var(trailing_clock_var)
# the initial state for this trailing variable is unconstrained
ts.set_behavior(
TRUE(),
EqualsOrIff(TS.get_prime(trailing_clock_var), bvvar),
TRUE())
hts.add_ts(ts)
varmap = dict([(s.symbol_name(), s) for s in hts.vars])
def split_paths(path):
ret = []
for el in path:
ret += el.split(CSEP)
return ret
def dict_select(dic, el):
return dic[el] if el in dic else None
eq_conns = []
eq_vars = set([])
td_connections = top_def.connections
top_def_connections = [
((conn.first.selectpath, conn.second.selectpath)
if conn.first.selectpath < conn.second.selectpath else
(conn.second.selectpath, conn.first.selectpath), conn)
for conn in td_connections
]
# sorting keeps the behavior deterministic
top_def_connections.sort()
for conn in top_def_connections:
first_selectpath = split_paths(conn[0][0])
second_selectpath = split_paths(conn[0][1])
first = SEP.join(first_selectpath)
second = SEP.join(second_selectpath)
firstvar = None
secondvar = None
if is_number(first_selectpath[-1]):
firstname = SEP.join(first_selectpath[:-1])
else:
firstname = SEP.join(first_selectpath)
if is_number(second_selectpath[-1]):
secondname = SEP.join(second_selectpath[:-1])
else:
secondname = SEP.join(second_selectpath)
first = (dict_select(varmap, self.remap_or2an(firstname)), None)
second = (dict_select(varmap, self.remap_or2an(secondname)), None)
firstvar = first[0]
secondvar = second[0]
if (firstvar is None) and (self.remap_or2an(firstname) in sym_map):
firstvar = sym_map[self.remap_or2an(firstname)][1]
if (secondvar is None) and (self.remap_or2an(secondname)
in sym_map):
secondvar = sym_map[self.remap_or2an(secondname)][1]
if (firstvar is None) and (secondvar is not None):
Logger.error("Symbol \"%s\" is not defined" % firstname)
first = (Symbol(self.remap_or2an(firstname),
secondvar.symbol_type()), None)
else:
if firstvar.is_constant():
sel = int(first_selectpath[-1]) if (is_number(
first_selectpath[-1])) else None
first = (firstvar, sel)
else:
if (is_number(first_selectpath[-1])) and (
firstvar.symbol_type() !=
BOOL) and (firstvar.symbol_type().width > 1):
sel = int(first_selectpath[-1])
first = (firstvar, sel)
if (firstvar is not None) and (secondvar is None):
Logger.error("Symbol \"%s\" is not defined" % secondname)
second = (Symbol(self.remap_or2an(secondname),
firstvar.symbol_type()), None)
else:
if secondvar.is_constant():
sel = int(second_selectpath[-1]) if (is_number(
second_selectpath[-1])) else None
second = (secondvar, sel)
else:
if (is_number(second_selectpath[-1])) and (
secondvar.symbol_type() !=
BOOL) and (secondvar.symbol_type().width > 1):
sel = int(second_selectpath[-1])
second = (secondvar, sel)
assert ((firstvar is not None) and (secondvar is not None))
eq_conns.append((first, second))
if firstvar.is_symbol():
eq_vars.add(firstvar)
if secondvar.is_symbol():
eq_vars.add(secondvar)
conns_len = len(eq_conns)
if self.pack_connections:
eq_conns = self.__pack_connections(eq_conns)
if len(eq_conns) < conns_len:
Logger.log("Packed %d connections" % (conns_len - len(eq_conns)),
1)
eq_formula = TRUE()
for eq_conn in eq_conns:
(fst, snd) = eq_conn
if fst[1] is None:
first = fst[0]
else:
if len(fst) > 2:
first = BVExtract(fst[0], fst[1], fst[2])
else:
first = BVExtract(fst[0], fst[1], fst[1])
if snd[1] is None:
second = snd[0]
else:
if len(snd) > 2:
second = BVExtract(snd[0], snd[1], snd[2])
else:
second = BVExtract(snd[0], snd[1], snd[1])
if (first.get_type() != BOOL) and (second.get_type() == BOOL):
second = Ite(second, BV(1, 1), BV(0, 1))
if (first.get_type() == BOOL) and (second.get_type() != BOOL):
first = Ite(first, BV(1, 1), BV(0, 1))
eq_formula = And(eq_formula, EqualsOrIff(first, second))
Logger.log(str(EqualsOrIff(first, second)), 3)
ts = TS("Connections")
ts.invar = eq_formula
ts.vars = eq_vars
hts.add_ts(ts)
if self.enc_map is not None:
del (self.enc_map)
if Logger.level(2):
Logger.get_timer(ttimer)
# check that clocks were detected if there's any state
if hts.state_vars:
assert self.clock_list, "Expecting clocks if there are state variables"
return (hts, invar_props, ltl_props)
