def test_001_ofdm_move_and_insert_zero(self):
		num_carriers = 4
		fft_length   = 10
		d_zeros_on_left = 3
		src_data0        = range(0,8)
		expected_result0 = [0,0,0]+[0,1]+[0]+[2,3]+[0,0]+[0,0,0]+[4,5]+[0]+[6,7]+[0,0]
		expected_result0 = [complex(x) for x in expected_result0]
		src0 = blocks.vector_source_c(src_data0)
		s2v0 = blocks.stream_to_vector(gr.sizeof_gr_complex, num_carriers)
		ofdm_move_and_insert_zero = dab.ofdm_move_and_insert_zero(fft_length,num_carriers)
		v2s0 = blocks.vector_to_stream(gr.sizeof_gr_complex, fft_length)
		dst0 = blocks.vector_sink_c()
		self.tb.connect(src0, s2v0, ofdm_move_and_insert_zero, v2s0, dst0)
		self.tb.run()
		result_data0 = dst0.data()
		# print expected_result0
		# print result_data0
		self.assertComplexTuplesAlmostEqual(expected_result0, result_data0, 6)
Пример #2
0
 def test_001_ofdm_move_and_insert_zero(self):
     num_carriers = 4
     fft_length = 10
     d_zeros_on_left = 3
     src_data0 = range(0, 8)
     expected_result0 = [0, 0, 0] + [0, 1] + [0] + [2, 3] + [0, 0] + [
         0, 0, 0
     ] + [4, 5] + [0] + [6, 7] + [0, 0]
     expected_result0 = [complex(x) for x in expected_result0]
     src0 = blocks.vector_source_c(src_data0)
     s2v0 = blocks.stream_to_vector(gr.sizeof_gr_complex, num_carriers)
     ofdm_move_and_insert_zero = dab.ofdm_move_and_insert_zero(
         fft_length, num_carriers)
     v2s0 = blocks.vector_to_stream(gr.sizeof_gr_complex, fft_length)
     dst0 = blocks.vector_sink_c()
     self.tb.connect(src0, s2v0, ofdm_move_and_insert_zero, v2s0, dst0)
     self.tb.run()
     result_data0 = dst0.data()
     # print expected_result0
     # print result_data0
     self.assertComplexTuplesAlmostEqual(expected_result0, result_data0, 6)
Пример #3
0
	def __init__(self, dab_params, verbose=False, debug=False):
		"""
		Hierarchical block for OFDM modulation

		@param dab_params DAB parameter object (dab.parameters.dab_parameters)
		@param debug enables debug output to files
		"""

		dp = dab_params

		gr.hier_block2.__init__(self,"ofdm_mod",
		                        gr.io_signature2(2, 2, gr.sizeof_char*dp.num_carriers/4, gr.sizeof_char), # input signature
					gr.io_signature (1, 1, gr.sizeof_gr_complex)) # output signature


		# symbol mapping
		self.mapper = dab.qpsk_mapper_vbc(dp.num_carriers)

		# add pilot symbol
		self.insert_pilot = dab.ofdm_insert_pilot_vcc(dp.prn)

		# phase sum
		self.sum_phase = dab.sum_phasor_trig_vcc(dp.num_carriers)

		# frequency interleaving
		self.interleave = dab.frequency_interleaver_vcc(dp.frequency_interleaving_sequence_array)

		# add central carrier & move to middle
		self.move_and_insert_carrier = dab.ofdm_move_and_insert_zero(dp.fft_length, dp.num_carriers)

		# ifft
		self.ifft = fft.fft_vcc(dp.fft_length, False, [], True)

		# cyclic prefixer
		self.prefixer = digital.ofdm_cyclic_prefixer(dp.fft_length, dp.symbol_length)

		# convert back to vectors
		self.s2v = blocks.stream_to_vector(gr.sizeof_gr_complex, dp.symbol_length)

		# add null symbol
		self.insert_null = dab.insert_null_symbol(dp.ns_length, dp.symbol_length)

		#
		# connect it all
		#

		# data
		self.connect((self,0), self.mapper, (self.insert_pilot,0), (self.sum_phase,0), self.interleave, self.move_and_insert_carrier, self.ifft, self.prefixer, self.s2v, (self.insert_null,0))
		self.connect(self.insert_null, self)

		# control signal (frame start)
		self.connect((self,1), (self.insert_pilot,1), (self.sum_phase,1), (self.insert_null,1))

		if debug:
			self.connect(self.mapper, blocks.file_sink(gr.sizeof_gr_complex*dp.num_carriers, "debug/generated_signal_mapper.dat"))
			self.connect(self.insert_pilot, blocks.file_sink(gr.sizeof_gr_complex*dp.num_carriers, "debug/generated_signal_insert_pilot.dat"))
			self.connect(self.sum_phase, blocks.file_sink(gr.sizeof_gr_complex*dp.num_carriers, "debug/generated_signal_sum_phase.dat"))
			self.connect(self.interleave, blocks.file_sink(gr.sizeof_gr_complex*dp.num_carriers, "debug/generated_signal_interleave.dat"))
			self.connect(self.move_and_insert_carrier, blocks.file_sink(gr.sizeof_gr_complex*dp.fft_length, "debug/generated_signal_move_and_insert_carrier.dat"))
			self.connect(self.ifft, blocks.file_sink(gr.sizeof_gr_complex*dp.fft_length, "debug/generated_signal_ifft.dat"))
			self.connect(self.prefixer, blocks.file_sink(gr.sizeof_gr_complex, "debug/generated_signal_prefixer.dat"))
			self.connect(self.insert_null, blocks.file_sink(gr.sizeof_gr_complex, "debug/generated_signal.dat"))
Пример #4
0
	def __init__(self, dab_params, verbose=False, debug=False):
		"""
		Hierarchical block for OFDM modulation

		@param dab_params DAB parameter object (dab.parameters.dab_parameters)
		@param debug enables debug output to files
		"""

		dp = dab_params

		gr.hier_block2.__init__(self,"ofdm_mod",
		                        gr.io_signature2(2, 2, gr.sizeof_char*dp.num_carriers/4, gr.sizeof_char), # input signature
					gr.io_signature (1, 1, gr.sizeof_gr_complex)) # output signature


		# symbol mapping
		self.mapper_v2s = blocks.vector_to_stream_make(gr.sizeof_char, 384)
		self.mapper_unpack = blocks.packed_to_unpacked_bb_make(1, gr.GR_MSB_FIRST)
		self.mapper = dab.mapper_bc_make(dp.num_carriers)
		self.mapper_s2v = blocks.stream_to_vector_make(gr.sizeof_gr_complex, 1536)

		# add pilot symbol
		self.insert_pilot = dab.ofdm_insert_pilot_vcc(dp.prn)

		# phase sum
		self.sum_phase = dab.sum_phasor_trig_vcc(dp.num_carriers)

		# frequency interleaving
		self.interleave = dab.frequency_interleaver_vcc(dp.frequency_interleaving_sequence_array)

		# add central carrier & move to middle
		self.move_and_insert_carrier = dab.ofdm_move_and_insert_zero(dp.fft_length, dp.num_carriers)

		# ifft
		self.ifft = fft.fft_vcc(dp.fft_length, False, [], True)

		# cyclic prefixer
		self.prefixer = digital.ofdm_cyclic_prefixer(dp.fft_length, dp.symbol_length)

		# convert back to vectors
		self.s2v = blocks.stream_to_vector(gr.sizeof_gr_complex, dp.symbol_length)

		# add null symbol
		self.insert_null = dab.insert_null_symbol(dp.ns_length, dp.symbol_length)

		#
		# connect it all
		#

		# data
		self.connect((self,0), self.mapper_v2s, self.mapper_unpack, self.mapper, self.mapper_s2v, (self.insert_pilot,0), (self.sum_phase,0), self.interleave, self.move_and_insert_carrier, self.ifft, self.prefixer, self.s2v, (self.insert_null,0))
		self.connect(self.insert_null, self)

		# control signal (frame start)
		self.connect((self,1), (self.insert_pilot,1), (self.sum_phase,1), (self.insert_null,1))

		if debug:
			#self.connect(self.mapper, blocks.file_sink(gr.sizeof_gr_complex*dp.num_carriers, "debug/generated_signal_mapper.dat"))
			self.connect(self.insert_pilot, blocks.file_sink(gr.sizeof_gr_complex*dp.num_carriers, "debug/generated_signal_insert_pilot.dat"))
			self.connect(self.sum_phase, blocks.file_sink(gr.sizeof_gr_complex*dp.num_carriers, "debug/generated_signal_sum_phase.dat"))
			self.connect(self.interleave, blocks.file_sink(gr.sizeof_gr_complex*dp.num_carriers, "debug/generated_signal_interleave.dat"))
			self.connect(self.move_and_insert_carrier, blocks.file_sink(gr.sizeof_gr_complex*dp.fft_length, "debug/generated_signal_move_and_insert_carrier.dat"))
			self.connect(self.ifft, blocks.file_sink(gr.sizeof_gr_complex*dp.fft_length, "debug/generated_signal_ifft.dat"))
			self.connect(self.prefixer, blocks.file_sink(gr.sizeof_gr_complex, "debug/generated_signal_prefixer.dat"))
			self.connect(self.insert_null, blocks.file_sink(gr.sizeof_gr_complex, "debug/generated_signal.dat"))