def main():
driv = PCIeDriver()
driv.ListAllChannels()
driv.PrintAllChannels()
driv.ToggleSGDMA([0x1])
mem = devmem.DevMem(0x34bc00000, 100 * 1024 * 1024, "/dev/mem", 0)
ptr_read = 10 * 1024 * 1024
ptr_write = 30 * 1024 * 1024
sz_buffer = 10 * 1024 * 1024
mem.write(
ptr_read,
(np.multiply(np.sin(range(sz_buffer)) + 1, 1000).astype(int).tolist()))
mem.write(ptr_write, np.zeros(sz_buffer).astype(int).tolist())
print((driv.ReadUser(0x00, 0, 1)).data)
print(" Writing gpio@0x08: {0}" % (driv.WriteUser(0x00, 0x8, [0xF45F45F])))
#mem.write(ptr_read, np.sin(np.arange(sz_buffer)))
#mem.write(ptr_write, np.zeros(sz_buffer))
driv.BypassDescriptorIssueCmd(0x10000, 0x10, 0x34bc00000 + ptr_write, 0,
sz_buffer, 0, 1, 1)
driv.BypassDescriptorIssueCmd(0x30000, 0x10, 0, 0x34bc00000 + ptr_read,
sz_buffer, 0, 1, 0)
time.sleep(5)
plt.plot(mem.read(ptr_read, 1024).data)
plt.plot(mem.read(ptr_write, 1024).data)
plt.show()
def __init__(self, driver_id=0):
self.dId = driver_id
self.fcontrol = "/dev/xdma%d_control" % driver_id
self.fuser = "******" % driver_id
self.mmControl = devmem.DevMem(0x0, 16 * 1024, self.fcontrol, 1)
self.mmUser = devmem.DevMem(0x0, 3 * 64 * 1024, self.fuser, 1)
self.offset_type = 0x1000
self.offset_ch = 0x100
self.offset_id = 0x00
self.offset_ctrl = 0x04
self.offset_status = 0x40
self.nChannelsIn = 0
self.nChannelsOut = 0
self.en_chtype = ["unidentified", "memory mapped", "streaming"]
self.h2c = 0
self.c2h = 0
self.h2c_type = np.zeros(4)
self.h2c_id = np.zeros(4)
self.c2h_type = np.zeros(4)
self.c2h_id = np.zeros(4)
with open("/usr/rsyocto/suppBoard.txt", "r") as f:
supportStr = f.read()
if not supportStr.find('Terasic DE10 Standard') == -1:
devboard = 0
elif not supportStr.find('Terasic HAN Pilot') == -1:
devboard = 2
if devboard == 1:
print(
"Error: This script only works with a Terasic DE10 Standard- or Han Pilot Board!"
)
sys.exit()
# Open the memory access to the Lightweight HPS-to-FPGA bridge
# (Base address, byte len to accesses, interface)
de = devmem.DevMem(HPS_LW_ADRS_OFFSET,
SEVENSIG_ADDRES_OFFSET[devboard] + 1, "/dev/mem")
for var in range(SEVENSIG_MAX_VALUE[devboard]):
print('Sample: ' + str(var) + '/' + str(SEVENSIG_MAX_VALUE[devboard]))
# Count the LED value up
if (ledValue < SEVENSIG_MAX_VALUE[devboard]):
ledValue += 1
else:
ledValue = 0
# Write the LED value to FPGA GPIO Controller
de.write(SEVENSIG_ADDRES_OFFSET[devboard], [ledValue])
# Wait
time.sleep(DELAY_DURATION[devboard])
def __init__(self, base_addr):
self.base_addr = base_addr
self.mem = devmem.DevMem(base_addr, 0x100, "/dev/mem", 0)
# Read selcted ADC Channel as input argument [1]
# python3 adcReadChannl <CH>
ch = 0
ch_selet = str(sys.argv[1])
try:
ch = int(ch_selet)
except ValueError:
ch = 0
if(not(ch >=0 and ch < 6)):
ch = 0
# open the memory Access to the Lightweight HPS-to-FPGA bridge
# (Base address, byte length to acceses, interface)
de = devmem.DevMem(HPS_LW_ADRS_OFFSET, ADC_ADDRES_OFFSET+0x8, "/dev/mem")
# Set meassure number for ADC convert
de.write(ADC_ADDRES_OFFSET+ADC_DATA_REG_OFFSET,[FIFO_SIZE])
# Enable the convention with the selected Channel
de.write(ADC_ADDRES_OFFSET+ADC_CMD_REG_OFFSET, [(ch <<1) | 0x00])
de.write(ADC_ADDRES_OFFSET+ADC_CMD_REG_OFFSET, [(ch <<1) | 0x01])
de.write(ADC_ADDRES_OFFSET+ADC_CMD_REG_OFFSET, [(ch <<1) | 0x00])
timeout = 300 #ms
# Wait until convention is done or a timeout occurred
while (not(timeout == 0)):
if(de.read(ADC_ADDRES_OFFSET+ADC_CMD_REG_OFFSET,1)[0] & (1<<0)):
break
if __name__ == '__main__':
print("FPGA LED Bin Counter (HPS-Bridge Demo)")
# Read the name of the used development board
# The Board name for the image is located here: "/usr/rsyocto/suppBoard.txt"
if os.path.isfile("/usr/rsyocto/suppBoard.txt"):
supportStr = ""
with open("/usr/rsyocto/suppBoard.txt", "r") as f:
supportStr = f.read()
if not supportStr.find('Terasic HAN Pilot') == -1:
Fpgafamily = 1
print('Your dev board: ' + supportStr)
# Open the memory access to the Lightweight HPS-to-FPGA Bridge
# (Base address, byte length to acceses, interface)
de = devmem.DevMem(HPS_LW_ADRS_OFFSET,
HPS_LW_ADRS_OFFSET_SYSID[Fpgafamily] + 1, "/dev/mem")
# Read the system ID
sysIDraw = de.read(HPS_LW_ADRS_OFFSET_SYSID[Fpgafamily], 1)
sysID = sysIDraw.data[0]
print("The system ID is: " + hex(sysID))
# Check that the ID os vailed
if sysID == HPS_FPGA_SYSID[Fpgafamily]:
print('The system ID is vailed!')
else:
print('The system ID is not vailed!')
print('Reading the FPGA Buttons and Swiches')
for var in range(TEST_DURATIONS):
print('Sample: ' + str(var) + '/' + str(TEST_DURATIONS))
# Convert String to int
try:
versionNo = float(versionStr)
except ValueError:
print("Warning: Failed to read rsyocto Version")
if not versionNo >= 1.04:
print(
"Error: The ADC is only supported with rsyocto Version 1.04 or later "
)
print(" This Version is: " + versionStr)
sys.exit()
# open the memory Access to the Lightweight HPS-to-FPGA bridge
# (Base address, byte length to acceses, interface)
de = devmem.DevMem(HPS_LW_ADRS_OFFSET, ADC_ADDRES_OFFSET + ADC_REG_RANGE,
"/dev/mem")
# Enable the auto conversion update mode
de.write(ADC_ADDRES_OFFSET + ADC_REG_OFF_UPDATE, [1])
print('Reading the current ADC value ...')
# Enter test loop
for var in range(TEST_DURATIONS):
print('Sample: ' + str(var) + '/' + str(TEST_DURATIONS))
# Read the ADC Value from the selected Channel
raw_value = (de.read(ADC_ADDRES_OFFSET + ADC_REG_OFF_DATACH, 1))[0]
# Remove Bit 12-31 (Bit 15 is always high)
raw_value = (raw_value & 0x00000FFF)
# Read the name of the used development board
# The Board name for the image is located here: "/usr/rsyocto/suppBoard.txt"
if os.path.isfile("/usr/rsyocto/suppBoard.txt"):
supportStr = ""
with open("/usr/rsyocto/suppBoard.txt", "r") as f:
supportStr = f.read()
if not supportStr.find('Terasic DE10 Nano') == -1:
devboard = 1
elif not supportStr.find('Terasic HAN Pilot') == -1:
devboard = 2
print('Your dev board: ' + supportStr)
# open the memory Access to the Lightweight HPS-to-FPGA bridge
# (Base address, byte length to acceses, interface)
de = devmem.DevMem(HPS_LW_ADRS_OFFSET, LEDS_ADDRES_OFFSET[devboard],
"/dev/mem")
# start the process bar
bar.start()
for var in range(LED_MAX_COUNT_VALUE[devboard]):
# count the LED value up
if (ledValue < LED_MAX_COUNT_VALUE[devboard]):
ledValue += 1
else:
ledValue = 0
# write the LED value to FPGA GPIO Controller
de.write(LEDS_ADDRES_OFFSET[devboard], [ledValue])
import devmem
import time
# Pyhsical addresses
LPHS_BRIDGE = 0xff200000
CRC32_CALC_BASE = 0x40000
CRC32_RESET_BASE = CRC32_CALC_BASE + 0x0004
#Acess - CRC32 Calc Reg
CRC32_CALC_ADDR = LPHS_BRIDGE + CRC32_CALC_BASE
crc32CALCReg = devmem.DevMem(CRC32_CALC_ADDR, 1, '/dev/mem', 0)
#Acess - CRC32 Reset Reg
CRC32_RESET_ADDR = LPHS_BRIDGE + CRC32_RESET_BASE
crc32ResetReg = devmem.DevMem(CRC32_RESET_ADDR, 1, '/dev/mem', 0)
#Read and diplay the 32bit content stored at the byte address CRC32_RESET_BASE
def readCRC32Sum():
crc32Sum = crc32CALCReg.read(0, 1)
return crc32Sum.data[0]
def addValueToBeCRC32Hashed(inputVal):
crc32Sum = crc32CALCReg.write(0, [inputVal])
def resetCRC32Sum():
crc32Sum = crc32ResetReg.write(0,
[0x1]) # write 0x00000001 to the RESET REG