def write(self, write_data):
""" write access
Args:
write_data(bytes): write data bytes
Returns:
NONE
"""
rd_data = self.__axi4lite.read(0x0C, 1)
bits_width = rd_data[0]
if (len(write_data) % 4 > 0):
logger.error('%s: write data length error' % (self.name))
return False
i = int(len(write_data) / bits_width)
wr_data_index = 0
while (i > 0):
rd_data = self.__axi4lite.read(0x10, 2)
cache_deep = self.__data_deal.list_2_int(rd_data)
if (cache_deep > i):
send_cnt = i
else:
send_cnt = cache_deep - 3
send_byte_cnt = send_cnt * bits_width
#self.__axi4lite.write_byte_array(0x14, write_data[wr_data_index:wr_data_index+send_byte_cnt], send_byte_cnt, bits_width*8)
self.__axi4lite.write_array(
0x14, write_data[wr_data_index:wr_data_index + send_byte_cnt],
send_byte_cnt, bits_width * 8)
wr_data_index += send_byte_cnt
i -= send_cnt
return None
def signal_type_set(self,signal_type):
""" set output signal type
Args:
signal_type(str): 'sine'--sine wave output
'square' -- square output
'AWG' -- arbitrary waveform output
Returns:
True | False
"""
self.__axi4lite.write(0x11, [0x00],1)
rd_data = self.__axi4lite.read(0x10,1)
if(signal_type == 'sine'):
signal_type_flag = 0x10
elif(signal_type == 'square'):
signal_type_flag = 0x00
elif(signal_type == 'AWG'):
signal_type_flag = 0x40
else:
logger.error('@%s: signal type set error'%(self.name))
return False
wr_data = (rd_data[0] & 0x0F) | signal_type_flag;
self.__axi4lite.write(0x10, [wr_data],1)
return True
def dir_set(device_name, gpio_ctrl):
""" set gpio to input or output
Args:
device_name: str type, device name.
gpio_ctrl(list): the unit of list is (gpio_number,gpio_ctrl)
gpio_number for 0 to 127
set gpio_ctrl to 1, the gpio is set to input
set gpio_ctrl to 0, the gpio is set to output
Returns:
Success return NONE,
False otherwise.
eg:
Set the direction of the gpio2 to 0(output):
dir_set("XAI$_GPIO",((2,0),))
Set the direction of the gpio2 gpio3 to 0(output):
dir_set("XAI$_GPIO",((2,0),(3,0)))
"""
try:
path = Utility.get_dev_path() + '/' + device_name
gpio_device = Axi4Gpio(path)
return gpio_device.gpio_ctrl(gpio_ctrl)
except Exception as e:
logger.error("error: gpio dir set False:" + repr(e))
return False
def config(self,
baud_rate=115200,
data_bits=8,
parity='NONE',
stop_bits=1,
flow_ctrl="SgUartHardStreamDisable"):
logger.info("uart set baud_rate: %s ; flow_ctrl : %s ; data_bits: %s; stop_bits : %s ;parity: %s;"\
%(baud_rate, flow_ctrl, data_bits,stop_bits,parity))
self.__ser.baudrate = baud_rate
self.__ser.bytesize = uart_data_bits[data_bits]
self.__ser.parity = uart_parity[parity]
self.__ser.stopbits = uart_stop_bit[stop_bits]
if flow_ctrl == "SgUartHardStreamEnable":
self.__ser.rtscts = True
elif flow_ctrl == "SgUartFlowCtrlEnable":
self.__ser.xonxoff = True
self.__is_use = True
if self.get_uart_status() is False:
logger.warning("uart device:%s does not exist" % (str(self.name)))
self._close()
return False
elif self.is_open is True:
self._close()
status = self._open()
if status is False:
logger.error("uart %s set param error" % (self.name))
return False
else:
return True
def __init__(self,name):
self.name = name
self.reg_num = 8192
self.__axi4lite=Axi4lite(self.name,self.reg_num)
if self.__axi4lite.open() is False:
logger.error('open %s device register number %d fail'%(self.name, self.reg_num))
self.__data_deal = DataOperate()
def stop_edge_set(self,stop_edge_type='B-POS'):
""" Set width measure stop_edge_type
Args:
stop_edge_type(str): 'A-POS' -- signal A posedge
'A-NEG' -- signal A negedge
'B-POS' -- signal B posedge
'B-NEG' -- signal B negedge
'A-P**N' -- signal A posedge or A negedge
'B-P**N' -- signal B posedge or B negedge
Returns:
None
"""
self.__axi4lite.write(0x13,[0x00],1)
if(stop_edge_type == 'B-POS'):
stop_edge_data = 0x00
elif(stop_edge_type == 'B-NEG'):
stop_edge_data = 0x01
elif(stop_edge_type == 'A-POS'):
stop_edge_data = 0x02
elif(stop_edge_type == 'A-NEG'):
stop_edge_data = 0x03
elif(stop_edge_type == 'A-P**N'):
stop_edge_data = 0x04
elif(stop_edge_type == 'B-P**N'):
stop_edge_data = 0x05
else:
logger.error('@%s: Parameter Error'%(self.name))
return False
wr_data = stop_edge_data;
self.__axi4lite.write(0x13, [wr_data], 1)
return None
def measure_start(self, time_ms, sample_rate):
""" start measure access
Args:
time_ms(int): measure time, unit is ms
sample_rate(int): data sample rate, unit is SPS
Returns:
True | False
"""
self.__sample_rate = sample_rate
wr_data = self.__data_deal.int_2_list(time_ms, 2)
self.__axi4lite.write(0x11, wr_data, len(wr_data))
self.__axi4lite.write(0x14, [0x00], 1)
self.__axi4lite.write(0x13, [0x01], 1)
rd_data = self.__axi4lite.read(0x14, 1)
timeout = 0
while (rd_data[0] != 0x01) and (timeout < (time_ms + 1000)):
time.sleep(0.001)
rd_data = self.__axi4lite.read(0x14, 1)
timeout = timeout + 1
if (timeout == (time_ms + 1000)):
logger.error('@%s: Measure time out' % (self.name))
self.__measure_state = 0
return False
self.__measure_state = 1
return True
def write(self,write_data,cs_extend = 0):
""" SPI write access
Args:
write_data(list): write data list
cs_extend(float): The extend CS low when SPI access over, cs_extend is 0 to 8, min resolution is 0.5
Returns:
False | True
"""
send_cache_depth = self.__axi4lite.read(0x28,1)
last_append = (int(cs_extend)*16 + 5)
if(cs_extend > int(cs_extend)):
last_append = last_append + 8
if(self.__cache_size < (send_cache_depth[0] + len(write_data))):
logger.error('@%s: send cache not enough')
return False
write_data_temp = []
for i in range(0,len(write_data)):
write_data_temp.append(write_data[i])
if(i == (len(write_data)-1)):
write_data_temp.append(last_append)
else:
write_data_temp.append(0x04)
self.__axi4lite.write_array(0x20, write_data_temp, len(write_data_temp), 16)
return True
def continue_sample_capture(self):
""" read continue sampld data
Args:
None
Returns:
sample_data(list): sample data
"""
rd_data = self.__axi4lite.read(0x26, 1)
sample_state = rd_data[0] & 0x04
if (sample_state == 0):
logger.warning('AD717X not in continue sample mode')
return False
self.__axi4lite.write(0x11, [0x01], 1)
rd_data = self.__axi4lite.read(0x12, 1)
if (rd_data[0] & 0x02 == 0x00):
logger.warning('AD717X capture fifo reset failt')
return False
self.__axi4lite.write(0x11, [0x00], 1)
time_out = 0
while time_out < 300:
rd_data = self.__axi4lite.read(0x12, 1)
if rd_data[0] & 0x01 == 0x01:
break
else:
time_out = time_out + 1
time.sleep(0.01)
if time_out == 3000:
logger.error('@%s: capture data time out' % (self.name))
return False
receive_list = self.__axi4lite.read_array(0x60, 2048, 32)
return receive_list
def spi_config(bus_name,
clk_frequency,
clk_type,
wait_time_us=1,
spi_clk_polarity='high'):
logger.warning(
"spi config -->bus_name:%s, clk_frequency:%s, clk_type:%s, wait_time_us:%s "
% (bus_name, clk_frequency, clk_type, wait_time_us))
""" Set spi bus parameter
Args:
spi_clk_frequency(int): spi bus clock frequency, unit is Hz
spi_clk_type(str): 'pos' --sclk posedge send data, sclk negedge receive data
'neg' --sclk negedge send data, sclk posedge receive data
wait_time_us(float): the wait time for new spi access
spi_clk_polarity(str): 'high' --when CS is high, the SCLK is high
'low' --when CS is high, the SCLK is low
Returns:
None
"""
try:
profile = Profile.get_bus_by_name(bus_name)
bus = SpiFactory.create_object(SpiFactory, profile["path"])
return bus.config(clk_frequency, clk_type, wait_time_us,
spi_clk_polarity)
except Exception as e:
logger.error("execute module spi_config False:" + repr(e))
return False
def stop_point_set(self,edge_list=['A-POS']):
""" Set width measure stop point
Args:
edge_list(list): 'A-POS' -- signal A posedge
'A-NEG' -- signal A negedge
'B-POS' -- signal B posedge
'B-NEG' -- signal B negedge
Returns:
None
"""
edge_data = 0
for edge_sel in edge_list:
if(edge_sel == 'A-POS'):
edge_data = edge_data | 0x01
elif(edge_sel == 'A-NEG'):
edge_data = edge_data | 0x02
elif(edge_sel == 'B-POS'):
edge_data = edge_data | 0x04
elif(edge_sel == 'B-NEG'):
edge_data = edge_data | 0x08
else:
logger.error('@%s: Parameter Error'%(self.name))
return False
self.__axi4lite.write(0x13, [edge_data], 1)
return None
def measure_paramter_set(self, bandwidth_hz, sample_rate, decimation_type,
signal_source):
""" Set measure paramter
Args:
bandwidth_hz(int): Bandwidth limit, unit is Hz
sample_rate(int): signal sample rate, unit is Hz
decimation_type(str): signal decimation type
'auto' -- automatic detection
'1'/'2'/........
signal_source(str): 'IIS'/'PDM'/'SPDIF'
Returns:
False | True
"""
wr_data = self.__data_deal.int_2_list(int(sample_rate / 1000), 3)
self.__axi4lite.write(0xF0, wr_data, len(wr_data))
rd_data = self.__axi4lite.read(0x16, 1)
freq_resolution = sample_rate / (8192 * rd_data[0])
bandwidth_index = int(bandwidth_hz / freq_resolution)
if (signal_source == 'IIS'):
source_data = 0x10
elif (signal_source == 'SPDIF'):
source_data = 0x20
elif (signal_source == 'PDM'):
source_data = 0x30
else:
logger.error('@%s: Signal Source Error' % (self.name))
return False
wr_data = self.__data_deal.int_2_list(bandwidth_index, 2)
wr_data[1] = (wr_data[1] & 0x0F) | source_data
self.__axi4lite.write(0x11, wr_data, len(wr_data))
self._decimation_factor_set(decimation_type)
return True
def __cmd_list_init():
global CMD_LIST
CMD_LIST.clear()
# print("----- init cmd list -----")
try:
if True == os.path.exists(os.path.dirname(sys.argv[0]) + "/handles_config.json"):
json_file = '%s/handles_config.json'%(os.path.dirname(sys.argv[0]))
else:
json_file = '%s/command/handle/handles_config.json'%(os.environ.get("PYTHON_HOME", "/opt/seeing/app"))
handles_file = open(json_file)
except Exception as e:
logger.error("open handles config file error !!!")
return
for each_line in handles_file :
line = each_line.strip()
line = line.strip(',')
msg = None
try:
msg = json.loads(line)
except Exception as e:
continue
__append_cmd(msg)
logger.boot("cmd list is :" + str(CMD_LIST))
handles_file.close()
return
def pattern_output_state(self, timeout=10000):
""" query pattern signal output state
Args:
timeout(int): ms, Timeout waiting for the trigger signal.
Returns:
True | False
"""
# query state
timeout_cnt = 0
rd_data = self.__axi4lite.read(0x13, 1)
while (rd_data[0] != 0x01) and (timeout_cnt < (timeout + 1000)):
time.sleep(0.001)
rd_data = self.__axi4lite.read(0x13, 1)
timeout_cnt = timeout_cnt + 1
# read pattern count
# time.sleep(0.100)
# rd_data = self.__axi4lite.read(0x30,4)
# print("pattern len:", rd_data)
# rd_data = self.__axi4lite.read(0x3C,4)
# print("pattern cnt:", rd_data)
# if(rd_data != [0, 80, 8, 0]):
# exit(0)
if (timeout_cnt == (timeout + 1000)):
logger.error('@%s: Measure time out' % (self.name))
return False
return True
def _get_eeprom_addr(self, range_name, level):
if range_name not in self.cal_profile["range"]:
raise ValueError("Input: "+range_name,"Args: "+str(self.cal_profile["range"].viewkeys()))
range_list = self.cal_profile["range"][range_name]
wrong_level_flag = 1
for range_dict in range_list:
if range_dict["level"] == level:
addr_offset = range_dict["addr_offset"]
wrong_level_flag = 0
break
if wrong_level_flag == 1:
raise ValueError("Input: "+str(level) + "out of range")
base_addr = self.cal_profile["base_addr"]
max_addr = self.cal_profile["max_addr"]
unit_size = self.cal_profile["unit_size"]
address = base_addr + addr_offset * unit_size
if address > max_addr:
logger.error("eeprom chip addr out of range")
return False
return address
def io_chip_dir_get(board_name, *chipname):
""" Get the CHIP pins dir state from dev
Args:
board_name: str type , board name.
chipname: list type, format: ["cpX", "cpX", ...]
X:[1- ]
Which io chip name state we will get .
Returns:
dict type: {"cpX": Y}, "cpX": Y, "cpX": False...}
X:[1- ]
Y: 16bit: [0x0000 - 0xffff]
24bit:[0x000000 - 0xffffff]
eg: cp5 read false returns: {"cp5": False,}
"""
chip_state_dict = OrderedDict()
ioprofile = Profile.get_extendio_by_name(board_name)
for name in chipname:
try:
chip_state_dict[name] = Extendio.chip_dir_get(ioprofile, name)
except Exception as e:
logger.error("execute module io io_chip_dir_get False:" + repr(e))
chip_state_dict[name] = False
return chip_state_dict
def detect_time_get(self,detect_time_ms):
""" get measure data
Args:
None
Returns:
detect_data(float): the data is start_edge_type to stop_edge_type time, unit is us
"""
rd_data = self.__axi4lite.read(0x20, 1)
detect_time_out=0
while rd_data[0]!=0x01 and (detect_time_out<detect_time_ms+1000):
time.sleep(0.001)
detect_time_out+=1
rd_data = self.__axi4lite.read(0x20, 1)
if(detect_time_out== detect_time_ms+1000):
logger.error('@%s: Detect time out'%(self.name))
return False
else:
rd_data=self.__axi4lite.read(0x24,4)
detect_time=self.__data_deal.list_2_int(rd_data)
clk_period = 1000.0/self.__clk_frequency
detect_data= clk_period*detect_time
self.__axi4lite.write(0x11,[0x00],1)
return ('detect_time',detect_data,'us')
def io_dir_get(board_name, *bits):
""" Get the IO pins dir state from dev
Args:
board_name: str type , board name.
bits: can be a multi-parameter.
eg: bit8, bit9,bit181 , ...
or
list type .format: ["bitX", "bitX", ...]
X:(1- )
returns:
dict type: format: {'bitX': Y, "bitX":Y, ...}
X: (1- )
Y: 1 or 1
"""
bit_state_dict = OrderedDict()
try:
ioprofile = Profile.get_extendio_by_name(board_name)
bit_state_dict = Extendio.dir_get(ioprofile, bits)
except Exception as e:
logger.error("execute module io io_dir_get error:" + repr(e))
bit_state_dict["error"] = 0
return bit_state_dict
def run(self):
try:
self._run()
except Exception:
logger.error("port = %d , traceback : %s" %
(self._port, traceback.format_exc()))
self.__destruction()
def write(self, dev_addr, data):
""" iis write
Args:
dev_addr(int): iic slave address
data(list): iic write data, length < 65
Returns:
False | True
"""
op_code = dev_addr * 2
send_data = [op_code] + data
send_list = []
for i in range(0, len(send_data)):
send_list.append(send_data[i])
if i == 0:
send_list.append(0x80)
elif i == (len(send_data) - 1):
send_list.append(0x20)
else:
send_list.append(0x00)
receive_list = self._iic_control(send_list)
if receive_list == False:
self.enable()
return False
i = 0
while (i < len(receive_list)):
if (receive_list[i + 1] & 0x01 == 0x01):
logger.error('@%s: receive no ACK' % (self.name))
return False
i = i + 2
return True
def write_bytes(self, data):
""" write byte string data to uart
Args:
data(string) : a string of bytes data
Returns:
on success, return True
on error, return False
"""
if self.get_uart_status() is False:
self._close()
return False
elif self.__is_use is False:
return False
elif self.is_open is False:
self._open()
length = len(data)
logger.debug("write uart %s length:%d" % (self.name, length))
try:
writen_len = self.__ser.write(data)
except Exception as e:
logger.error("write uart %s length:%d error:%s" %
(self.name, length, repr(e)))
return False
if (writen_len != length):
logger.warning(
"write uart device:%s length fail,except length:%s, reality length:%s"
% (self.name, length, writen_len))
return False
return True
def set(device_name, gpio_out):
""" set gpio level
Args:
device_name: str type, device name.
gpio_out(list): the unit of list is (gpio_number,gpio_level)
gpio_number for 0 to 127
set gpio_level to 1, the gpio output high level
set gpio_level to 0, the gpio output low level
Returns:
Success return NONE,
False otherwise.
eg:
Set the gpio2 a value of 0(output):
set("XAI$_GPIO",((2,0),))
Set the gpio2 gpio3 a value of 0(output):
set("XAI$_GPIO",((2,0),(3,0)))
"""
try:
path = Utility.get_dev_path() + '/' + device_name
gpio_device = Axi4Gpio(path)
return gpio_device.gpio_set(gpio_out)
except Exception as e:
logger.error("error: gpio set False:" + repr(e))
return False
def swd_wr_operate(self, swd_req_data, swd_wr_data):
""" swd_wr_operate
Args:
swd_req_data(byte): swd_req_data
swd_wr_data(list): swd_wr_data
Returns:
False | SWD RETURN ACK DATA(byte)
"""
# wr req data
self.__axi4lite.write(0x23, [swd_req_data], 1)
# wr wr_data
self.__axi4lite.write(0x24, swd_wr_data, 4)
# start swd wr operate
self.__axi4lite.write(0x11, [0x01], 1)
# query state
timeout_cnt = 0
rd_data = self.__axi4lite.read(0x14, 1)
while (rd_data[0] == 0x00) and timeout_cnt < 100:
time.sleep(0.001)
rd_data = self.__axi4lite.read(0x14, 1)
timeout_cnt = timeout_cnt + 1
if (timeout_cnt == 100):
logger.error('swd wr operate wait time out\n')
return False
# return ACK data(addr: 0x2C):
rd_data = self.__axi4lite.read(0x2C, 1)
return rd_data[0]
def swd_switch_timing_gen(self, timing_data):
""" swd_switch_timing_gen
Args:
timing_data(list): timing_data, bit order: first_byte_bit0-->bit7,second_byte_bit0-->bit7,...,last_byte_bit0-->bit7
Returns:
False | True
"""
# 0x30--wr switch timing data
self.__axi4lite.write_array(0x30, timing_data, len(timing_data), 8)
# 0x12--bit0 = 1 : start switch timing output
rd_data = self.__axi4lite.read(0x12, 1)
rd_data[0] = rd_data[0] | 0x01
self.__axi4lite.write(0x12, rd_data, 1)
# query state
timeout_cnt = 0
rd_data = self.__axi4lite.read(0x14, 1)
while (rd_data[0] == 0x00) and timeout_cnt < 100:
time.sleep(0.001)
rd_data = self.__axi4lite.read(0x14, 1)
timeout_cnt = timeout_cnt + 1
if (timeout_cnt == 100):
logger.error('swd switch timing wait time out\n')
return False
return True
def uart_param_config(name, baud_rate, data_bits, parity, stop_bits,
timestamp):
""" Set uart bus parameter
Args:
baud_rate(int) : UART baud rate
data_bits(int) : Data width 5/6/7/8
parity_type(str) : parity type. "ODD"/"EVNE"/"NONE"
stop_bits(float) : stop bit width. 1/2
time_insert(str) : PL UART Insert timestamp Control, "TS"/"NONE"
Returns:
bool: True | False, True for success, False for adc read failed
"""
try:
uart = XObject.get_object(name)
isok = True
if utility.mount_on_fpga(uart.name):
uart.disable()
uart.enable()
uart.config(baud_rate, data_bits, parity, stop_bits, timestamp)
else:
isok = uart.config(baud_rate, data_bits, parity, stop_bits)
return isok
except Exception as e:
logger.error("the %s uart param config execute error:%s" %
(name, repr(e)))
return False
def swd_rd_operate(self, swd_req_data):
""" swd_rd_operate
Args:
swd_req_data(byte): swd_req_data
Returns:
False | swd_rd_data(list):
Format, five bytes in total,
the first four bytes are swd rd data,
the last byte is ack data in bit0~bit2, and bit7 is swd rd data parity bit.
"""
# rd req data
self.__axi4lite.write(0x23, [swd_req_data], 1)
# start swd rd operate
self.__axi4lite.write(0x11, [0x01], 1)
# query state
timeout_cnt = 0
rd_data = self.__axi4lite.read(0x14, 1)
while (rd_data[0] == 0x00) and timeout_cnt < 100:
time.sleep(0.001)
rd_data = self.__axi4lite.read(0x14, 1)
timeout_cnt = timeout_cnt + 1
if (timeout_cnt == 100):
logger.error('swd rd operate wait time out\n')
return False
# return rd_data(addr: 0x28~0x2B) + ACK data(addr: 0x2C, [2:0]--ack data, [7]--swd rd data parity bit)
swd_rd_data = self.__axi4lite.read(0x28, 5)
return swd_rd_data
def _gpio_ctrl_set(self, gpio_channel, gpio_ctrl):
if (gpio_channel == 'ch0'):
reg_addr = 0x14
elif (gpio_channel == 'ch1'):
reg_addr = 0x24
elif (gpio_channel == 'ch2'):
reg_addr = 0x34
elif (gpio_channel == 'ch3'):
reg_addr = 0x44
else:
logger.error('@%s: GPIO Channel set error' % (self.name))
return False
rd_data = self.__axi4lite.read(reg_addr, 4)
reg_data_int = self.__data_deal.list_2_int(rd_data)
if (reg_data_int < 0):
reg_data_int = reg_data_int + pow(2, 32)
reg_data_int_shift = reg_data_int
for gpio_ctrl_temp in gpio_ctrl:
reg_data_int_shift = self.__data_deal.cyclic_shift(
'R', reg_data_int_shift, 32, gpio_ctrl_temp[0])
if (gpio_ctrl_temp[1] == 1):
reg_data_int_shift = reg_data_int_shift & 0xFFFFFFFE | 0x00000001
elif (gpio_ctrl_temp[1] == 0):
reg_data_int_shift = reg_data_int_shift & 0xFFFFFFFE
else:
logger.error('@%s: GPIO control set error' % (self.name))
return False
reg_data_int_shift = self.__data_deal.cyclic_shift(
'L', reg_data_int_shift, 32, gpio_ctrl_temp[0])
wr_data = self.__data_deal.int_2_list(reg_data_int_shift, 4)
self.__axi4lite.write(reg_addr, wr_data, len(wr_data))
def _dispatch(self, request):
try:
try:
method = self.get_method(request.method)
except MethodNotFoundError as e:
return request.error_respond(e)
# we found the method
# Does not support args and kwargs at the same time
try:
if request.args:
result = method(*request.args)
elif request.kwargs:
result = method(**request.kwargs)
else:
result = method()
except Exception as e:
# an error occured within the method, return it
return request.error_respond(e)
# respond with result
return request.respond(result)
except Exception as e:
# unexpected error, do not let client know what happened
logger.error(e.message, os.linesep)
return request.error_respond(ServerError(e.message + os.linesep))
def help_handle(params):
buf = "$\r\n-------------------- --------------------$\r\n"
try:
if True == os.path.exists(
os.path.dirname(sys.argv[0]) + "/handles_config.json"):
json_file = '%s/handles_config.json' % (os.path.dirname(
sys.argv[0]))
else:
json_file = '%s/command/handle/handles_config.json' % (
os.environ.get("PYTHON_HOME", "/opt/seeing/app"))
handles_file = open(json_file)
except Exception as e:
logger.error("open handles config file errer !!!")
return
for each_line in handles_file:
line = each_line.strip()
line = line.strip(',')
msg = None
try:
msg = json.loads(line)
except Exception as e:
continue
buf += msg["cmd"]
#目的对其
cmd_len = len(msg["cmd"])
count_t = 3 - int(cmd_len / 8)
for index in range(0, count_t):
buf += "\t"
buf += msg["description"]
buf += "$\r\n"
buf += "-------------------- --------------------$\r\n"
handles_file.close()
return buf
def __open(self):
logger.debug("open i2c device %s" % (self._name))
self._fd = self._bus.sg_i2c_open(self._name)
if self._fd <= 0:
logger.error("open i2c device %s fail" % (self._name))
return False
else:
return True
