def setup(client, services):
# get a connection to the core
conn = services.getConnection()
dev = conn.getDeviceInterfaces().get("Cortex-A9")
ensureDeviceOpen(dev)
ensureDeviceStopped(dev)
writeRegs (dev, [("R13", 0x20030000)])
def setup(client, services):
# get a connection to the core
conn = services.getConnection()
dev = conn.getDeviceInterfaces().get("Cortex-M3")
ensureDeviceOpen(dev)
ensureDeviceStopped(dev)
# The Keil flash algorithms for the STM32 devices change the
# wait state for the flash to 0 cycles - this requires SYSCLK to be <24Mhz
# set the clock mode to use the internal 8MHz clock (HSI)
# Enable HSI
writeToTarget(dev, RCC_CR, intToBytes(0x81))
# use HSI, set prescalers for AHB,APB to 1
rccCfg = intFromBytes(readFromTarget(dev, RCC_CFGR, 4))
# bits 1:0 = 0 for HSI, 13:11 = 0 for PPRE2=1, 10:8 = 0 for PPRE1 = 1, 7:4 = 0 for HPRE = 1
rccCfg = rccCfg & ~(0x3FF3)
writeToTarget(dev, RCC_CFGR, intToBytes(rccCfg))
# clear and disable all clock interrupts
writeToTarget(dev, RCC_CIR, intToBytes(0x00FF0000))
# disable system timer
writeToTarget(dev, SYST_CSR, intToBytes(0))
def setup(self):
# connect to core & stop
self.conn = self.getConnection()
coreName = self.getParameter("coreName")
if coreName is None:
raise FlashProgrammerRuntimeException, "coreName not specified in flash configuration file"
self.dev = self.conn.getDeviceInterfaces().get(coreName)
if self.dev is None:
raise FlashProgrammerRuntimeException, "Cannot find core %s. Please check your flash configuration file" % coreName
self.deviceOpened = ensureDeviceOpen(self.dev)
ensureDeviceStopped(self.dev)
# get properties of working memory
self.ramAddr = int(self.getParameter("ramAddress"), 0)
self.ramSize = int(self.getParameter("ramSize"), 0)
nextAddr = self.ramAddr
# determine code / data layout
# code first
low, high = self.flmReader.getLoadSegmentsAddressRange()
self.algoAddr = self.ramAddr
self.algoLoadOffset = self.algoAddr - low
self.algoSize = high - low
nextAddr += self.algoSize
# working RAM for function execution
self.execWorkingRam = nextAddr
nextAddr += getWorkingRAMRequired()
# then stack
self.stackSize = 0x100
self.stackBottom = nextAddr
self.stackTop = self.stackBottom + self.stackSize - 4
nextAddr += self.stackSize
# remaining memory is write buffer
self.writeBufferAddr = nextAddr
self.writeBufferSize = self.ramAddr - nextAddr + self.ramSize
self.debug("Loading algorithm to %08x [%08x], working RAM: %08x stack: %08x..%08x, writeBuffer: %08x [%08x]" % (
self.algoAddr, self.algoSize,
self.execWorkingRam,
self.stackBottom, self.stackTop,
self.writeBufferAddr, self.writeBufferSize)
)
# load algorithm to target
loadAllCodeSegmentsToTarget(self.dev, self.flmReader, self.algoAddr)
self.staticBase = getStaticBase(self.flmReader, self.algoAddr)
self.pageSize = int(self.getParameter("programPageSize"), 0)
self.clockFrequency = 0
if "clockFrequency" in self.getParameters():
self.clockFrequency = int(self.getParameter("clockFrequency"), 0)