def load(self):
from litex.build.altera import USBBlaster
prog = USBBlaster()
prog.load_bitstream("build/de0nano/gateware/top.sof")
o_CLK=self.cd_sys.clk,
i_ARESET=~rst_n,
i_CLKENA=0x3f,
i_EXTCLKENA=0xf,
i_FBIN=1,
i_PFDENA=1,
i_PLLENA=1,
)
#self.comb += self.cd_sys.clk.eq(clk50)
# Integrate accel core
core = AccelCore(freq=200000000, baud=115200)
self.submodules += core
self.comb += [
core.sck.eq(pads.sclk),
core.mosi.eq(pads.mosi),
pads.miso.eq(core.miso),
core.csn.eq(pads.csn),
led.eq(core.led),
]
platform = qmatech.Platform()
dut = ADXL362(platform)
platform.build(dut)
from litex.build.altera import USBBlaster
prog = USBBlaster()
prog.load_bitstream("build/top.sof")