def get_csr_header(regions, constants, with_access_functions=True):
alignment = constants.get("CONFIG_CSR_ALIGNMENT", 32)
r = generated_banner("//")
if with_access_functions: # FIXME
r += "#include <generated/soc.h>\n"
r += "#ifndef __GENERATED_CSR_H\n#define __GENERATED_CSR_H\n"
if with_access_functions:
r += "#include <stdint.h>\n"
r += "#ifdef CSR_ACCESSORS_DEFINED\n"
r += "extern void csr_write_simple(unsigned long v, unsigned long a);\n"
r += "extern unsigned long csr_read_simple(unsigned long a);\n"
r += "#else /* ! CSR_ACCESSORS_DEFINED */\n"
r += "#include <hw/common.h>\n"
r += "#endif /* ! CSR_ACCESSORS_DEFINED */\n"
for name, region in regions.items():
origin = region.origin
r += "\n/* "+name+" */\n"
r += "#define CSR_"+name.upper()+"_BASE "+hex(origin)+"L\n"
if not isinstance(region.obj, Memory):
for csr in region.obj:
nr = (csr.size + region.busword - 1)//region.busword
r += _get_rw_functions_c(name + "_" + csr.name, origin, nr, region.busword, alignment,
isinstance(csr, CSRStatus), with_access_functions)
origin += alignment//8*nr
if hasattr(csr, "fields"):
for field in csr.fields.fields:
r += "#define CSR_"+name.upper()+"_"+csr.name.upper()+"_"+field.name.upper()+"_OFFSET "+str(field.offset)+"\n"
r += "#define CSR_"+name.upper()+"_"+csr.name.upper()+"_"+field.name.upper()+"_SIZE "+str(field.size)+"\n"
r += "\n#endif\n"
return r
def get_csr_header(regions, constants, csr_base=None, with_access_functions=True):
alignment = constants.get("CONFIG_CSR_ALIGNMENT", 32)
r = generated_banner("//")
if with_access_functions: # FIXME
r += "#include <generated/soc.h>\n"
r += "#ifndef __GENERATED_CSR_H\n#define __GENERATED_CSR_H\n"
if with_access_functions:
r += "#include <stdint.h>\n"
r += "#include <system.h>\n"
r += "#ifndef CSR_ACCESSORS_DEFINED\n"
r += "#include <hw/common.h>\n"
r += "#endif /* ! CSR_ACCESSORS_DEFINED */\n"
csr_base = csr_base if csr_base is not None else regions[next(iter(regions))].origin
r += "#ifndef CSR_BASE\n"
r += "#define CSR_BASE {}L\n".format(hex(csr_base))
r += "#endif\n"
for name, region in regions.items():
origin = region.origin - csr_base
r += "\n/* "+name+" */\n"
r += "#define CSR_"+name.upper()+"_BASE (CSR_BASE + "+hex(origin)+"L)\n"
if not isinstance(region.obj, Memory):
for csr in region.obj:
nr = (csr.size + region.busword - 1)//region.busword
r += _get_rw_functions_c(name + "_" + csr.name, origin, nr, region.busword, alignment,
isinstance(csr, CSRStatus), with_access_functions)
origin += alignment//8*nr
if hasattr(csr, "fields"):
for field in csr.fields.fields:
r += "#define CSR_"+name.upper()+"_"+csr.name.upper()+"_"+field.name.upper()+"_OFFSET "+str(field.offset)+"\n"
r += "#define CSR_"+name.upper()+"_"+csr.name.upper()+"_"+field.name.upper()+"_SIZE "+str(field.size)+"\n"
r += "\n#endif\n"
return r
def get_git_header():
from litex.build.tools import get_litex_git_revision
r = generated_banner("//")
r += "#ifndef __GENERATED_GIT_H\n#define __GENERATED_GIT_H\n\n"
r += f"#define LITEX_GIT_SHA1 \"{get_litex_git_revision()}\"\n"
r += "#endif\n"
return r
def get_git_header(jinja_env):
from litex.build.tools import get_migen_git_revision, get_litex_git_revision
return jinja_env.get_template("git.h.jinja").render(
generated_banner=generated_banner("//"),
migen_git_revision=get_migen_git_revision(),
litex_git_revision=get_litex_git_revision()
)
def get_soc_header(constants, with_access_functions=True):
r = generated_banner("//")
r += "#ifndef __GENERATED_SOC_H\n#define __GENERATED_SOC_H\n"
funcs = ""
for name, value in constants.items():
if value is None:
r += "#define " + name + "\n"
continue
if isinstance(value, str):
value = "\"" + value + "\""
ctype = "const char *"
else:
value = str(value)
ctype = "int"
r += "#define " + name + " " + value + "\n"
if with_access_functions:
funcs += "static inline " + ctype + " " + name.lower(
) + "_read(void) {\n"
funcs += "\treturn " + value + ";\n}\n"
if with_access_functions:
r += "\n#ifndef __ASSEMBLER__\n"
r += funcs
r += "#endif // !__ASSEMBLER__\n"
r += "\n#endif\n"
return r
def get_csr_header(regions,
constants,
csr_base=None,
with_access_functions=True):
alignment = constants.get("CONFIG_CSR_ALIGNMENT", 32)
r = generated_banner("//")
if with_access_functions: # FIXME
r += "#include <generated/soc.h>\n"
r += "#ifndef __GENERATED_CSR_H\n#define __GENERATED_CSR_H\n"
if with_access_functions:
r += "#include <stdint.h>\n"
r += "#include <system.h>\n"
r += "#ifndef CSR_ACCESSORS_DEFINED\n"
r += "#include <hw/common.h>\n"
r += "#endif /* ! CSR_ACCESSORS_DEFINED */\n"
csr_base = csr_base if csr_base is not None else regions[next(
iter(regions))].origin
r += "#ifndef CSR_BASE\n"
r += f"#define CSR_BASE {hex(csr_base)}L\n"
r += "#endif\n"
for name, region in regions.items():
origin = region.origin - csr_base
r += "\n/* " + name + " */\n"
r += f"#define CSR_{name.upper()}_BASE (CSR_BASE + {hex(origin)}L)\n"
if not isinstance(region.obj, Memory):
for csr in region.obj:
nr = (csr.size + region.busword - 1) // region.busword
r += _get_rw_functions_c(name + "_" + csr.name, origin, nr,
region.busword, alignment,
getattr(csr, "read_only",
False), with_access_functions)
origin += alignment // 8 * nr
if hasattr(csr, "fields"):
for field in csr.fields.fields:
offset = str(field.offset)
size = str(field.size)
r += f"#define CSR_{name.upper()}_{csr.name.upper()}_{field.name.upper()}_OFFSET {offset}\n"
r += f"#define CSR_{name.upper()}_{csr.name.upper()}_{field.name.upper()}_SIZE {size}\n"
if with_access_functions and csr.size <= 32: # FIXME: Implement extract/read functions for csr.size > 32-bit.
reg_name = name + "_" + csr.name.lower()
field_name = reg_name + "_" + field.name.lower()
r += "static inline uint32_t " + field_name + "_extract(uint32_t oldword) {\n"
r += "\tuint32_t mask = ((1 << " + size + ")-1);\n"
r += "\treturn ( (oldword >> " + offset + ") & mask );\n}\n"
r += "static inline uint32_t " + field_name + "_read(void) {\n"
r += "\tuint32_t word = " + reg_name + "_read();\n"
r += "\treturn " + field_name + "_extract(word);\n"
r += "}\n"
if not getattr(csr, "read_only", False):
r += "static inline uint32_t " + field_name + "_replace(uint32_t oldword, uint32_t plain_value) {\n"
r += "\tuint32_t mask = ((1 << " + size + ")-1);\n"
r += "\treturn (oldword & (~(mask << " + offset + "))) | (mask & plain_value)<< " + offset + " ;\n}\n"
r += "static inline void " + field_name + "_write(uint32_t plain_value) {\n"
r += "\tuint32_t oldword = " + reg_name + "_read();\n"
r += "\tuint32_t newword = " + field_name + "_replace(oldword, plain_value);\n"
r += "\t" + reg_name + "_write(newword);\n"
r += "}\n"
r += "\n#endif\n"
return r
def get_csr_csv(csr_regions=None, constants=None, memory_regions=None):
alignment = 32 if constants is None else get_constant(
"CONFIG_CSR_ALIGNMENT", constants)
r = generated_banner("#")
if csr_regions is not None:
for name, origin, busword, obj in csr_regions:
r += "csr_base,{},0x{:08x},,\n".format(name, origin)
for name, origin, busword, obj in csr_regions:
if not isinstance(obj, Memory):
for csr in obj:
nr = (csr.size + busword - 1) // busword
r += "csr_register,{}_{},0x{:08x},{},{}\n".format(
name, csr.name, origin, nr,
"ro" if isinstance(csr, CSRStatus) else "rw")
origin += alignment // 8 * nr
if constants is not None:
for name, value in constants:
r += "constant,{},{},,\n".format(name.lower(), value)
if memory_regions is not None:
for name, origin, length in memory_regions:
r += "memory_region,{},0x{:08x},{:d},\n".format(
name.lower(), origin, length)
return r
def get_mem_header(regions):
r = generated_banner("//")
r += "#ifndef __GENERATED_MEM_H\n#define __GENERATED_MEM_H\n\n"
for name, region in regions.items():
r += "#define {name}_BASE 0x{base:08x}L\n#define {name}_SIZE 0x{size:08x}\n\n".format(
name=name.upper(), base=region.origin, size=region.length)
r += "#endif\n"
return r
def get_csr_header(jinja_env, regions, constants, csr_base=None, with_access_functions=True):
return jinja_env.get_template("csr.h.jinja").render(
alignment=constants.get("CONFIG_CSR_ALIGNMENT", 32),
generated_banner=generated_banner("//"),
with_access_functions=with_access_functions,
csr_base=csr_base if csr_base is not None else regions[next(iter(regions))].origin,
regions=regions
)
def get_i2c_header(i2c_init_values):
i2c_devs, i2c_init = i2c_init_values
r = generated_banner("//")
r += "#ifndef __GENERATED_I2C_H\n#define __GENERATED_I2C_H\n\n"
r += "#include <libbase/i2c.h>\n\n"
r += "#define I2C_DEVS_COUNT {}\n\n".format(len(i2c_devs))
devs = {}
default_dev = 0
r += "struct i2c_dev i2c_devs[{}] = {{\n".format(len(i2c_devs))
for i, (name, is_default) in enumerate(sorted(i2c_devs)):
devs[name] = i
if is_default:
default_dev = i
r += "\t{\n"
r += "\t\t.ops.write = {}_w_write,\n".format(name)
r += "\t\t.ops.read = {}_r_read,\n".format(name)
r += "\t\t.ops.w_scl_offset = CSR_{}_W_SCL_OFFSET,\n".format(name.upper())
r += "\t\t.ops.w_sda_offset = CSR_{}_W_SDA_OFFSET,\n".format(name.upper())
r += "\t\t.ops.w_oe_offset = CSR_{}_W_OE_OFFSET,\n".format(name.upper())
r += "\t\t.name = \"{}\"\n".format(name)
r += "\t},\n"
r += "};\n\n"
r += "#define DEFAULT_I2C_DEV {}\n\n".format(default_dev)
if i2c_init:
r += "struct i2c_cmds {\n"
r += "\tint dev;\n"
r += "\tuint32_t *init_table;\n"
r += "\tint nb_cmds;\n"
r += "\tint addr_len;\n"
r += "\tint i2c_addr;\n"
r += "};\n"
r += "\n#define I2C_INIT\n"
r += "#define I2C_INIT_CNT {}\n\n".format(len(i2c_init))
for i, (name, i2c_addr, table, _) in enumerate(i2c_init):
r += "uint32_t {}_{}_{}_init_table[{}] = {{\n".format(name, hex(i2c_addr), i, len(table) * 2)
for addr, data in table:
r += "\t0x{:04X}, 0x{:02X},\n".format(addr, data)
r += "};\n"
r += "static struct i2c_cmds i2c_init[I2C_INIT_CNT] = {\n"
for i, (name, i2c_addr, table, addr_len) in enumerate(i2c_init):
r += "\t{\n"
r += "\t\t.dev = {},\n".format(devs[name])
r += "\t\t.init_table = {}_{}_{}_init_table,\n".format(name, hex(i2c_addr), i)
r += "\t\t.nb_cmds = {},\n".format(len(table))
r += "\t\t.i2c_addr = {},\n".format(hex(i2c_addr))
r += "\t\t.addr_len = {},\n".format(addr_len)
r += "\t},\n"
r += "};\n"
r += "\n#endif\n"
return r
def get_mem_header(regions, flash_boot_address, shadow_base):
r = generated_banner("//")
r += "#ifndef __GENERATED_MEM_H\n#define __GENERATED_MEM_H\n\n"
for name, base, size in regions:
r += "#define {name}_BASE 0x{base:08x}L\n#define {name}_SIZE 0x{size:08x}\n\n".format(name=name.upper(), base=base, size=size)
if flash_boot_address is not None:
r += "#define FLASH_BOOT_ADDRESS 0x{:08x}L\n\n".format(flash_boot_address)
if shadow_base is not None:
r += "#define SHADOW_BASE 0x{:08x}L\n\n".format(shadow_base)
r += "#endif\n"
return r
def get_csr_header(regions,
constants,
with_access_functions=True,
with_shadow_base=True,
shadow_base=0x80000000):
r = generated_banner("//")
r += "#ifndef __GENERATED_CSR_H\n#define __GENERATED_CSR_H\n"
if with_access_functions:
r += "#include <stdint.h>\n"
r += "#ifdef CSR_ACCESSORS_DEFINED\n"
r += "extern void csr_writeb(uint8_t value, unsigned long addr);\n"
r += "extern uint8_t csr_readb(unsigned long addr);\n"
r += "extern void csr_writew(uint16_t value, unsigned long addr);\n"
r += "extern uint16_t csr_readw(unsigned long addr);\n"
r += "extern void csr_writel(uint32_t value, unsigned long addr);\n"
r += "extern uint32_t csr_readl(unsigned long addr);\n"
r += "#else /* ! CSR_ACCESSORS_DEFINED */\n"
r += "#include <hw/common.h>\n"
r += "#endif /* ! CSR_ACCESSORS_DEFINED */\n"
for name, origin, busword, obj in regions:
if not with_shadow_base:
origin &= (~shadow_base)
if isinstance(obj, Memory):
r += "\n/* " + name + " */\n"
r += "#define CSR_" + name.upper() + "_BASE " + hex(origin) + "L\n"
else:
r += "\n/* " + name + " */\n"
r += "#define CSR_" + name.upper() + "_BASE " + hex(origin) + "L\n"
for csr in obj:
nr = (csr.size + busword - 1) // busword
r += _get_rw_functions_c(name + "_" + csr.name, origin, nr,
busword, isinstance(csr, CSRStatus),
with_access_functions)
origin += 4 * nr
r += "\n/* constants */\n"
for name, value in constants:
if value is None:
r += "#define " + name + "\n"
continue
if isinstance(value, str):
value = "\"" + value + "\""
ctype = "const char *"
else:
value = str(value)
ctype = "int"
r += "#define " + name + " " + value + "\n"
if with_access_functions:
r += "static inline " + ctype + " " + name.lower(
) + "_read(void) {\n"
r += "\treturn " + value + ";\n}\n"
r += "\n#endif\n"
return r
def get_csr_header_split(regions, constants, csr_base=None, with_access_functions=True):
alignment = constants.get("CONFIG_CSR_ALIGNMENT", 32)
ar = dict()
for name, region in regions.items():
r = generated_banner("//")
r += "#ifndef __GENERATED_{}_CSR_H\n#define __GENERATED_{}_CSR_H\n".format(name.upper(), name.upper())
csr_base = csr_base if csr_base is not None else regions[next(iter(regions))].origin
origin = region.origin - csr_base
r += "\n/* "+name+" */\n"
r += "#ifndef CSR_BASE\n"
r += "#define CSR_BASE {}L\n".format(hex(csr_base))
r += "#endif\n"
r += "#ifndef CSR_"+name.upper()+"_BASE\n"
r += "#define CSR_"+name.upper()+"_BASE (CSR_BASE + "+hex(origin)+"L)\n"
if not isinstance(region.obj, Memory):
for csr in region.obj:
nr = (csr.size + region.busword - 1)//region.busword
r += _get_rw_functions_c(name, csr.name, origin, region.origin - csr_base, nr, region.busword, alignment,
getattr(csr, "read_only", False), with_access_functions)
origin += alignment//8*nr
if hasattr(csr, "fields"):
for field in csr.fields.fields:
offset = str(field.offset)
size = str(field.size)
r += "#define CSR_"+name.upper()+"_"+csr.name.upper()+"_"+field.name.upper()+"_OFFSET "+offset+"\n"
r += "#define CSR_"+name.upper()+"_"+csr.name.upper()+"_"+field.name.upper()+"_SIZE "+size+"\n"
if with_access_functions and csr.size <= 32: # FIXME: Implement extract/read functions for csr.size > 32-bit.
reg_name = name + "_" + csr.name.lower()
field_name = reg_name + "_" + field.name.lower()
r += "static inline uint32_t " + field_name + "_extract(struct sbusfpga_" + name + "_softc *sc, uint32_t oldword) {\n"
r += "\tuint32_t mask = ((1 << " + size + ")-1);\n"
r += "\treturn ( (oldword >> " + offset + ") & mask );\n}\n"
r += "static inline uint32_t " + field_name + "_read(struct sbusfpga_" + name + "_softc *sc) {\n"
r += "\tuint32_t word = " + reg_name + "_read(sc);\n"
r += "\treturn " + field_name + "_extract(sc, word);\n"
r += "}\n"
if not getattr(csr, "read_only", False):
r += "static inline uint32_t " + field_name + "_replace(struct sbusfpga_" + name + "_softc *sc, uint32_t oldword, uint32_t plain_value) {\n"
r += "\tuint32_t mask = ((1 << " + size + ")-1);\n"
r += "\treturn (oldword & (~(mask << " + offset + "))) | (mask & plain_value)<< " + offset + " ;\n}\n"
r += "static inline void " + field_name + "_write(struct sbusfpga_" + name + "_softc *sc, uint32_t plain_value) {\n"
r += "\tuint32_t oldword = " + reg_name + "_read(sc);\n"
r += "\tuint32_t newword = " + field_name + "_replace(sc, oldword, plain_value);\n"
r += "\t" + reg_name + "_write(sc, newword);\n"
r += "}\n"
r += "#endif // CSR_"+name.upper()+"_BASE\n"
r += "\n#endif\n"
ar[name] = r
return ar
def get_csr_csv(csr_regions=[], constants=[], memory_regions=[]):
d = json.loads(get_csr_json(csr_regions, constants, memory_regions))
r = generated_banner("#")
for name, value in d["csr_bases"].items():
r += "csr_base,{},0x{:08x},,\n".format(name, value)
for name in d["csr_registers"].keys():
r += "csr_register,{},0x{:08x},{},{}\n".format(
name, d["csr_registers"][name]["addr"],
d["csr_registers"][name]["size"], d["csr_registers"][name]["type"])
for name, value in d["constants"].items():
r += "constant,{},{},,\n".format(name, value)
for name in d["memories"].keys():
r += "memory_region,{},0x{:08x},{:d},\n".format(
name, d["memories"][name]["base"], d["memories"][name]["size"])
return r
def get_mem_header(regions):
r = generated_banner("//")
r += "#ifndef __GENERATED_MEM_H\n#define __GENERATED_MEM_H\n\n"
for name, region in regions.items():
r += f"#ifndef {name.upper()}_BASE\n"
r += f"#define {name.upper()}_BASE 0x{region.origin:08x}L\n"
r += f"#define {name.upper()}_SIZE 0x{region.length:08x}\n"
r += "#endif\n\n"
r += "#ifndef MEM_REGIONS\n"
r += "#define MEM_REGIONS \""
for name, region in regions.items():
r += f"{name.upper()} {' '*(8-len(name))} 0x{region.origin:08x} 0x{region.size:x} \\n"
r = r[:-2]
r += "\"\n"
r += "#endif\n"
r += "#endif\n"
return r
def get_soc_header(jinja_env, constants, with_access_functions=True):
return jinja_env.get_template("soc.h.jinja").render(
generated_banner=generated_banner("//"),
constants=constants
)
def convert(f,
ios=None,
name="top",
special_overrides=dict(),
attr_translate=DummyAttrTranslate(),
create_clock_domains=True,
display_run=False,
reg_initialization=True,
dummy_signal=True,
blocking_assign=False,
regular_comb=True):
r = ConvOutput()
if not isinstance(f, _Fragment):
f = f.get_fragment()
if ios is None:
ios = set()
for cd_name in sorted(list_clock_domains(f)):
try:
f.clock_domains[cd_name]
except KeyError:
if create_clock_domains:
cd = ClockDomain(cd_name)
f.clock_domains.append(cd)
ios |= {cd.clk, cd.rst}
else:
msg = f"""Unresolved clock domain {cd_name}, availables:\n"""
for f in f.clock_domains:
msg += f"- {f.name}\n"
raise Exception(msg)
f = lower_complex_slices(f)
insert_resets(f)
f = lower_basics(f)
f, lowered_specials = lower_specials(special_overrides, f)
f = lower_basics(f)
for io in sorted(ios, key=lambda x: x.duid):
if io.name_override is None:
io_name = io.backtrace[-1][0]
if io_name:
io.name_override = io_name
ns = build_namespace(list_signals(f) \
| list_special_ios(f, True, True, True) \
| ios, _reserved_keywords)
ns.clock_domains = f.clock_domains
r.ns = ns
src = generated_banner("//")
src += _printheader(f,
ios,
name,
ns,
attr_translate,
reg_initialization=reg_initialization)
if regular_comb:
src += _printcomb_regular(f, ns, blocking_assign=blocking_assign)
else:
src += _printcomb_simulation(f,
ns,
display_run=display_run,
dummy_signal=dummy_signal,
blocking_assign=blocking_assign)
src += _printsync(f, ns)
src += _printspecials(special_overrides, f.specials - lowered_specials, ns,
r.add_data_file, attr_translate)
src += "endmodule\n"
r.set_main_source(src)
return r
def get_mem_header(jinja_env, regions):
return jinja_env.get_template("mem.h.jinja").render(
generated_banner=generated_banner("//"),
regions=regions
)
def convert(f,
ios=set(),
name="top",
platform=None,
special_overrides=dict(),
attr_translate=DummyAttrTranslate(),
regular_comb=True):
# Create ConvOutput.
r = ConvOutput()
# Convert to FHDL's fragments is not already done.
if not isinstance(f, _Fragment):
f = f.get_fragment()
# Verify/Create Clock Domains.
for cd_name in sorted(list_clock_domains(f)):
# Try to get Clock Domain.
try:
f.clock_domains[cd_name]
# If not found, raise Error.
except:
msg = f"""Unresolved clock domain {cd_name}, availables:\n"""
for f in f.clock_domains:
msg += f"- {f.name}\n"
raise Exception(msg)
# Lower complex slices.
f = lower_complex_slices(f)
# Insert resets.
insert_resets(f)
# Lower basics.
f = lower_basics(f)
# Lower specials.
if platform is not None:
for s in f.specials:
s.platform = platform
f, lowered_specials = lower_specials(special_overrides, f)
# Lower basics (for basics included in specials).
f = lower_basics(f)
# IOs collection (when not specified).
if len(ios) == 0:
assert platform is not None
ios = platform.constraint_manager.get_io_signals()
# IOs backtrace/naming.
for io in sorted(ios, key=lambda x: x.duid):
if io.name_override is None:
io_name = io.backtrace[-1][0]
if io_name:
io.name_override = io_name
# Build NameSpace.
# ----------------
ns = build_namespace(
signals=(list_signals(f)
| list_special_ios(f, ins=True, outs=True, inouts=True)
| ios),
reserved_keywords=_ieee_1800_2017_verilog_reserved_keywords)
ns.clock_domains = f.clock_domains
# Build Verilog.
# --------------
verilog = generated_banner("//")
# Module Top.
verilog += _print_module(f, ios, name, ns, attr_translate)
# Combinatorial Logic.
if regular_comb:
verilog += _print_combinatorial_logic_synth(f, ns)
else:
verilog += _print_combinatorial_logic_sim(f, ns)
# Synchronous Logic.
verilog += _print_synchronous_logic(f, ns)
# Specials
verilog += _print_specials(special_overrides,
f.specials - lowered_specials, ns,
r.add_data_file, attr_translate)
# Module End.
verilog += "endmodule\n"
r.set_main_source(verilog)
r.ns = ns
return r
def get_csr_header(regions,
constants,
with_access_functions=True,
with_shadow_base=True,
shadow_base=0x80000000):
alignment = constants.get("CONFIG_CSR_ALIGNMENT", 32)
r = generated_banner("//")
r += "#ifndef __GENERATED_CSR_H\n#define __GENERATED_CSR_H\n"
if with_access_functions:
r += "#include <stdint.h>\n"
r += "#ifdef CSR_ACCESSORS_DEFINED\n"
r += "extern void csr_writeb(uint8_t value, unsigned long addr);\n"
r += "extern uint8_t csr_readb(unsigned long addr);\n"
r += "extern void csr_writew(uint16_t value, unsigned long addr);\n"
r += "extern uint16_t csr_readw(unsigned long addr);\n"
r += "extern void csr_writel(uint32_t value, unsigned long addr);\n"
r += "extern uint32_t csr_readl(unsigned long addr);\n"
r += "#else /* ! CSR_ACCESSORS_DEFINED */\n"
r += "#include <hw/common.h>\n"
r += "#endif /* ! CSR_ACCESSORS_DEFINED */\n"
for name, region in regions.items():
origin = region.origin
if not with_shadow_base:
origin &= (~shadow_base)
r += "\n/* " + name + " */\n"
r += "#define CSR_" + name.upper() + "_BASE " + hex(origin) + "L\n"
if not isinstance(region.obj, Memory):
for csr in region.obj:
nr = (csr.size + region.busword - 1) // region.busword
r += _get_rw_functions_c(name + "_" + csr.name, origin, nr,
region.busword, alignment,
isinstance(csr, CSRStatus),
with_access_functions)
origin += alignment // 8 * nr
if hasattr(csr, "fields"):
for field in csr.fields.fields:
r += "#define CSR_" + name.upper(
) + "_" + csr.name.upper() + "_" + field.name.upper(
) + "_OFFSET " + str(field.offset) + "\n"
r += "#define CSR_" + name.upper(
) + "_" + csr.name.upper() + "_" + field.name.upper(
) + "_SIZE " + str(field.size) + "\n"
r += "\n/* constants */\n"
for name, value in constants.items():
if value is None:
r += "#define " + name + "\n"
continue
if isinstance(value, str):
value = "\"" + value + "\""
ctype = "const char *"
else:
value = str(value)
ctype = "int"
r += "#define " + name + " " + value + "\n"
if with_access_functions:
r += "static inline " + ctype + " " + name.lower(
) + "_read(void) {\n"
r += "\treturn " + value + ";\n}\n"
r += "\n#endif\n"
return r