def ind(cpu, arg1, arg2):
int addrLSB = arg1 + (arg2 << 8)
int addrMSB = ((arg1 + 1) & 0xFF) + (arg2 << 8)
cpu.PC += 3
return memory.read(addrLSB) + (memory.read(addrMSB) << 8)
def abx(cpu, arg1, arg2):
return memory.read(ABX(cpu,arg1,arg2))
def aby(cpu, arg1, arg2):
return memory.read(ABY(cpu,arg1,arg2))
def zpy(cpu, arg1, arg2):
return memory.read(ZPY(cpu,arg1,arg2))
def abt(cpu, arg1, arg2):
return memory.read(ABS(cpu,arg1,arg2))
def INY(cpu, arg1, arg2):
indirectAddress = memory.read(arg1) + (memory.read((arg1 + 1) & 0xFF) << 8)
cpu.cycles += pageBoundaryCycles(indirectAddress, cpu.Y)
cpu.PC += 2
return (indirectAddress + cpu.Y) & 0xFFFF
def RLA(cpu, value):
ROL(cpu, value)
AND(cpu, memory.read(value))
def BRK(cpu, value):
vector = memory.read(VECTOR_BRK) + memory.read(VECTOR_BRK+1)<<8
processInterrupt(cpu,vector)
def condRead(cpu, addr):
if addr is -1:
return cpu.A
return memory.read(addr)
def DCP(cpu, value):
modMemory(cpu, value, -1)
compareWithRegister(cpu, memory.read(value), cpu.A)
def ISB(cpu, value):
INC(cpu, value)
SBC(cpu, memory.read(value))
def modMemory(cpu, address, dVal):
value = memory.read(address)
value += dVal
memory.write(address, value)
cpu.setNZ(value)
def popFromStack(cpu):
cpu.S += 1
return memory.read(0x100 | (cpu.S & 0xFF))
def SRE(cpu, value):
LSR(cpu, value)
EOR(cpu, memory.read(value))
def INX(cpu, arg1, arg2):
zpAddr = (arg1 + cpu.X) & 0xFF
indirectAddress = memory.read(zpAddress) + (memory.read((zpAddress + 1) & 0xFF) << 8)
cpu.PC += 2
return indirectAddress
def zp(cpu, arg1, arg2):
return memory.read(arg1)
def inx(cpu, arg1, arg2):
return memory.read(INX(cpu,arg1,arg2))
def zpx(cpu, arg1, arg2):
return memory.read(ZPX(cpu,arg1,arg2))
def iny(cpu, arg1, arg2):
return memory.read(INY(cpu,arg1,arg2))
def SLO(cpu, value):
ASL(cpu, value)
ORA(cpu, memory.read(value))
