def test_not_load_int_address_not_multiple_4_bytes(self):
mem = Memory()
with pytest.raises(MemoryException):
mem.load(1)
mem.load(2)
mem.load(3)
def __read_string(self, address, memory: Memory, pc, logger):
string = ""
if address % 4 != 0:
relative = address % 4
relative_address = address - relative
word = memory.load(relative_address)
word = Int2Bits.convert(word.data)
word_relative_data = word[:-8 * relative]
for x in range(len(word_relative_data), 0, -8):
char = Bin2Chr.convert(word_relative_data[x - 8:x])
string += char
address = relative_address + 4
word = memory.load(address=address)
d = Int2Bits.convert(word.data)
while True:
for x in range(len(d), 0, -8):
char = Bin2Chr.convert(d[x - 8:x])
if char == '\0':
return string
else:
string += char
if address % 4 == 0:
address = address + 4
else:
address = address + (4 - (address % 4))
word = memory.load(address=address)
d = Int2Bits.convert(word.data)
def execute(self, registers: Registers, program_counter, memory: Memory,
*args, **kwargs):
local_registers = registers
local_memory = memory
local_co_registers = kwargs['coprocessor'].registers
rs_register = local_registers.get_register(self.rs_number)
rt_register = local_registers.get_register(self.rt_number)
immediate_value = self.imediate
new_pc = program_counter
if rs_register.to_signed_int() == rt_register.to_signed_int():
new_pc = new_pc + immediate_value * 4
branch_delayed_word = memory.load(program_counter + 4)
branch_delayed_instruction = kwargs['instruction_factory'].factory(
branch_delayed_word)
delayed_registers, delayed_pc, delayed_memory, coproc = branch_delayed_instruction.execute(
registers=local_registers,
program_counter=program_counter + 4,
memory=memory,
*args,
**kwargs)
local_registers = delayed_registers
local_memory = delayed_memory
local_co_registers = coproc
return local_registers, new_pc + 4, local_memory, local_co_registers
def execute(self, registers: Registers, coprocessor: COProcessor,
program_counter, memory: Memory, *args, **kwargs):
local_co_registers = coprocessor.registers
local_registers = registers
local_memory = memory
offset = self.offset
cc_register = local_co_registers.get_cc()
cc_value = cc_register.to_unsigned_int()
new_pc = program_counter
if cc_value == int(self.ft):
new_pc = new_pc + offset * 4
branch_delayed_word = memory.load(program_counter + 4)
kwargs['logger'].trace(
f"I {hex(program_counter)} (line# {hex(program_counter + 4)})")
branch_delayed_instruction = kwargs['instruction_factory'].factory(
branch_delayed_word)
delayed_registers, delayed_pc, delayed_memory, coproc = branch_delayed_instruction.execute(
registers=local_registers,
program_counter=program_counter + 4,
memory=memory,
coprocessor=coprocessor,
*args,
**kwargs)
local_registers = delayed_registers
local_co_registers = coproc
local_memory = delayed_memory
return local_registers, new_pc + 4, local_memory, local_co_registers
class MemoryController:
def __init__(self, mem_mode):
self.mem_mode = mem_mode
self.memory = Memory()
self.l1 = L1Cache(size=1024, mapping='direct')
self.l1d = L1DCache(size=512)
self.l1i = L1ICache(size=512)
self.l2 = L2Cache(size=2048)
self.mem_config = {
1: {
"levels": 1,
"mapping": DirectMapping(),
"policy": RandomAccess()
},
2: {
"levels": 1,
""
}
}
def load(self, address):
if self.mem_mode == 1:
return self.memory.load(address)
def store(self, address, data):
if self.mem_mode == 1:
return self.memory.store(address, data)
def test_get_opcode(self):
mem = Memory()
add_immediate_hex = 0x21490001
add_immediate_bin = bin(int(add_immediate_hex))[2:].zfill(32)
mem.store(mem.TEXT_SECTION_START, add_immediate_bin)
op_code = mem.load(mem.TEXT_SECTION_START).get_opcode()
assert len(op_code) == 6
def execute(self, registers: Registers, program_counter, memory: Memory,
*args, **kwargs):
local_registers = registers
immediate_value = self.imediate
rs_register = local_registers.get_register(self.rs_number)
rs_address = rs_register.get_data()
word = memory.load(rs_address + immediate_value).data
local_registers.set_register_value(self.rt_number, word)
return local_registers, program_counter + 4, memory, kwargs[
'coprocessor'].registers
def execute(self, registers: Registers, coprocessor: COProcessor,
program_counter, memory: Memory, *args, **kwargs):
local_co_registers = coprocessor.registers
local_registers = registers
rs_number = self.base
rs_register = local_registers.get_register(rs_number)
rs_address = rs_register.get_data_unsigned()
offset = self.offset
word1 = memory.load(rs_address + offset).data
word2 = memory.load(rs_address + offset + 4).data
kwargs['logger'].trace(
f"R {hex(program_counter)} (line# {hex(rs_address + offset)})")
kwargs['logger'].trace(
f"R {hex(program_counter)} (line# {hex(rs_address + offset + 4)})")
local_co_registers.set_register_value(self.ft_number, word1)
local_co_registers.set_register_value(self.ft_number + 1, word2)
return local_registers, program_counter + 4, memory, local_co_registers
def execute(self,
registers: Registers,
program_counter,
memory: Memory,
*args,
**kwargs):
new_pc = (self.jump_address * 4)
branch_delayed_word = memory.load(program_counter + 4)
branch_delayed_instruction = kwargs['instruction_factory'].factory(branch_delayed_word)
delayed_registers, delayed_pc, delayed_memory, coproc = branch_delayed_instruction.execute(registers=registers, program_counter=program_counter + 4, memory=memory, *args, **kwargs)
return delayed_registers, new_pc, delayed_memory, kwargs['coprocessor'].registers
def execute(self, registers: Registers, program_counter, memory: Memory,
*args, **kwargs):
local_registers = registers
immediate_value = self.imediate
rs_register = local_registers.get_register(self.rs_number)
rs_address = rs_register.get_data_unsigned()
word = memory.load(rs_address + immediate_value * 4)
word = (((1 << 16) - 1) & (word >> (0)))
word = TwoComp.two_complement(word, 16)
local_registers.set_register_value(self.rt_number, word)
return local_registers, program_counter + 4, memory, kwargs[
'coprocessor'].registers
def execute(self, registers: Registers, program_counter, memory: Memory,
*args, **kwargs):
rs_register = registers.get_register(self.rs_number)
new_pc = rs_register.to_unsigned_int()
branch_delayed_word = memory.load(program_counter + 4)
branch_delayed_instruction = kwargs['instruction_factory'].factory(
branch_delayed_word)
delayed_registers, delayed_pc, delayed_memory, coproc = branch_delayed_instruction.execute(
registers=registers,
program_counter=program_counter + 4,
memory=memory,
*args,
**kwargs)
return delayed_registers, new_pc, delayed_memory, kwargs[
'coprocessor'].registers
def test_is_syscall(self):
mem = Memory()
syscall_hex = 0x0000000c
syscall_bin = bin(int(syscall_hex))[2:].zfill(32)
mem.store(mem.TEXT_SECTION_START, syscall_bin)
assert mem.load(mem.TEXT_SECTION_START).is_syscall()
def test_load_in_address_multiple_4_bytes(self):
mem = Memory()
for x in range(0, 64, 4):
data = mem.load(x)
assert isinstance(data, Word)