def driver_coroutine():
from naps import axil_read, axil_write
conn, child_conn = Pipe()
p = Process(target=driver_process, args=(child_conn, ))
p.start()
while True:
if not conn.closed:
data = conn.recv()
assert isinstance(data, tuple), data
cmd, *rest = data
if cmd == "exit":
conn.close()
p.join()
yield Passive()
elif cmd == "read":
address, = rest
result = (yield from axil_read(self.axi_lite_master,
address))
conn.send(result)
elif cmd == "write":
address, data = rest
yield from axil_write(self.axi_lite_master, address,
data)
elif cmd == 'nmigen':
payload, = rest
conn.send((yield payload))
elif cmd == 'exception':
exception, = rest
raise exception
else:
raise TypeError(f"unsupported command: {cmd}")
else:
yield
def write_process():
yield from write_frame_to_stream(input, testdata, pause=True)
yield Passive()
while True:
yield from write_to_stream(input,
line_last=0,
frame_last=0,
payload=0)
def read_process():
for i in range(128):
data, last = (yield from
read_from_stream(reader.output,
extract=("payload", "last")))
assert data == i + 2
assert last == ((i % 8) == 0)
yield Passive()
def write_process():
yield from write_frame_to_stream(input, image, pause=False)
yield from write_frame_to_stream(input, image, pause=False)
yield from write_frame_to_stream(input, image, pause=False)
yield Passive()
while True:
yield from write_to_stream(input,
line_last=0,
frame_last=0,
payload=0)
def find_maximum_fifo_level():
def find_max_levels(wavelet, level=1):
for i, fifo in enumerate(wavelet.fifos):
current_level = yield fifo.r_level
fifo_levels[level][i] = max(current_level, fifo_levels[level][i])
if hasattr(wavelet, 'next_stage'):
yield from find_max_levels(wavelet.next_stage, level + 1)
yield Passive()
while True:
yield from find_max_levels(wavelet)
yield
def write_process():
testdata = [[x * y for x in range(width)] for y in range(height)]
yield from write_frame_to_stream(input, testdata, pause=True)
yield from write_frame_to_stream(input, testdata, pause=True)
yield from write_frame_to_stream(input, testdata, pause=True)
yield Passive()
while True:
yield from write_to_stream(input,
line_last=0,
frame_last=0,
payload=0)
def writer():
for packet in packets:
yield from write_packet_to_stream(a.control_input,
packet,
timeout=400)
yield from write_packet_to_stream(a.control_input, [0x0],
timeout=400)
yield from write_packet_to_stream(b.control_input,
packet,
timeout=400)
yield from write_packet_to_stream(b.control_input, [0x0],
timeout=400)
yield Passive()
while True:
yield
def write_process():
yield from write_frame_to_stream(input, image, pause=False)
yield Passive()
def write_process():
for i in range(2):
yield from write_frame_to_stream(input, image, pause=False)
yield Passive()
yield from do_nothing(100)
def writer():
yield Passive()
random.seed(0)
while True:
yield from write_to_stream(input, payload=random.randrange(0, 2**12))
def loopback_proc():
yield Passive()
while True:
yield uart.rx_i.eq((yield uart.tx_o))
yield
def write_process():
for i in range(128):
yield from write_to_stream(address_stream,
payload=i,
last=(i % 8) == 0)
yield Passive()
def axi_answer_process():
yield Passive()
while True:
yield from answer_read_burst(axi, memory)
def process():
yield st7789.color.eq(0xf800)
yield Passive()
def write_process():
yield from write_frame_to_stream(input, image, pause=False, timeout=10000)
yield Passive()
while True:
yield from write_frame_to_stream(input, image, pause=False, timeout=10000)
def reader_port_process():
yield Passive()
while True:
yield from answer_read_burst(axi_reader_port, mem, timeout=-1)
def writer_port_process():
yield Passive()
while True:
memory, accepted = yield from answer_write_burst(axi_writer_port,
timeout=-1)
mem.update(memory)
